Commit | Line | Data |
---|---|---|
c19d1205 ZW |
1 | .text |
2 | .align 0 | |
3 | l: | |
252b5132 RH |
4 | smull r0, r1, r2, r3 |
5 | umull r0, r1, r2, r3 | |
6 | smlal r0, r1, r2, r3 | |
7 | umlal r0, r1, r4, r3 | |
8 | ||
9 | smullne r0, r1, r3, r4 | |
10 | smulls r1, r0, r9, r11 | |
11 | umlaleqs r2, r9, r4, r9 | |
12 | smlalge r14, r10, r8, r14 | |
1cac9012 | 13 | |
c19d1205 ZW |
14 | @ This used to be illegal, but rev 2 of the ARM ARM allows it. |
15 | msr CPSR_x, #0 | |
16 | ||
17 | @ padding for a.out's sake | |
18 | nop | |
19 | nop | |
20 | nop |