projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| c479fc62 JSC |
1 | #objdump: -dr |
| 2 | #name: ARM arm7t | |
| 3 | #as: -marm7t | |
| 4 | ||
| 5 | # Test the halfword and signextend memory transfers: | |
| 6 | ||
| 7 | .*: +file format .*arm.* | |
| 8 | ||
| 9 | Disassembly of section .text: | |
| 10 | 00000000 <[^>]*> e1d100b0 ldrh r0, \[r1\] | |
| 11 | 00000004 <[^>]*> e1f100b0 ldrh r0, \[r1\]! | |
| 12 | 00000008 <[^>]*> e19100b2 ldrh r0, \[r1, r2\] | |
| 13 | 0000000c <[^>]*> e1b100b2 ldrh r0, \[r1, r2\]! | |
| 14 | 00000010 <[^>]*> e1d100bc ldrh r0, \[r1, #c\] | |
| 15 | 00000014 <[^>]*> e1f100bc ldrh r0, \[r1, #c\]! | |
| 16 | 00000018 <[^>]*> e15100bc ldrh r0, \[r1, -#c\] | |
| 17 | 0000001c <[^>]*> e09100b2 ldrh r0, \[r1\], r2 | |
| 18 | 00000020 <[^>]*> e3a00cff mov r0, #ff00 | |
| 19 | 00000024 <[^>]*> e1df0bb4 ldrh r0, 000000e0 <\$\$lit_\ 21> | |
| 20 | 00000028 <[^>]*> e1df0abc ldrh r0, 000000dc <.L2> | |
| 21 | 0000002c <[^>]*> e1c100b0 strh r0, \[r1\] | |
| 22 | 00000030 <[^>]*> e1e100b0 strh r0, \[r1\]! | |
| 23 | 00000034 <[^>]*> e18100b2 strh r0, \[r1, r2\] | |
| 24 | 00000038 <[^>]*> e1a100b2 strh r0, \[r1, r2\]! | |
| 25 | 0000003c <[^>]*> e1c100bc strh r0, \[r1, #c\] | |
| 26 | 00000040 <[^>]*> e1e100bc strh r0, \[r1, #c\]! | |
| 27 | 00000044 <[^>]*> e14100bc strh r0, \[r1, -#c\] | |
| 28 | 00000048 <[^>]*> e08100b2 strh r0, \[r1\], r2 | |
| 29 | 0000004c <[^>]*> e1cf08b8 strh r0, 000000dc <.L2> | |
| 30 | 00000050 <[^>]*> e1d100d0 ldrsb r0, \[r1\] | |
| 31 | 00000054 <[^>]*> e1f100d0 ldrsb r0, \[r1\]! | |
| 32 | 00000058 <[^>]*> e19100d2 ldrsb r0, \[r1, r2\] | |
| 33 | 0000005c <[^>]*> e1b100d2 ldrsb r0, \[r1, r2\]! | |
| 34 | 00000060 <[^>]*> e1d100dc ldrsb r0, \[r1, #c\] | |
| 35 | 00000064 <[^>]*> e1f100dc ldrsb r0, \[r1, #c\]! | |
| 36 | 00000068 <[^>]*> e15100dc ldrsb r0, \[r1, -#c\] | |
| 37 | 0000006c <[^>]*> e09100d2 ldrsb r0, \[r1\], r2 | |
| 38 | 00000070 <[^>]*> e3a000de mov r0, #de | |
| 39 | 00000074 <[^>]*> e1df06d0 ldrsb r0, 000000dc <.L2> | |
| 40 | 00000078 <[^>]*> e1d100f0 ldrsh r0, \[r1\] | |
| 41 | 0000007c <[^>]*> e1f100f0 ldrsh r0, \[r1\]! | |
| 42 | 00000080 <[^>]*> e19100f2 ldrsh r0, \[r1, r2\] | |
| 43 | 00000084 <[^>]*> e1b100f2 ldrsh r0, \[r1, r2\]! | |
| 44 | 00000088 <[^>]*> e1d100fc ldrsh r0, \[r1, #c\] | |
| 45 | 0000008c <[^>]*> e1f100fc ldrsh r0, \[r1, #c\]! | |
| 46 | 00000090 <[^>]*> e15100fc ldrsh r0, \[r1, -#c\] | |
| 47 | 00000094 <[^>]*> e09100f2 ldrsh r0, \[r1\], r2 | |
| 48 | 00000098 <[^>]*> e3a00cff mov r0, #ff00 | |
| 49 | 0000009c <[^>]*> e1df03fc ldrsh r0, 000000e0 <\$\$lit_\ 21> | |
| 50 | 000000a0 <[^>]*> e1df03f4 ldrsh r0, 000000dc <.L2> | |
| 51 | 000000a4 <[^>]*> e19100b2 ldrh r0, \[r1, r2\] | |
| 52 | 000000a8 <[^>]*> 119100b2 ldrneh r0, \[r1, r2\] | |
| 53 | 000000ac <[^>]*> 819100b2 ldrhih r0, \[r1, r2\] | |
| 54 | 000000b0 <[^>]*> b19100b2 ldrlth r0, \[r1, r2\] | |
| 55 | 000000b4 <[^>]*> e19100f2 ldrsh r0, \[r1, r2\] | |
| 56 | 000000b8 <[^>]*> 119100f2 ldrnesh r0, \[r1, r2\] | |
| 57 | 000000bc <[^>]*> 819100f2 ldrhish r0, \[r1, r2\] | |
| 58 | 000000c0 <[^>]*> b19100f2 ldrltsh r0, \[r1, r2\] | |
| 59 | 000000c4 <[^>]*> e19100d2 ldrsb r0, \[r1, r2\] | |
| 60 | 000000c8 <[^>]*> 119100d2 ldrnesb r0, \[r1, r2\] | |
| 61 | 000000cc <[^>]*> 819100d2 ldrhisb r0, \[r1, r2\] | |
| 62 | 000000d0 <[^>]*> b19100d2 ldrltsb r0, \[r1, r2\] | |
| 63 | 000000d4 <[^>]*> e1df00f4 ldrsh r0, 000000e0 <\$\$lit_\ 21> | |
| 64 | 000000d8 <[^>]*> e1df00f4 ldrsh r0, 000000e4 <\$\$lit_\ 21\+4> | |
| 65 | ... | |
| 66 | [ ]*RELOC: 000000dc 32 .LC0 | |
| 67 | 000000e0 <[^>]*> 0000c0de .* | |
| 68 | 000000e4 <[^>]*> 0000dead .* |