Commit | Line | Data |
---|---|---|
252b5132 RH |
1 | .text |
2 | .align 0 | |
3 | ||
4 | loadhalfwords: | |
5 | ldrh r0, [r1] | |
6 | ldrh r0, [r1]! | |
7 | ldrh r0, [r1, r2] | |
8 | ldrh r0, [r1, r2]! | |
9 | ldrh r0, [r1,#0x0C] | |
10 | ldrh r0, [r1,#0x0C]! | |
11 | ldrh r0, [r1,#-0x0C] | |
12 | ldrh r0, [r1], r2 | |
13 | ldrh r0, =0xFF00 | |
14 | ldrh r0, =0xC0DE | |
15 | ldrh r0, .L2 | |
16 | ||
17 | storehalfwords: | |
18 | strh r0, [r1] | |
19 | strh r0, [r1]! | |
20 | strh r0, [r1, r2] | |
21 | strh r0, [r1, r2]! | |
22 | strh r0, [r1,#0x0C] | |
23 | strh r0, [r1,#0x0C]! | |
24 | strh r0, [r1,#-0x0C] | |
25 | strh r0, [r1], r2 | |
26 | strh r0, .L2 | |
27 | ||
28 | loadsignedbytes: | |
29 | ldrsb r0, [r1] | |
30 | ldrsb r0, [r1]! | |
31 | ldrsb r0, [r1, r2] | |
32 | ldrsb r0, [r1, r2]! | |
33 | ldrsb r0, [r1,#0x0C] | |
34 | ldrsb r0, [r1,#0x0C]! | |
35 | ldrsb r0, [r1,#-0x0C] | |
36 | ldrsb r0, [r1], r2 | |
37 | ldrsb r0, =0xDE | |
38 | ldrsb r0, .L2 | |
39 | ||
40 | loadsignedhalfwords: | |
41 | ldrsh r0, [r1] | |
42 | ldrsh r0, [r1]! | |
43 | ldrsh r0, [r1, r2] | |
44 | ldrsh r0, [r1, r2]! | |
45 | ldrsh r0, [r1, #0x0C] | |
46 | ldrsh r0, [r1, #0x0C]! | |
47 | ldrsh r0, [r1, #-0x0C] | |
48 | ldrsh r0, [r1], r2 | |
49 | ldrsh r0, =0xFF00 | |
50 | ldrsh r0, =0xC0DE | |
51 | ldrsh r0, .L2 | |
52 | ||
53 | misc: | |
54 | ldralh r0, [r1, r2] | |
55 | ldrneh r0, [r1, r2] | |
56 | ldrhih r0, [r1, r2] | |
57 | ldrlth r0, [r1, r2] | |
58 | ||
59 | ldralsh r0, [r1, r2] | |
60 | ldrnesh r0, [r1, r2] | |
61 | ldrhish r0, [r1, r2] | |
62 | ldrltsh r0, [r1, r2] | |
63 | ||
64 | ldralsb r0, [r1, r2] | |
65 | ldrnesb r0, [r1, r2] | |
66 | ldrhisb r0, [r1, r2] | |
67 | ldrltsb r0, [r1, r2] | |
68 | ||
69 | ldrsh r0, =0xC0DE | |
70 | ldrsh r0, =0xDEAD | |
71 | ||
72 | .align | |
73 | .L2: | |
50903393 | 74 | .word fred |
358b94bd NC |
75 | |
76 | .ltorg | |
f598fd5e NC |
77 | |
78 | # Add two nop instructions to ensure that the | |
79 | # output is 32-byte aligned as required for arm-aout. | |
80 | nop | |
81 | nop |