Commit | Line | Data |
---|---|---|
33399f07 | 1 | #name: Valid v8-a+fp |
ced40572 TP |
2 | #source: armv8-ar+fp.s |
3 | #as: -march=armv8-a | |
33399f07 | 4 | #objdump: -dr --prefix-addresses --show-raw-insn |
2ac93be7 | 5 | #skip: *-*-pe *-*-wince |
33399f07 MGD |
6 | |
7 | .*: +file format .*arm.* | |
8 | ||
9 | Disassembly of section .text: | |
10 | 0[0-9a-f]+ <[^>]+> fe000a00 vseleq.f32 s0, s0, s0 | |
11 | 0[0-9a-f]+ <[^>]+> fe500aa0 vselvs.f32 s1, s1, s1 | |
12 | 0[0-9a-f]+ <[^>]+> fe2ffa0f vselge.f32 s30, s30, s30 | |
13 | 0[0-9a-f]+ <[^>]+> fe7ffaaf vselgt.f32 s31, s31, s31 | |
14 | 0[0-9a-f]+ <[^>]+> fe000b00 vseleq.f64 d0, d0, d0 | |
15 | 0[0-9a-f]+ <[^>]+> fe500ba0 vselvs.f64 d16, d16, d16 | |
16 | 0[0-9a-f]+ <[^>]+> fe2ffb0f vselge.f64 d15, d15, d15 | |
17 | 0[0-9a-f]+ <[^>]+> fe7ffbaf vselgt.f64 d31, d31, d31 | |
73924fbc MGD |
18 | 0[0-9a-f]+ <[^>]+> fe800a00 vmaxnm.f32 s0, s0, s0 |
19 | 0[0-9a-f]+ <[^>]+> fec00aa0 vmaxnm.f32 s1, s1, s1 | |
20 | 0[0-9a-f]+ <[^>]+> fe8ffa0f vmaxnm.f32 s30, s30, s30 | |
21 | 0[0-9a-f]+ <[^>]+> fecffaaf vmaxnm.f32 s31, s31, s31 | |
22 | 0[0-9a-f]+ <[^>]+> fe800b00 vmaxnm.f64 d0, d0, d0 | |
23 | 0[0-9a-f]+ <[^>]+> fec00ba0 vmaxnm.f64 d16, d16, d16 | |
24 | 0[0-9a-f]+ <[^>]+> fe8ffb0f vmaxnm.f64 d15, d15, d15 | |
25 | 0[0-9a-f]+ <[^>]+> fecffbaf vmaxnm.f64 d31, d31, d31 | |
26 | 0[0-9a-f]+ <[^>]+> fe800a40 vminnm.f32 s0, s0, s0 | |
27 | 0[0-9a-f]+ <[^>]+> fec00ae0 vminnm.f32 s1, s1, s1 | |
28 | 0[0-9a-f]+ <[^>]+> fe8ffa4f vminnm.f32 s30, s30, s30 | |
29 | 0[0-9a-f]+ <[^>]+> fecffaef vminnm.f32 s31, s31, s31 | |
30 | 0[0-9a-f]+ <[^>]+> fe800b40 vminnm.f64 d0, d0, d0 | |
31 | 0[0-9a-f]+ <[^>]+> fec00be0 vminnm.f64 d16, d16, d16 | |
32 | 0[0-9a-f]+ <[^>]+> fe8ffb4f vminnm.f64 d15, d15, d15 | |
33 | 0[0-9a-f]+ <[^>]+> fecffbef vminnm.f64 d31, d31, d31 | |
7e8e6784 MGD |
34 | 0[0-9a-f]+ <[^>]+> febc0ac0 vcvta.s32.f32 s0, s0 |
35 | 0[0-9a-f]+ <[^>]+> fefd0ae0 vcvtn.s32.f32 s1, s1 | |
36 | 0[0-9a-f]+ <[^>]+> febefa4f vcvtp.u32.f32 s30, s30 | |
37 | 0[0-9a-f]+ <[^>]+> fefffa6f vcvtm.u32.f32 s31, s31 | |
827f64ff WN |
38 | 0[0-9a-f]+ <[^>]+> febc0bc0 vcvta.s32.f64 s0, d0 |
39 | 0[0-9a-f]+ <[^>]+> fefd0be0 vcvtn.s32.f64 s1, d16 | |
7e8e6784 MGD |
40 | 0[0-9a-f]+ <[^>]+> febefb4f vcvtp.u32.f64 s30, d15 |
41 | 0[0-9a-f]+ <[^>]+> fefffb6f vcvtm.u32.f64 s31, d31 | |
f8ece37f RE |
42 | 0[0-9a-f]+ <[^>]+> eeb60ac0 vrintz.f32 s0, s0 |
43 | 0[0-9a-f]+ <[^>]+> eef70a60 vrintx.f32 s1, s1 | |
44 | 0[0-9a-f]+ <[^>]+> 0eb6fa4f vrintreq.f32 s30, s30 | |
45 | 0[0-9a-f]+ <[^>]+> feb80a40 vrinta.f32 s0, s0 | |
46 | 0[0-9a-f]+ <[^>]+> fef90a60 vrintn.f32 s1, s1 | |
47 | 0[0-9a-f]+ <[^>]+> febafa4f vrintp.f32 s30, s30 | |
48 | 0[0-9a-f]+ <[^>]+> fefbfa6f vrintm.f32 s31, s31 | |
49 | 0[0-9a-f]+ <[^>]+> eeb60bc0 vrintz.f64 d0, d0 | |
50 | 0[0-9a-f]+ <[^>]+> eeb71b41 vrintx.f64 d1, d1 | |
51 | 0[0-9a-f]+ <[^>]+> 0ef6eb6e vrintreq.f64 d30, d30 | |
52 | 0[0-9a-f]+ <[^>]+> feb80b40 vrinta.f64 d0, d0 | |
53 | 0[0-9a-f]+ <[^>]+> feb91b41 vrintn.f64 d1, d1 | |
54 | 0[0-9a-f]+ <[^>]+> fefaeb6e vrintp.f64 d30, d30 | |
55 | 0[0-9a-f]+ <[^>]+> fefbfb6f vrintm.f64 d31, d31 | |
c70a8987 MGD |
56 | 0[0-9a-f]+ <[^>]+> eeb30bc0 vcvtt.f16.f64 s0, d0 |
57 | 0[0-9a-f]+ <[^>]+> eef30b60 vcvtb.f16.f64 s1, d16 | |
58 | 0[0-9a-f]+ <[^>]+> eeb3fbcf vcvtt.f16.f64 s30, d15 | |
59 | 0[0-9a-f]+ <[^>]+> eef3fb6f vcvtb.f16.f64 s31, d31 | |
60 | 0[0-9a-f]+ <[^>]+> eeb20bc0 vcvtt.f64.f16 d0, s0 | |
61 | 0[0-9a-f]+ <[^>]+> eef20b60 vcvtb.f64.f16 d16, s1 | |
62 | 0[0-9a-f]+ <[^>]+> eeb2fbcf vcvtt.f64.f16 d15, s30 | |
63 | 0[0-9a-f]+ <[^>]+> eef2fb6f vcvtb.f64.f16 d31, s31 | |
33399f07 MGD |
64 | 0[0-9a-f]+ <[^>]+> fe00 0a00 vseleq.f32 s0, s0, s0 |
65 | 0[0-9a-f]+ <[^>]+> fe50 0aa0 vselvs.f32 s1, s1, s1 | |
66 | 0[0-9a-f]+ <[^>]+> fe2f fa0f vselge.f32 s30, s30, s30 | |
67 | 0[0-9a-f]+ <[^>]+> fe7f faaf vselgt.f32 s31, s31, s31 | |
68 | 0[0-9a-f]+ <[^>]+> fe00 0b00 vseleq.f64 d0, d0, d0 | |
69 | 0[0-9a-f]+ <[^>]+> fe50 0ba0 vselvs.f64 d16, d16, d16 | |
70 | 0[0-9a-f]+ <[^>]+> fe2f fb0f vselge.f64 d15, d15, d15 | |
71 | 0[0-9a-f]+ <[^>]+> fe7f fbaf vselgt.f64 d31, d31, d31 | |
73924fbc MGD |
72 | 0[0-9a-f]+ <[^>]+> fe80 0a00 vmaxnm.f32 s0, s0, s0 |
73 | 0[0-9a-f]+ <[^>]+> fec0 0aa0 vmaxnm.f32 s1, s1, s1 | |
74 | 0[0-9a-f]+ <[^>]+> fe8f fa0f vmaxnm.f32 s30, s30, s30 | |
75 | 0[0-9a-f]+ <[^>]+> fecf faaf vmaxnm.f32 s31, s31, s31 | |
76 | 0[0-9a-f]+ <[^>]+> fe80 0b00 vmaxnm.f64 d0, d0, d0 | |
77 | 0[0-9a-f]+ <[^>]+> fec0 0ba0 vmaxnm.f64 d16, d16, d16 | |
78 | 0[0-9a-f]+ <[^>]+> fe8f fb0f vmaxnm.f64 d15, d15, d15 | |
79 | 0[0-9a-f]+ <[^>]+> fecf fbaf vmaxnm.f64 d31, d31, d31 | |
80 | 0[0-9a-f]+ <[^>]+> fe80 0a40 vminnm.f32 s0, s0, s0 | |
81 | 0[0-9a-f]+ <[^>]+> fec0 0ae0 vminnm.f32 s1, s1, s1 | |
82 | 0[0-9a-f]+ <[^>]+> fe8f fa4f vminnm.f32 s30, s30, s30 | |
83 | 0[0-9a-f]+ <[^>]+> fecf faef vminnm.f32 s31, s31, s31 | |
84 | 0[0-9a-f]+ <[^>]+> fe80 0b40 vminnm.f64 d0, d0, d0 | |
85 | 0[0-9a-f]+ <[^>]+> fec0 0be0 vminnm.f64 d16, d16, d16 | |
86 | 0[0-9a-f]+ <[^>]+> fe8f fb4f vminnm.f64 d15, d15, d15 | |
87 | 0[0-9a-f]+ <[^>]+> fecf fbef vminnm.f64 d31, d31, d31 | |
7e8e6784 MGD |
88 | 0[0-9a-f]+ <[^>]+> febc 0ac0 vcvta.s32.f32 s0, s0 |
89 | 0[0-9a-f]+ <[^>]+> fefd 0ae0 vcvtn.s32.f32 s1, s1 | |
90 | 0[0-9a-f]+ <[^>]+> febe fa4f vcvtp.u32.f32 s30, s30 | |
91 | 0[0-9a-f]+ <[^>]+> feff fa6f vcvtm.u32.f32 s31, s31 | |
827f64ff WN |
92 | 0[0-9a-f]+ <[^>]+> febc 0bc0 vcvta.s32.f64 s0, d0 |
93 | 0[0-9a-f]+ <[^>]+> fefd 0be0 vcvtn.s32.f64 s1, d16 | |
7e8e6784 MGD |
94 | 0[0-9a-f]+ <[^>]+> febe fb4f vcvtp.u32.f64 s30, d15 |
95 | 0[0-9a-f]+ <[^>]+> feff fb6f vcvtm.u32.f64 s31, d31 | |
f8ece37f RE |
96 | 0[0-9a-f]+ <[^>]+> eeb6 0ac0 vrintz.f32 s0, s0 |
97 | 0[0-9a-f]+ <[^>]+> eef7 0a60 vrintx.f32 s1, s1 | |
98 | 0[0-9a-f]+ <[^>]+> eeb6 fa4f vrintr.f32 s30, s30 | |
99 | 0[0-9a-f]+ <[^>]+> feb8 0a40 vrinta.f32 s0, s0 | |
100 | 0[0-9a-f]+ <[^>]+> fef9 0a60 vrintn.f32 s1, s1 | |
101 | 0[0-9a-f]+ <[^>]+> feba fa4f vrintp.f32 s30, s30 | |
102 | 0[0-9a-f]+ <[^>]+> fefb fa6f vrintm.f32 s31, s31 | |
103 | 0[0-9a-f]+ <[^>]+> eeb6 0bc0 vrintz.f64 d0, d0 | |
104 | 0[0-9a-f]+ <[^>]+> eeb7 1b41 vrintx.f64 d1, d1 | |
105 | 0[0-9a-f]+ <[^>]+> eef6 eb6e vrintr.f64 d30, d30 | |
106 | 0[0-9a-f]+ <[^>]+> feb8 0b40 vrinta.f64 d0, d0 | |
107 | 0[0-9a-f]+ <[^>]+> feb9 1b41 vrintn.f64 d1, d1 | |
108 | 0[0-9a-f]+ <[^>]+> fefa eb6e vrintp.f64 d30, d30 | |
109 | 0[0-9a-f]+ <[^>]+> fefb fb6f vrintm.f64 d31, d31 | |
c70a8987 MGD |
110 | 0[0-9a-f]+ <[^>]+> eeb3 0bc0 vcvtt.f16.f64 s0, d0 |
111 | 0[0-9a-f]+ <[^>]+> eef3 0b60 vcvtb.f16.f64 s1, d16 | |
112 | 0[0-9a-f]+ <[^>]+> eeb3 fbcf vcvtt.f16.f64 s30, d15 | |
113 | 0[0-9a-f]+ <[^>]+> eef3 fb6f vcvtb.f16.f64 s31, d31 | |
114 | 0[0-9a-f]+ <[^>]+> eeb2 0bc0 vcvtt.f64.f16 d0, s0 | |
115 | 0[0-9a-f]+ <[^>]+> eef2 0b60 vcvtb.f64.f16 d16, s1 | |
116 | 0[0-9a-f]+ <[^>]+> eeb2 fbcf vcvtt.f64.f16 d15, s30 | |
117 | 0[0-9a-f]+ <[^>]+> eef2 fb6f vcvtb.f64.f16 d31, s31 | |
40c7d507 RR |
118 | 0[0-9a-f]+ <[^>]+> eef5 9a10 vmrs r9, mvfr2 |
119 | 0[0-9a-f]+ <[^>]+> eee5 7a10 vmsr mvfr2, r7 | |
120 | 0[0-9a-f]+ <[^>]+> eef5 4a10 vmrs r4, mvfr2 | |
121 | 0[0-9a-f]+ <[^>]+> eee5 5a10 vmsr mvfr2, r5 |