[Patch ARM] Fix build attributes for armv8-a in case of assembler files that contain...
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / armv8-a+simd.d
CommitLineData
73924fbc
MGD
1#name: Valid v8-a+simdv3
2#objdump: -dr --prefix-addresses --show-raw-insn
8335d6aa 3#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
73924fbc
MGD
4
5.*: +file format .*arm.*
6
7Disassembly of section .text:
80[0-9a-f]+ <[^>]+> f3000f10 vmaxnm.f32 d0, d0, d0
90[0-9a-f]+ <[^>]+> f3400fb0 vmaxnm.f32 d16, d16, d16
100[0-9a-f]+ <[^>]+> f30fff1f vmaxnm.f32 d15, d15, d15
110[0-9a-f]+ <[^>]+> f34fffbf vmaxnm.f32 d31, d31, d31
120[0-9a-f]+ <[^>]+> f3000f50 vmaxnm.f32 q0, q0, q0
130[0-9a-f]+ <[^>]+> f3400ff0 vmaxnm.f32 q8, q8, q8
140[0-9a-f]+ <[^>]+> f30eef5e vmaxnm.f32 q7, q7, q7
150[0-9a-f]+ <[^>]+> f34eeffe vmaxnm.f32 q15, q15, q15
160[0-9a-f]+ <[^>]+> f3200f10 vminnm.f32 d0, d0, d0
170[0-9a-f]+ <[^>]+> f3600fb0 vminnm.f32 d16, d16, d16
180[0-9a-f]+ <[^>]+> f32fff1f vminnm.f32 d15, d15, d15
190[0-9a-f]+ <[^>]+> f36fffbf vminnm.f32 d31, d31, d31
200[0-9a-f]+ <[^>]+> f3200f50 vminnm.f32 q0, q0, q0
210[0-9a-f]+ <[^>]+> f3600ff0 vminnm.f32 q8, q8, q8
220[0-9a-f]+ <[^>]+> f32eef5e vminnm.f32 q7, q7, q7
230[0-9a-f]+ <[^>]+> f36eeffe vminnm.f32 q15, q15, q15
7e8e6784
MGD
240[0-9a-f]+ <[^>]+> f3bb0000 vcvta.s32.f32 d0, d0
250[0-9a-f]+ <[^>]+> f3fb0120 vcvtn.s32.f32 d16, d16
260[0-9a-f]+ <[^>]+> f3bbf28f vcvtp.u32.f32 d15, d15
270[0-9a-f]+ <[^>]+> f3fbf3af vcvtm.u32.f32 d31, d31
280[0-9a-f]+ <[^>]+> f3bb0040 vcvta.s32.f32 q0, q0
290[0-9a-f]+ <[^>]+> f3fb0160 vcvtn.s32.f32 q8, q8
300[0-9a-f]+ <[^>]+> f3bbe2ce vcvtp.u32.f32 q7, q7
310[0-9a-f]+ <[^>]+> f3fbe3ee vcvtm.u32.f32 q15, q15
f8ece37f
RE
320[0-9a-f]+ <[^>]+> f3ba0500 vrinta.f32 d0, d0
330[0-9a-f]+ <[^>]+> f3fa0420 vrintn.f32 d16, d16
340[0-9a-f]+ <[^>]+> f3baf68f vrintm.f32 d15, d15
350[0-9a-f]+ <[^>]+> f3faf7af vrintp.f32 d31, d31
360[0-9a-f]+ <[^>]+> f3ba04af vrintx.f32 d0, d31
370[0-9a-f]+ <[^>]+> f3fa058f vrintz.f32 d16, d15
380[0-9a-f]+ <[^>]+> f3ba0540 vrinta.f32 q0, q0
390[0-9a-f]+ <[^>]+> f3fa0460 vrintn.f32 q8, q8
400[0-9a-f]+ <[^>]+> f3bae6ce vrintm.f32 q7, q7
410[0-9a-f]+ <[^>]+> f3fae7ee vrintp.f32 q15, q15
420[0-9a-f]+ <[^>]+> f3ba04ee vrintx.f32 q0, q15
430[0-9a-f]+ <[^>]+> f3fa05ce vrintz.f32 q8, q7
73924fbc
MGD
440[0-9a-f]+ <[^>]+> ff00 0f10 vmaxnm.f32 d0, d0, d0
450[0-9a-f]+ <[^>]+> ff40 0fb0 vmaxnm.f32 d16, d16, d16
460[0-9a-f]+ <[^>]+> ff0f ff1f vmaxnm.f32 d15, d15, d15
470[0-9a-f]+ <[^>]+> ff4f ffbf vmaxnm.f32 d31, d31, d31
480[0-9a-f]+ <[^>]+> ff00 0f50 vmaxnm.f32 q0, q0, q0
490[0-9a-f]+ <[^>]+> ff40 0ff0 vmaxnm.f32 q8, q8, q8
500[0-9a-f]+ <[^>]+> ff0e ef5e vmaxnm.f32 q7, q7, q7
510[0-9a-f]+ <[^>]+> ff4e effe vmaxnm.f32 q15, q15, q15
520[0-9a-f]+ <[^>]+> ff20 0f10 vminnm.f32 d0, d0, d0
530[0-9a-f]+ <[^>]+> ff60 0fb0 vminnm.f32 d16, d16, d16
540[0-9a-f]+ <[^>]+> ff2f ff1f vminnm.f32 d15, d15, d15
550[0-9a-f]+ <[^>]+> ff6f ffbf vminnm.f32 d31, d31, d31
560[0-9a-f]+ <[^>]+> ff20 0f50 vminnm.f32 q0, q0, q0
570[0-9a-f]+ <[^>]+> ff60 0ff0 vminnm.f32 q8, q8, q8
580[0-9a-f]+ <[^>]+> ff2e ef5e vminnm.f32 q7, q7, q7
590[0-9a-f]+ <[^>]+> ff6e effe vminnm.f32 q15, q15, q15
7e8e6784
MGD
600[0-9a-f]+ <[^>]+> ffbb 0000 vcvta.s32.f32 d0, d0
610[0-9a-f]+ <[^>]+> fffb 0120 vcvtn.s32.f32 d16, d16
620[0-9a-f]+ <[^>]+> ffbb f28f vcvtp.u32.f32 d15, d15
630[0-9a-f]+ <[^>]+> fffb f3af vcvtm.u32.f32 d31, d31
640[0-9a-f]+ <[^>]+> ffbb 0040 vcvta.s32.f32 q0, q0
650[0-9a-f]+ <[^>]+> fffb 0160 vcvtn.s32.f32 q8, q8
660[0-9a-f]+ <[^>]+> ffbb e2ce vcvtp.u32.f32 q7, q7
670[0-9a-f]+ <[^>]+> fffb e3ee vcvtm.u32.f32 q15, q15
f8ece37f
RE
680[0-9a-f]+ <[^>]+> ffba 0500 vrinta.f32 d0, d0
690[0-9a-f]+ <[^>]+> fffa 0420 vrintn.f32 d16, d16
700[0-9a-f]+ <[^>]+> ffba f68f vrintm.f32 d15, d15
710[0-9a-f]+ <[^>]+> fffa f7af vrintp.f32 d31, d31
720[0-9a-f]+ <[^>]+> ffba 04af vrintx.f32 d0, d31
730[0-9a-f]+ <[^>]+> fffa 058f vrintz.f32 d16, d15
740[0-9a-f]+ <[^>]+> ffba 0540 vrinta.f32 q0, q0
750[0-9a-f]+ <[^>]+> fffa 0460 vrintn.f32 q8, q8
760[0-9a-f]+ <[^>]+> ffba e6ce vrintm.f32 q7, q7
770[0-9a-f]+ <[^>]+> fffa e7ee vrintp.f32 q15, q15
780[0-9a-f]+ <[^>]+> ffba 04ee vrintx.f32 q0, q15
790[0-9a-f]+ <[^>]+> fffa 05ce vrintz.f32 q8, q7
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