Commit | Line | Data |
---|---|---|
73924fbc MGD |
1 | #name: Valid v8-a+simdv3 |
2 | #objdump: -dr --prefix-addresses --show-raw-insn | |
8335d6aa | 3 | #skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd |
73924fbc MGD |
4 | |
5 | .*: +file format .*arm.* | |
6 | ||
7 | Disassembly of section .text: | |
8 | 0[0-9a-f]+ <[^>]+> f3000f10 vmaxnm.f32 d0, d0, d0 | |
9 | 0[0-9a-f]+ <[^>]+> f3400fb0 vmaxnm.f32 d16, d16, d16 | |
10 | 0[0-9a-f]+ <[^>]+> f30fff1f vmaxnm.f32 d15, d15, d15 | |
11 | 0[0-9a-f]+ <[^>]+> f34fffbf vmaxnm.f32 d31, d31, d31 | |
12 | 0[0-9a-f]+ <[^>]+> f3000f50 vmaxnm.f32 q0, q0, q0 | |
13 | 0[0-9a-f]+ <[^>]+> f3400ff0 vmaxnm.f32 q8, q8, q8 | |
14 | 0[0-9a-f]+ <[^>]+> f30eef5e vmaxnm.f32 q7, q7, q7 | |
15 | 0[0-9a-f]+ <[^>]+> f34eeffe vmaxnm.f32 q15, q15, q15 | |
16 | 0[0-9a-f]+ <[^>]+> f3200f10 vminnm.f32 d0, d0, d0 | |
17 | 0[0-9a-f]+ <[^>]+> f3600fb0 vminnm.f32 d16, d16, d16 | |
18 | 0[0-9a-f]+ <[^>]+> f32fff1f vminnm.f32 d15, d15, d15 | |
19 | 0[0-9a-f]+ <[^>]+> f36fffbf vminnm.f32 d31, d31, d31 | |
20 | 0[0-9a-f]+ <[^>]+> f3200f50 vminnm.f32 q0, q0, q0 | |
21 | 0[0-9a-f]+ <[^>]+> f3600ff0 vminnm.f32 q8, q8, q8 | |
22 | 0[0-9a-f]+ <[^>]+> f32eef5e vminnm.f32 q7, q7, q7 | |
23 | 0[0-9a-f]+ <[^>]+> f36eeffe vminnm.f32 q15, q15, q15 | |
7e8e6784 MGD |
24 | 0[0-9a-f]+ <[^>]+> f3bb0000 vcvta.s32.f32 d0, d0 |
25 | 0[0-9a-f]+ <[^>]+> f3fb0120 vcvtn.s32.f32 d16, d16 | |
26 | 0[0-9a-f]+ <[^>]+> f3bbf28f vcvtp.u32.f32 d15, d15 | |
27 | 0[0-9a-f]+ <[^>]+> f3fbf3af vcvtm.u32.f32 d31, d31 | |
28 | 0[0-9a-f]+ <[^>]+> f3bb0040 vcvta.s32.f32 q0, q0 | |
29 | 0[0-9a-f]+ <[^>]+> f3fb0160 vcvtn.s32.f32 q8, q8 | |
30 | 0[0-9a-f]+ <[^>]+> f3bbe2ce vcvtp.u32.f32 q7, q7 | |
31 | 0[0-9a-f]+ <[^>]+> f3fbe3ee vcvtm.u32.f32 q15, q15 | |
f8ece37f RE |
32 | 0[0-9a-f]+ <[^>]+> f3ba0500 vrinta.f32 d0, d0 |
33 | 0[0-9a-f]+ <[^>]+> f3fa0420 vrintn.f32 d16, d16 | |
34 | 0[0-9a-f]+ <[^>]+> f3baf68f vrintm.f32 d15, d15 | |
35 | 0[0-9a-f]+ <[^>]+> f3faf7af vrintp.f32 d31, d31 | |
36 | 0[0-9a-f]+ <[^>]+> f3ba04af vrintx.f32 d0, d31 | |
37 | 0[0-9a-f]+ <[^>]+> f3fa058f vrintz.f32 d16, d15 | |
38 | 0[0-9a-f]+ <[^>]+> f3ba0540 vrinta.f32 q0, q0 | |
39 | 0[0-9a-f]+ <[^>]+> f3fa0460 vrintn.f32 q8, q8 | |
40 | 0[0-9a-f]+ <[^>]+> f3bae6ce vrintm.f32 q7, q7 | |
41 | 0[0-9a-f]+ <[^>]+> f3fae7ee vrintp.f32 q15, q15 | |
42 | 0[0-9a-f]+ <[^>]+> f3ba04ee vrintx.f32 q0, q15 | |
43 | 0[0-9a-f]+ <[^>]+> f3fa05ce vrintz.f32 q8, q7 | |
73924fbc MGD |
44 | 0[0-9a-f]+ <[^>]+> ff00 0f10 vmaxnm.f32 d0, d0, d0 |
45 | 0[0-9a-f]+ <[^>]+> ff40 0fb0 vmaxnm.f32 d16, d16, d16 | |
46 | 0[0-9a-f]+ <[^>]+> ff0f ff1f vmaxnm.f32 d15, d15, d15 | |
47 | 0[0-9a-f]+ <[^>]+> ff4f ffbf vmaxnm.f32 d31, d31, d31 | |
48 | 0[0-9a-f]+ <[^>]+> ff00 0f50 vmaxnm.f32 q0, q0, q0 | |
49 | 0[0-9a-f]+ <[^>]+> ff40 0ff0 vmaxnm.f32 q8, q8, q8 | |
50 | 0[0-9a-f]+ <[^>]+> ff0e ef5e vmaxnm.f32 q7, q7, q7 | |
51 | 0[0-9a-f]+ <[^>]+> ff4e effe vmaxnm.f32 q15, q15, q15 | |
52 | 0[0-9a-f]+ <[^>]+> ff20 0f10 vminnm.f32 d0, d0, d0 | |
53 | 0[0-9a-f]+ <[^>]+> ff60 0fb0 vminnm.f32 d16, d16, d16 | |
54 | 0[0-9a-f]+ <[^>]+> ff2f ff1f vminnm.f32 d15, d15, d15 | |
55 | 0[0-9a-f]+ <[^>]+> ff6f ffbf vminnm.f32 d31, d31, d31 | |
56 | 0[0-9a-f]+ <[^>]+> ff20 0f50 vminnm.f32 q0, q0, q0 | |
57 | 0[0-9a-f]+ <[^>]+> ff60 0ff0 vminnm.f32 q8, q8, q8 | |
58 | 0[0-9a-f]+ <[^>]+> ff2e ef5e vminnm.f32 q7, q7, q7 | |
59 | 0[0-9a-f]+ <[^>]+> ff6e effe vminnm.f32 q15, q15, q15 | |
7e8e6784 MGD |
60 | 0[0-9a-f]+ <[^>]+> ffbb 0000 vcvta.s32.f32 d0, d0 |
61 | 0[0-9a-f]+ <[^>]+> fffb 0120 vcvtn.s32.f32 d16, d16 | |
62 | 0[0-9a-f]+ <[^>]+> ffbb f28f vcvtp.u32.f32 d15, d15 | |
63 | 0[0-9a-f]+ <[^>]+> fffb f3af vcvtm.u32.f32 d31, d31 | |
64 | 0[0-9a-f]+ <[^>]+> ffbb 0040 vcvta.s32.f32 q0, q0 | |
65 | 0[0-9a-f]+ <[^>]+> fffb 0160 vcvtn.s32.f32 q8, q8 | |
66 | 0[0-9a-f]+ <[^>]+> ffbb e2ce vcvtp.u32.f32 q7, q7 | |
67 | 0[0-9a-f]+ <[^>]+> fffb e3ee vcvtm.u32.f32 q15, q15 | |
f8ece37f RE |
68 | 0[0-9a-f]+ <[^>]+> ffba 0500 vrinta.f32 d0, d0 |
69 | 0[0-9a-f]+ <[^>]+> fffa 0420 vrintn.f32 d16, d16 | |
70 | 0[0-9a-f]+ <[^>]+> ffba f68f vrintm.f32 d15, d15 | |
71 | 0[0-9a-f]+ <[^>]+> fffa f7af vrintp.f32 d31, d31 | |
72 | 0[0-9a-f]+ <[^>]+> ffba 04af vrintx.f32 d0, d31 | |
73 | 0[0-9a-f]+ <[^>]+> fffa 058f vrintz.f32 d16, d15 | |
74 | 0[0-9a-f]+ <[^>]+> ffba 0540 vrinta.f32 q0, q0 | |
75 | 0[0-9a-f]+ <[^>]+> fffa 0460 vrintn.f32 q8, q8 | |
76 | 0[0-9a-f]+ <[^>]+> ffba e6ce vrintm.f32 q7, q7 | |
77 | 0[0-9a-f]+ <[^>]+> fffa e7ee vrintp.f32 q15, q15 | |
78 | 0[0-9a-f]+ <[^>]+> ffba 04ee vrintx.f32 q0, q15 | |
79 | 0[0-9a-f]+ <[^>]+> fffa 05ce vrintz.f32 q8, q7 |