Commit | Line | Data |
---|---|---|
252b5132 RH |
1 | .text |
2 | .align 0 | |
3 | cdp p1, 4, cr1, cr2, cr3 | |
4 | cdpeq 4, 3, c1, c4, cr5, 5 | |
5 | ||
6 | ldc 5, cr9, [r3] | |
7 | ldcl 1, cr14, [r1, #32] | |
8 | ldcmi 0, cr0, [r2, #1020]! | |
9 | ldcpll p7, c1, [r3], #64 | |
10 | ldc p0, c8, foo | |
11 | foo: | |
12 | ||
13 | stc 5, cr0, [r3] | |
14 | stcl 3, cr15, [r0, #8] | |
15 | stceq p4, cr12, [r2, #100]! | |
16 | stccc p6, c8, [r4], #48 | |
17 | stc p1, c7, bar | |
18 | bar: | |
19 | ||
20 | mrc 2, 3, r5, c1, c2 | |
21 | mrcge p4, 5, r15, cr1, cr2, 7 | |
22 | ||
fdfde340 | 23 | mcr p7, 1, r5, cr1, cr1 |
252b5132 | 24 | mcrlt 5, 1, r8, cr2, cr9, 0 |
f02232aa NC |
25 | |
26 | @ The following patterns test Addressing Mode 5 "Unindexed" | |
27 | ||
28 | ldc 3, c7, [r0], {0} | |
29 | stc p14, c6, [r1], {1} | |
30 | ldc2 5, c5, [r2], {2} | |
31 | stc2 p6, c4, [r3], {3} | |
32 | ldcl 7, c3, [r4], {4} | |
33 | stcl p8, c2, [r5], {5} | |
34 | ldc2l 9, c1, [r6], {6} | |
35 | stc2l p10, c0, [r7], {7} | |
edd40341 JB |
36 | @ using '11' below results in an (invalid) Neon vldmia instruction. |
37 | ldcl 12, c8, [r8], {255} | |
f02232aa NC |
38 | stcl p12, c9, [r9], {254} |
39 | mrrc 13, 0, r7, r0, cr4 | |
40 | mcrr p14, 0, r7, r0, cr5 | |
41 | mrrc 15, 15, r7, r0, cr15 | |
42 | mcrr p14, 15, r7, r0, cr14 | |
0bbf2aa4 NC |
43 | |
44 | # Extra instructions to allow for code alignment in arm-aout target. | |
45 | nop | |
46 | nop |