[BINUTILS, AArch64] Enable Transactional Memory Extension
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / crc32-armv8-a.d
CommitLineData
dd5181d5 1#objdump: -dr --prefix-addresses --show-raw-insn
ced40572
TP
2#name: ARMv8-A CRC32 instructions
3#source: crc32-armv8-ar.s
dd5181d5 4#as: -march=armv8-a+crc
b47b60aa 5#notarget: *-*-pe *-*-wince
dd5181d5
KT
6
7.*: *file format .*arm.*
8
9
10Disassembly of section .text:
110+0 <[^>]*> e1010042 crc32b r0, r1, r2
120+4 <[^>]*> e1210042 crc32h r0, r1, r2
130+8 <[^>]*> e1410042 crc32w r0, r1, r2
140+c <[^>]*> e1010242 crc32cb r0, r1, r2
150+10 <[^>]*> e1210242 crc32ch r0, r1, r2
160+14 <[^>]*> e1410242 crc32cw r0, r1, r2
170+18 <[^>]*> fac1 f082 crc32b r0, r1, r2
180+1c <[^>]*> fac1 f092 crc32h r0, r1, r2
190+20 <[^>]*> fac1 f0a2 crc32w r0, r1, r2
200+24 <[^>]*> fad1 f082 crc32cb r0, r1, r2
210+28 <[^>]*> fad1 f092 crc32ch r0, r1, r2
220+2c <[^>]*> fad1 f0a2 crc32cw r0, r1, r2
cc4a945a
JW
230+30 <[^>]*> e101d042 crc32b sp, r1, r2
240+34 <[^>]*> e12db042 crc32h fp, sp, r2
250+38 <[^>]*> e141004d crc32w r0, r1, sp
260+3c <[^>]*> e10d9242 crc32cb r9, sp, r2
270+40 <[^>]*> e121d248 crc32ch sp, r1, r8
280+44 <[^>]*> e141a24d crc32cw sl, r1, sp
290+48 <[^>]*> fac1 fc8d crc32b ip, r1, sp
300+4c <[^>]*> facd fa92 crc32h r5, sp, r2
310+50 <[^>]*> fac1 fda7 crc32w sp, r1, r7
320+54 <[^>]*> fadd f082 crc32cb r0, sp, r2
330+58 <[^>]*> fad5 f09d crc32ch r0, r5, sp
340+5c <[^>]*> fad1 fda9 crc32cw sp, r1, r9
This page took 0.277295 seconds and 4 git commands to generate.