Commit | Line | Data |
---|---|---|
dd5181d5 KT |
1 | #objdump: -dr --prefix-addresses --show-raw-insn |
2 | #name: Unpredictable ARMv8 CRC32 instructions. | |
3 | #as: -march=armv8-a+crc | |
4 | #stderr: crc32-bad.l | |
5 | ||
6 | .*: +file format .*arm.* | |
7 | ||
8 | ||
9 | Disassembly of section .text: | |
10 | 0+0 <[^>]*> e101f042 crc32b pc, r1, r2 ; <UNPREDICTABLE> | |
11 | 0+4 <[^>]*> e12f0042 crc32h r0, pc, r2 ; <UNPREDICTABLE> | |
12 | 0+8 <[^>]*> e141004f crc32w r0, r1, pc ; <UNPREDICTABLE> | |
13 | 0+c <[^>]*> e10f0242 crc32cb r0, pc, r2 ; <UNPREDICTABLE> | |
14 | 0+10 <[^>]*> e121f242 crc32ch pc, r1, r2 ; <UNPREDICTABLE> | |
15 | 0+14 <[^>]*> e14f0242 crc32cw r0, pc, r2 ; <UNPREDICTABLE> | |
16 | 0+18 <[^>]*> fac1 fd82 crc32b sp, r1, r2 ; <UNPREDICTABLE> | |
17 | 0+1c <[^>]*> facf f092 crc32h r0, pc, r2 ; <UNPREDICTABLE> | |
18 | 0+20 <[^>]*> fac1 f0ad crc32w r0, r1, sp ; <UNPREDICTABLE> | |
19 | 0+24 <[^>]*> fadf f082 crc32cb r0, pc, r2 ; <UNPREDICTABLE> | |
20 | 0+28 <[^>]*> fad1 fd92 crc32ch sp, r1, r2 ; <UNPREDICTABLE> | |
21 | 0+2c <[^>]*> fadf f0a2 crc32cw r0, pc, r2 ; <UNPREDICTABLE> |