Commit | Line | Data |
---|---|---|
4962c51a MS |
1 | @ LDC group relocation tests that are supposed to fail during encoding. |
2 | ||
3 | .text | |
4 | ||
5 | @ LDC/LDCL/LDC2/LDC2L/STC/STCL/STC2/STC2L | |
6 | ||
7 | .macro ldctest load store cst | |
8 | ||
9 | \load 0, c0, [r0, #:pc_g0:(f + \cst)] | |
10 | \load 0, c0, [r0, #:pc_g1:(f + \cst)] | |
11 | \load 0, c0, [r0, #:pc_g2:(f + \cst)] | |
12 | ||
13 | \load 0, c0, [r0, #:sb_g0:(f + \cst)] | |
14 | \load 0, c0, [r0, #:sb_g1:(f + \cst)] | |
15 | \load 0, c0, [r0, #:sb_g2:(f + \cst)] | |
16 | ||
17 | \store 0, c0, [r0, #:pc_g0:(f + \cst)] | |
18 | \store 0, c0, [r0, #:pc_g1:(f + \cst)] | |
19 | \store 0, c0, [r0, #:pc_g2:(f + \cst)] | |
20 | ||
21 | \store 0, c0, [r0, #:sb_g0:(f + \cst)] | |
22 | \store 0, c0, [r0, #:sb_g1:(f + \cst)] | |
23 | \store 0, c0, [r0, #:sb_g2:(f + \cst)] | |
24 | ||
25 | \load 0, c0, [r0, #:pc_g0:(f - \cst)] | |
26 | \load 0, c0, [r0, #:pc_g1:(f - \cst)] | |
27 | \load 0, c0, [r0, #:pc_g2:(f - \cst)] | |
28 | ||
29 | \load 0, c0, [r0, #:sb_g0:(f - \cst)] | |
30 | \load 0, c0, [r0, #:sb_g1:(f - \cst)] | |
31 | \load 0, c0, [r0, #:sb_g2:(f - \cst)] | |
32 | ||
33 | \store 0, c0, [r0, #:pc_g0:(f - \cst)] | |
34 | \store 0, c0, [r0, #:pc_g1:(f - \cst)] | |
35 | \store 0, c0, [r0, #:pc_g2:(f - \cst)] | |
36 | ||
37 | \store 0, c0, [r0, #:sb_g0:(f - \cst)] | |
38 | \store 0, c0, [r0, #:sb_g1:(f - \cst)] | |
39 | \store 0, c0, [r0, #:sb_g2:(f - \cst)] | |
40 | ||
41 | .endm | |
42 | ||
43 | ldctest ldc stc 0x1 | |
44 | ldctest ldcl stcl 0x1 | |
45 | ldctest ldc2 stc2 0x1 | |
46 | ldctest ldc2l stc2l 0x1 | |
47 | ||
48 | ldctest ldc stc 0x808 | |
49 | ldctest ldcl stcl 0x808 | |
50 | ldctest ldc2 stc2 0x808 | |
51 | ldctest ldc2l stc2l 0x808 | |
52 | ||
53 | @ LDFS/STFS/LDFD/STFD/LDFE/STFE/LDFP/STFP | |
54 | ||
55 | .fpu fpa | |
56 | ||
57 | .macro fpa_test load store cst | |
58 | ||
59 | \load f0, [r0, #:pc_g0:(f + \cst)] | |
60 | \load f0, [r0, #:pc_g1:(f + \cst)] | |
61 | \load f0, [r0, #:pc_g2:(f + \cst)] | |
62 | ||
63 | \load f0, [r0, #:sb_g0:(f + \cst)] | |
64 | \load f0, [r0, #:sb_g1:(f + \cst)] | |
65 | \load f0, [r0, #:sb_g2:(f + \cst)] | |
66 | ||
67 | \store f0, [r0, #:pc_g0:(f + \cst)] | |
68 | \store f0, [r0, #:pc_g1:(f + \cst)] | |
69 | \store f0, [r0, #:pc_g2:(f + \cst)] | |
70 | ||
71 | \store f0, [r0, #:sb_g0:(f + \cst)] | |
72 | \store f0, [r0, #:sb_g1:(f + \cst)] | |
73 | \store f0, [r0, #:sb_g2:(f + \cst)] | |
74 | ||
75 | \load f0, [r0, #:pc_g0:(f - \cst)] | |
76 | \load f0, [r0, #:pc_g1:(f - \cst)] | |
77 | \load f0, [r0, #:pc_g2:(f - \cst)] | |
78 | ||
79 | \load f0, [r0, #:sb_g0:(f - \cst)] | |
80 | \load f0, [r0, #:sb_g1:(f - \cst)] | |
81 | \load f0, [r0, #:sb_g2:(f - \cst)] | |
82 | ||
83 | \store f0, [r0, #:pc_g0:(f - \cst)] | |
84 | \store f0, [r0, #:pc_g1:(f - \cst)] | |
85 | \store f0, [r0, #:pc_g2:(f - \cst)] | |
86 | ||
87 | \store f0, [r0, #:sb_g0:(f - \cst)] | |
88 | \store f0, [r0, #:sb_g1:(f - \cst)] | |
89 | \store f0, [r0, #:sb_g2:(f - \cst)] | |
90 | ||
91 | .endm | |
92 | ||
93 | fpa_test ldfs stfs 0x1 | |
94 | fpa_test ldfd stfd 0x1 | |
95 | fpa_test ldfe stfe 0x1 | |
96 | fpa_test ldfp stfp 0x1 | |
97 | ||
98 | fpa_test ldfs stfs 0x808 | |
99 | fpa_test ldfd stfd 0x808 | |
100 | fpa_test ldfe stfe 0x808 | |
101 | fpa_test ldfp stfp 0x808 | |
102 | ||
103 | @ FLDS/FSTS | |
104 | ||
105 | .fpu vfp | |
106 | ||
107 | .macro vfp_test load store reg cst | |
108 | ||
109 | \load \reg, [r0, #:pc_g0:(f + \cst)] | |
110 | \load \reg, [r0, #:pc_g1:(f + \cst)] | |
111 | \load \reg, [r0, #:pc_g2:(f + \cst)] | |
112 | ||
113 | \load \reg, [r0, #:sb_g0:(f + \cst)] | |
114 | \load \reg, [r0, #:sb_g1:(f + \cst)] | |
115 | \load \reg, [r0, #:sb_g2:(f + \cst)] | |
116 | ||
117 | \store \reg, [r0, #:pc_g0:(f + \cst)] | |
118 | \store \reg, [r0, #:pc_g1:(f + \cst)] | |
119 | \store \reg, [r0, #:pc_g2:(f + \cst)] | |
120 | ||
121 | \store \reg, [r0, #:sb_g0:(f + \cst)] | |
122 | \store \reg, [r0, #:sb_g1:(f + \cst)] | |
123 | \store \reg, [r0, #:sb_g2:(f + \cst)] | |
124 | ||
125 | \load \reg, [r0, #:pc_g0:(f - \cst)] | |
126 | \load \reg, [r0, #:pc_g1:(f - \cst)] | |
127 | \load \reg, [r0, #:pc_g2:(f - \cst)] | |
128 | ||
129 | \load \reg, [r0, #:sb_g0:(f - \cst)] | |
130 | \load \reg, [r0, #:sb_g1:(f - \cst)] | |
131 | \load \reg, [r0, #:sb_g2:(f - \cst)] | |
132 | ||
133 | \store \reg, [r0, #:pc_g0:(f - \cst)] | |
134 | \store \reg, [r0, #:pc_g1:(f - \cst)] | |
135 | \store \reg, [r0, #:pc_g2:(f - \cst)] | |
136 | ||
137 | \store \reg, [r0, #:sb_g0:(f - \cst)] | |
138 | \store \reg, [r0, #:sb_g1:(f - \cst)] | |
139 | \store \reg, [r0, #:sb_g2:(f - \cst)] | |
140 | ||
141 | .endm | |
142 | ||
143 | vfp_test flds fsts s0 0x1 | |
144 | vfp_test flds fsts s0 0x808 | |
145 | ||
146 | @ FLDD/FSTD | |
147 | ||
148 | vfp_test fldd fstd d0 0x1 | |
149 | vfp_test fldd fstd d0 0x808 | |
150 | ||
151 | @ VLDR/VSTR | |
152 | ||
153 | vfp_test vldr vstr d0 0x1 | |
154 | vfp_test vldr vstr d0 0x808 | |
155 | ||
156 | @ CFLDRS/CFLDRD/CFLDR32/CFLDR64/CFSTRS/CFSTRD/CFSTR32/CFSTR64 | |
157 | ||
158 | .cpu ep9312 | |
159 | ||
160 | vfp_test cfldrs cfstrs mvf0 0x1 | |
161 | vfp_test cfldrd cfstrd mvd0 0x1 | |
162 | vfp_test cfldr32 cfstr32 mvfx0 0x1 | |
163 | vfp_test cfldr64 cfstr64 mvdx0 0x1 | |
164 | ||
165 | vfp_test cfldrs cfstrs mvf0 0x808 | |
166 | vfp_test cfldrd cfstrd mvd0 0x808 | |
167 | vfp_test cfldr32 cfstr32 mvfx0 0x808 | |
168 | vfp_test cfldr64 cfstr64 mvdx0 0x808 | |
169 |