Commit | Line | Data |
---|---|---|
23a10334 JZ |
1 | #objdump: -dr --prefix-addresses --show-raw-insn |
2 | #name: ARM load/store with pc base register | |
3 | #as: -mno-warn-deprecated | |
4 | ||
5 | # Test the standard ARM instructions: | |
6 | ||
7 | .*: +file format .*arm.* | |
8 | ||
9 | Disassembly of section .text: | |
eb9f3f00 JB |
10 | (0[0-9a-f]+) <[^>]+> e51f1008 ldr r1, \[pc, #-8\] ; \1 <[^>]*> |
11 | 0[0-9a-f]+ <[^>]+> e79f1002 ldr r1, \[pc, r2\] | |
12 | 0[0-9a-f]+ <[^>]+> e7df1002 ldrb r1, \[pc, r2\] | |
13 | 0[0-9a-f]+ <[^>]+> e18f00d2 ldrd r0, \[pc, r2\] | |
14 | 0[0-9a-f]+ <[^>]+> e19f10b2 ldrh r1, \[pc, r2\] | |
15 | 0[0-9a-f]+ <[^>]+> e19f10d2 ldrsb r1, \[pc, r2\] | |
16 | 0[0-9a-f]+ <[^>]+> e19f10f2 ldrsh r1, \[pc, r2\] | |
17 | (0[0-9a-f]+) <[^>]+> f55ff008 pld \[pc, #-8\] ; \1 <[^>]*> | |
18 | 0[0-9a-f]+ <[^>]+> f7dff001 pld \[pc, r1\] | |
19 | (0[0-9a-f]+) <[^>]+> f45ff008 pli \[pc, #-8\] ; \1 <[^>]*> | |
20 | 0[0-9a-f]+ <[^>]+> f6dff001 pli \[pc, r1\] | |
21 | 0[0-9a-f]+ <[^>]+> e58f1004 str r1, \[pc, #4\] ; 0+038 <[^>]*> | |
22 | 0[0-9a-f]+ <[^>]+> e78f1002 str r1, \[pc, r2\] | |
23 | 0[0-9a-f]+ <[^>]+> e7cf1002 strb r1, \[pc, r2\] | |
24 | 0[0-9a-f]+ <[^>]+> e18f00f2 strd r0, \[pc, r2\] | |
25 | 0[0-9a-f]+ <[^>]+> e18f10b2 strh r1, \[pc, r2\] |