Commit | Line | Data |
---|---|---|
59b42a0d MGD |
1 | # name: MSR register operands in thumb mode |
2 | # as: -march=armv7-a -mthumb | |
3 | # source: msr-reg.s | |
4 | # objdump: -dr --prefix-addresses --show-raw-insn | |
d2cd1205 | 5 | # warning: writing to APSR without specifying a bitmask is deprecated |
87c119b0 | 6 | # skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd |
59b42a0d MGD |
7 | |
8 | .*: +file format .*arm.* | |
9 | ||
10 | Disassembly of section .text: | |
d2cd1205 | 11 | 00000000 <[^>]*> f389 8800 msr CPSR_f, r9 |
59b42a0d MGD |
12 | 00000004 <[^>]*> f389 8400 msr CPSR_s, r9 |
13 | 00000008 <[^>]*> f389 8800 msr CPSR_f, r9 | |
14 | 0000000c <[^>]*> f389 8c00 msr CPSR_fs, r9 | |
15 | 00000010 <[^>]*> f389 8900 msr CPSR_fc, r9 | |
16 | 00000014 <[^>]*> f389 8400 msr CPSR_s, r9 | |
17 | 00000018 <[^>]*> f389 8800 msr CPSR_f, r9 | |
18 | 0000001c <[^>]*> f389 8100 msr CPSR_c, r9 | |
19 | 00000020 <[^>]*> f389 8200 msr CPSR_x, r9 | |
20 | 00000024 <[^>]*> f389 8c00 msr CPSR_fs, r9 | |
21 | 00000028 <[^>]*> f389 8a00 msr CPSR_fx, r9 | |
22 | 0000002c <[^>]*> f389 8900 msr CPSR_fc, r9 | |
23 | 00000030 <[^>]*> f389 8c00 msr CPSR_fs, r9 | |
24 | 00000034 <[^>]*> f389 8600 msr CPSR_sx, r9 | |
25 | 00000038 <[^>]*> f389 8500 msr CPSR_sc, r9 | |
26 | 0000003c <[^>]*> f389 8a00 msr CPSR_fx, r9 | |
27 | 00000040 <[^>]*> f389 8600 msr CPSR_sx, r9 | |
28 | 00000044 <[^>]*> f389 8300 msr CPSR_xc, r9 | |
29 | 00000048 <[^>]*> f389 8900 msr CPSR_fc, r9 | |
30 | 0000004c <[^>]*> f389 8500 msr CPSR_sc, r9 | |
31 | 00000050 <[^>]*> f389 8300 msr CPSR_xc, r9 | |
32 | 00000054 <[^>]*> f389 8e00 msr CPSR_fsx, r9 | |
33 | 00000058 <[^>]*> f389 8d00 msr CPSR_fsc, r9 | |
34 | 0000005c <[^>]*> f389 8e00 msr CPSR_fsx, r9 | |
35 | 00000060 <[^>]*> f389 8b00 msr CPSR_fxc, r9 | |
36 | 00000064 <[^>]*> f389 8d00 msr CPSR_fsc, r9 | |
37 | 00000068 <[^>]*> f389 8b00 msr CPSR_fxc, r9 | |
38 | 0000006c <[^>]*> f389 8e00 msr CPSR_fsx, r9 | |
39 | 00000070 <[^>]*> f389 8d00 msr CPSR_fsc, r9 | |
40 | 00000074 <[^>]*> f389 8e00 msr CPSR_fsx, r9 | |
41 | 00000078 <[^>]*> f389 8700 msr CPSR_sxc, r9 | |
42 | 0000007c <[^>]*> f389 8d00 msr CPSR_fsc, r9 | |
43 | 00000080 <[^>]*> f389 8700 msr CPSR_sxc, r9 | |
44 | 00000084 <[^>]*> f389 8e00 msr CPSR_fsx, r9 | |
45 | 00000088 <[^>]*> f389 8b00 msr CPSR_fxc, r9 | |
46 | 0000008c <[^>]*> f389 8e00 msr CPSR_fsx, r9 | |
47 | 00000090 <[^>]*> f389 8700 msr CPSR_sxc, r9 | |
48 | 00000094 <[^>]*> f389 8b00 msr CPSR_fxc, r9 | |
49 | 00000098 <[^>]*> f389 8700 msr CPSR_sxc, r9 | |
50 | 0000009c <[^>]*> f389 8d00 msr CPSR_fsc, r9 | |
51 | 000000a0 <[^>]*> f389 8b00 msr CPSR_fxc, r9 | |
52 | 000000a4 <[^>]*> f389 8d00 msr CPSR_fsc, r9 | |
53 | 000000a8 <[^>]*> f389 8700 msr CPSR_sxc, r9 | |
54 | 000000ac <[^>]*> f389 8b00 msr CPSR_fxc, r9 | |
55 | 000000b0 <[^>]*> f389 8700 msr CPSR_sxc, r9 | |
56 | 000000b4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
57 | 000000b8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
58 | 000000bc <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
59 | 000000c0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
60 | 000000c4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
61 | 000000c8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
62 | 000000cc <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
63 | 000000d0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
64 | 000000d4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
65 | 000000d8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
66 | 000000dc <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
67 | 000000e0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
68 | 000000e4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
69 | 000000e8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
70 | 000000ec <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
71 | 000000f0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
72 | 000000f4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
73 | 000000f8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
74 | 000000fc <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
75 | 00000100 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
76 | 00000104 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
77 | 00000108 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
78 | 0000010c <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
79 | 00000110 <[^>]*> f389 8f00 msr CPSR_fsxc, r9 | |
80 | 00000114 <[^>]*> f399 8900 msr SPSR_fc, r9 | |
81 | 00000118 <[^>]*> f399 8400 msr SPSR_s, r9 | |
82 | 0000011c <[^>]*> f399 8800 msr SPSR_f, r9 | |
83 | 00000120 <[^>]*> f399 8100 msr SPSR_c, r9 | |
84 | 00000124 <[^>]*> f399 8200 msr SPSR_x, r9 | |
85 | 00000128 <[^>]*> f399 8c00 msr SPSR_fs, r9 | |
86 | 0000012c <[^>]*> f399 8a00 msr SPSR_fx, r9 | |
87 | 00000130 <[^>]*> f399 8900 msr SPSR_fc, r9 | |
88 | 00000134 <[^>]*> f399 8c00 msr SPSR_fs, r9 | |
89 | 00000138 <[^>]*> f399 8600 msr SPSR_sx, r9 | |
90 | 0000013c <[^>]*> f399 8500 msr SPSR_sc, r9 | |
91 | 00000140 <[^>]*> f399 8a00 msr SPSR_fx, r9 | |
92 | 00000144 <[^>]*> f399 8600 msr SPSR_sx, r9 | |
93 | 00000148 <[^>]*> f399 8300 msr SPSR_xc, r9 | |
94 | 0000014c <[^>]*> f399 8900 msr SPSR_fc, r9 | |
95 | 00000150 <[^>]*> f399 8500 msr SPSR_sc, r9 | |
96 | 00000154 <[^>]*> f399 8300 msr SPSR_xc, r9 | |
97 | 00000158 <[^>]*> f399 8e00 msr SPSR_fsx, r9 | |
98 | 0000015c <[^>]*> f399 8d00 msr SPSR_fsc, r9 | |
99 | 00000160 <[^>]*> f399 8e00 msr SPSR_fsx, r9 | |
100 | 00000164 <[^>]*> f399 8b00 msr SPSR_fxc, r9 | |
101 | 00000168 <[^>]*> f399 8d00 msr SPSR_fsc, r9 | |
102 | 0000016c <[^>]*> f399 8b00 msr SPSR_fxc, r9 | |
103 | 00000170 <[^>]*> f399 8e00 msr SPSR_fsx, r9 | |
104 | 00000174 <[^>]*> f399 8d00 msr SPSR_fsc, r9 | |
105 | 00000178 <[^>]*> f399 8e00 msr SPSR_fsx, r9 | |
106 | 0000017c <[^>]*> f399 8700 msr SPSR_sxc, r9 | |
107 | 00000180 <[^>]*> f399 8d00 msr SPSR_fsc, r9 | |
108 | 00000184 <[^>]*> f399 8700 msr SPSR_sxc, r9 | |
109 | 00000188 <[^>]*> f399 8e00 msr SPSR_fsx, r9 | |
110 | 0000018c <[^>]*> f399 8b00 msr SPSR_fxc, r9 | |
111 | 00000190 <[^>]*> f399 8e00 msr SPSR_fsx, r9 | |
112 | 00000194 <[^>]*> f399 8700 msr SPSR_sxc, r9 | |
113 | 00000198 <[^>]*> f399 8b00 msr SPSR_fxc, r9 | |
114 | 0000019c <[^>]*> f399 8700 msr SPSR_sxc, r9 | |
115 | 000001a0 <[^>]*> f399 8d00 msr SPSR_fsc, r9 | |
116 | 000001a4 <[^>]*> f399 8b00 msr SPSR_fxc, r9 | |
117 | 000001a8 <[^>]*> f399 8d00 msr SPSR_fsc, r9 | |
118 | 000001ac <[^>]*> f399 8700 msr SPSR_sxc, r9 | |
119 | 000001b0 <[^>]*> f399 8b00 msr SPSR_fxc, r9 | |
120 | 000001b4 <[^>]*> f399 8700 msr SPSR_sxc, r9 | |
121 | 000001b8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
122 | 000001bc <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
123 | 000001c0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
124 | 000001c4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
125 | 000001c8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
126 | 000001cc <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
127 | 000001d0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
128 | 000001d4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
129 | 000001d8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
130 | 000001dc <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
131 | 000001e0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
132 | 000001e4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
133 | 000001e8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
134 | 000001ec <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
135 | 000001f0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
136 | 000001f4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
137 | 000001f8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
138 | 000001fc <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
139 | 00000200 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
140 | 00000204 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
141 | 00000208 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
142 | 0000020c <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
143 | 00000210 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 | |
144 | 00000214 <[^>]*> f399 8f00 msr SPSR_fsxc, r9 |