Commit | Line | Data |
---|---|---|
f5f10c66 AV |
1 | .macro cond mnem, size |
2 | .irp cond, eq, ne, gt, ge, lt, le | |
3 | it \cond | |
4 | \mnem\().u\size q0, [q1, #8] | |
5 | .endr | |
6 | .endm | |
7 | ||
8 | .syntax unified | |
9 | .thumb | |
10 | vldrw.u16 q0, [q1, #4] | |
11 | vldrw.u64 q0, [q1, #-4] | |
12 | vldrw.u32 q0, [q1, #1] | |
13 | vldrw.u32 q0, [q1, #2] | |
14 | vldrw.u32 q0, [q1, #231] | |
15 | vldrw.u32 q0, [q1, #516] | |
16 | vldrw.u32 q0, [q1, #-516] | |
17 | vldrw.u32 q0, [q0, #4] | |
18 | cond vldrw, 32 | |
19 | it eq | |
20 | vldrweq.u32 q0, [q1] | |
21 | vldrweq.u32 q0, [q1] | |
22 | vpst | |
23 | vldrweq.u32 q0, [q1] | |
24 | vldrwt.u32 q0, [q1] | |
25 | vpst | |
26 | vldrw.u32 q0, [q1] | |
27 | vldrd.u16 q0, [q1, #8] | |
28 | vldrd.u32 q0, [q1, #-8] | |
29 | vldrd.u64 q0, [q1, #1] | |
30 | vldrd.u64 q0, [q1, #4] | |
31 | vldrd.u64 q0, [q1, #7] | |
32 | vldrd.u64 q0, [q1, #228] | |
33 | vldrd.u64 q0, [q1, #1024] | |
34 | vldrd.u64 q0, [q1, #-1024] | |
35 | vldrd.u64 q0, [q0, #8] | |
36 | cond vldrd, 64 | |
37 | it eq | |
38 | vldrdeq.u64 q0, [q1] | |
39 | vldrdeq.u64 q0, [q1] | |
40 | vpst | |
41 | vldrdeq.u64 q0, [q1] | |
42 | vldrdt.u64 q0, [q1] | |
43 | vpst | |
44 | vldrd.u64 q0, [q1] |