[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vmlav-bad.l

[^:]*: Assembler messages:
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:12: Error: bad type in SIMD instruction -- `vmlav.s64 r0,q1,q2'
[^:]*:13: Error: bad type in SIMD instruction -- `vmlav.f32 r0,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vmlava.s64 r0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vmlava.f32 r0,q1,q2'
[^:]*:16: Error: bad instruction `vmlavx.s32 r0,q1,q2'
[^:]*:17: Error: bad instruction `vmlavax.s32 r0,q1,q2'
[^:]*:19: Error: syntax error -- `vmlaveq.s32 r0,q1,q2'
[^:]*:20: Error: syntax error -- `vmlaveq.s32 r0,q1,q2'
[^:]*:22: Error: syntax error -- `vmlaveq.s32 r0,q1,q2'
[^:]*:23: Error: vector predicated instruction should be in VPT/VPST block -- `vmlavt.s32 r0,q1,q2'
[^:]*:25: Error: instruction missing MVE vector predication code -- `vmlav.s32 r0,q1,q2'
[^:]*:27: Error: syntax error -- `vmlavaeq.s32 r0,q1,q2'
[^:]*:28: Error: syntax error -- `vmlavaeq.s32 r0,q1,q2'
[^:]*:30: Error: syntax error -- `vmlavaeq.s32 r0,q1,q2'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vmlavat.s32 r0,q1,q2'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vmlava.s32 r0,q1,q2'
Commit	Line	Data
a302e574 AV	1	[^:]*: Assembler messages:
	2	[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
	3	[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
	4	[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
	5	[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
	6	[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
	7	[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
	8	[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
	9	[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
	10	[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
	11	[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
	12	[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
	13	[^:]*:11: Warning: instruction is UNPREDICTABLE in an IT block
	14	[^:]*:12: Error: bad type in SIMD instruction -- `vmlav.s64 r0,q1,q2'
	15	[^:]*:13: Error: bad type in SIMD instruction -- `vmlav.f32 r0,q1,q2'
	16	[^:]*:14: Error: bad type in SIMD instruction -- `vmlava.s64 r0,q1,q2'
	17	[^:]*:15: Error: bad type in SIMD instruction -- `vmlava.f32 r0,q1,q2'
	18	[^:]*:16: Error: bad instruction `vmlavx.s32 r0,q1,q2'
	19	[^:]*:17: Error: bad instruction `vmlavax.s32 r0,q1,q2'
	20	[^:]*:19: Error: syntax error -- `vmlaveq.s32 r0,q1,q2'
	21	[^:]*:20: Error: syntax error -- `vmlaveq.s32 r0,q1,q2'
	22	[^:]*:22: Error: syntax error -- `vmlaveq.s32 r0,q1,q2'
	23	[^:]*:23: Error: vector predicated instruction should be in VPT/VPST block -- `vmlavt.s32 r0,q1,q2'
	24	[^:]*:25: Error: instruction missing MVE vector predication code -- `vmlav.s32 r0,q1,q2'
	25	[^:]*:27: Error: syntax error -- `vmlavaeq.s32 r0,q1,q2'
	26	[^:]*:28: Error: syntax error -- `vmlavaeq.s32 r0,q1,q2'
	27	[^:]*:30: Error: syntax error -- `vmlavaeq.s32 r0,q1,q2'
	28	[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vmlavat.s32 r0,q1,q2'
	29	[^:]*:33: Error: instruction missing MVE vector predication code -- `vmlava.s32 r0,q1,q2'