[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vmulh-bad.l

[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmulh.f16 q0,q1,q2'
[^:]*:11: Error: bad type in SIMD instruction -- `vmulh.i32 q0,q1,q2'
[^:]*:12: Error: bad type in SIMD instruction -- `vmulh.s64 q0,q1,q2'
[^:]*:13: Error: bad type in SIMD instruction -- `vrmulh.f16 q0,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vrmulh.i32 q0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vrmulh.s64 q0,q1,q2'
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
[^:]*:20: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
[^:]*:22: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
[^:]*:23: Error: vector predicated instruction should be in VPT/VPST block -- `vmulht.s16 q0,q1,q2'
[^:]*:25: Error: instruction missing MVE vector predication code -- `vmulh.s16 q0,q1,q2'
[^:]*:27: Error: syntax error -- `vrmulheq.s16 q0,q1,q2'
[^:]*:28: Error: syntax error -- `vrmulheq.s16 q0,q1,q2'
[^:]*:30: Error: syntax error -- `vrmulheq.s16 q0,q1,q2'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vrmulht.s16 q0,q1,q2'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vrmulh.s16 q0,q1,q2'
Commit	Line	Data
2d78f95b AV	1	[^:]*: Assembler messages:
	2	[^:]*:10: Error: bad type in SIMD instruction -- `vmulh.f16 q0,q1,q2'
	3	[^:]*:11: Error: bad type in SIMD instruction -- `vmulh.i32 q0,q1,q2'
	4	[^:]*:12: Error: bad type in SIMD instruction -- `vmulh.s64 q0,q1,q2'
	5	[^:]*:13: Error: bad type in SIMD instruction -- `vrmulh.f16 q0,q1,q2'
	6	[^:]*:14: Error: bad type in SIMD instruction -- `vrmulh.i32 q0,q1,q2'
	7	[^:]*:15: Error: bad type in SIMD instruction -- `vrmulh.s64 q0,q1,q2'
	8	[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
	9	[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
	10	[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
	11	[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
	12	[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
	13	[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
	14	[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
	15	[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
	16	[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
	17	[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
	18	[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
	19	[^:]*:17: Warning: instruction is UNPREDICTABLE in an IT block
	20	[^:]*:19: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
	21	[^:]*:20: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
	22	[^:]*:22: Error: syntax error -- `vmulheq.s16 q0,q1,q2'
	23	[^:]*:23: Error: vector predicated instruction should be in VPT/VPST block -- `vmulht.s16 q0,q1,q2'
	24	[^:]*:25: Error: instruction missing MVE vector predication code -- `vmulh.s16 q0,q1,q2'
	25	[^:]*:27: Error: syntax error -- `vrmulheq.s16 q0,q1,q2'
	26	[^:]*:28: Error: syntax error -- `vrmulheq.s16 q0,q1,q2'
	27	[^:]*:30: Error: syntax error -- `vrmulheq.s16 q0,q1,q2'
	28	[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vrmulht.s16 q0,q1,q2'
	29	[^:]*:33: Error: instruction missing MVE vector predication code -- `vrmulh.s16 q0,q1,q2'