[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vqdmladh-bad.l

[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vqdmladh.u32 q0,q1,q2'
[^:]*:11: Error: bad type in SIMD instruction -- `vqdmladh.s64 q0,q1,q2'
[^:]*:12: Error: bad type in SIMD instruction -- `vqdmladhx.u32 q0,q1,q2'
[^:]*:13: Error: bad type in SIMD instruction -- `vqdmladhx.s64 q0,q1,q2'
[^:]*:14: Error: bad type in SIMD instruction -- `vqrdmladh.u32 q0,q1,q2'
[^:]*:15: Error: bad type in SIMD instruction -- `vqrdmladh.s64 q0,q1,q2'
[^:]*:16: Error: bad type in SIMD instruction -- `vqrdmladhx.u32 q0,q1,q2'
[^:]*:17: Error: bad type in SIMD instruction -- `vqrdmladhx.s64 q0,q1,q2'
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Error: syntax error -- `vqdmladheq.s32 q0,q1,q2'
[^:]*:24: Error: syntax error -- `vqdmladheq.s32 q0,q1,q2'
[^:]*:26: Error: syntax error -- `vqdmladheq.s32 q0,q1,q2'
[^:]*:27: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmladht.s32 q0,q1,q2'
[^:]*:29: Error: instruction missing MVE vector predication code -- `vqdmladh.s32 q0,q1,q2'
[^:]*:31: Error: syntax error -- `vqdmladhxeq.s32 q0,q1,q2'
[^:]*:32: Error: syntax error -- `vqdmladhxeq.s32 q0,q1,q2'
[^:]*:34: Error: syntax error -- `vqdmladhxeq.s32 q0,q1,q2'
[^:]*:35: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmladhxt.s32 q0,q1,q2'
[^:]*:37: Error: instruction missing MVE vector predication code -- `vqdmladhx.s32 q0,q1,q2'
[^:]*:39: Error: syntax error -- `vqrdmladheq.s32 q0,q1,q2'
[^:]*:40: Error: syntax error -- `vqrdmladheq.s32 q0,q1,q2'
[^:]*:42: Error: syntax error -- `vqrdmladheq.s32 q0,q1,q2'
[^:]*:43: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmladht.s32 q0,q1,q2'
[^:]*:45: Error: instruction missing MVE vector predication code -- `vqrdmladh.s32 q0,q1,q2'
[^:]*:47: Error: syntax error -- `vqrdmladhxeq.s32 q0,q1,q2'
[^:]*:48: Error: syntax error -- `vqrdmladhxeq.s32 q0,q1,q2'
[^:]*:50: Error: syntax error -- `vqrdmladhxeq.s32 q0,q1,q2'
[^:]*:51: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmladhxt.s32 q0,q1,q2'
[^:]*:53: Error: instruction missing MVE vector predication code -- `vqrdmladhx.s32 q0,q1,q2'
Commit	Line	Data
8b8b22a4 AV	1	[^:]*: Assembler messages:
	2	[^:]*:10: Error: bad type in SIMD instruction -- `vqdmladh.u32 q0,q1,q2'
	3	[^:]*:11: Error: bad type in SIMD instruction -- `vqdmladh.s64 q0,q1,q2'
236ab0c6 BW	4	[^:]*:12: Error: bad type in SIMD instruction -- `vqdmladhx.u32 q0,q1,q2'
	5	[^:]*:13: Error: bad type in SIMD instruction -- `vqdmladhx.s64 q0,q1,q2'
	6	[^:]*:14: Error: bad type in SIMD instruction -- `vqrdmladh.u32 q0,q1,q2'
	7	[^:]*:15: Error: bad type in SIMD instruction -- `vqrdmladh.s64 q0,q1,q2'
	8	[^:]*:16: Error: bad type in SIMD instruction -- `vqrdmladhx.u32 q0,q1,q2'
	9	[^:]*:17: Error: bad type in SIMD instruction -- `vqrdmladhx.s64 q0,q1,q2'
	10	[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
	11	[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
	12	[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
	13	[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
	14	[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
	15	[^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
	16	[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
	17	[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
	18	[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
	19	[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
	20	[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
	21	[^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
	22	[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
	23	[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
	24	[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
	25	[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
	26	[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
	27	[^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
	28	[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
	29	[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
	30	[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
	31	[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
	32	[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
	33	[^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
	34	[^:]*:23: Error: syntax error -- `vqdmladheq.s32 q0,q1,q2'
	35	[^:]*:24: Error: syntax error -- `vqdmladheq.s32 q0,q1,q2'
	36	[^:]*:26: Error: syntax error -- `vqdmladheq.s32 q0,q1,q2'
	37	[^:]*:27: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmladht.s32 q0,q1,q2'
	38	[^:]*:29: Error: instruction missing MVE vector predication code -- `vqdmladh.s32 q0,q1,q2'
	39	[^:]*:31: Error: syntax error -- `vqdmladhxeq.s32 q0,q1,q2'
	40	[^:]*:32: Error: syntax error -- `vqdmladhxeq.s32 q0,q1,q2'
	41	[^:]*:34: Error: syntax error -- `vqdmladhxeq.s32 q0,q1,q2'
	42	[^:]*:35: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmladhxt.s32 q0,q1,q2'
	43	[^:]*:37: Error: instruction missing MVE vector predication code -- `vqdmladhx.s32 q0,q1,q2'
	44	[^:]*:39: Error: syntax error -- `vqrdmladheq.s32 q0,q1,q2'
	45	[^:]*:40: Error: syntax error -- `vqrdmladheq.s32 q0,q1,q2'
	46	[^:]*:42: Error: syntax error -- `vqrdmladheq.s32 q0,q1,q2'
	47	[^:]*:43: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmladht.s32 q0,q1,q2'
	48	[^:]*:45: Error: instruction missing MVE vector predication code -- `vqrdmladh.s32 q0,q1,q2'
	49	[^:]*:47: Error: syntax error -- `vqrdmladhxeq.s32 q0,q1,q2'
	50	[^:]*:48: Error: syntax error -- `vqrdmladhxeq.s32 q0,q1,q2'
	51	[^:]*:50: Error: syntax error -- `vqrdmladhxeq.s32 q0,q1,q2'
	52	[^:]*:51: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmladhxt.s32 q0,q1,q2'
	53	[^:]*:53: Error: instruction missing MVE vector predication code -- `vqrdmladhx.s32 q0,q1,q2'