projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 5150f0d8 AV |
1 | [^:]*: Assembler messages: |
| 2 | [^:]*:10: Error: bad type in SIMD instruction -- `vqshl.s64 q0,q0,#0' | |
| 3 | [^:]*:11: Error: bad type in SIMD instruction -- `vqshl.i32 q0,q0,#0' | |
| 4 | [^:]*:12: Error: immediate out of range for shift -- `vqshl.s8 q0,q1,#8' | |
| 5 | [^:]*:13: Error: immediate out of range for shift -- `vqshl.u16 q0,q1,#16' | |
| 6 | [^:]*:14: Error: immediate out of range for shift -- `vqshl.s32 q0,q1,#32' | |
| 7 | [^:]*:15: Error: bad type in SIMD instruction -- `vqshl.s64 q0,r1' | |
| 8 | [^:]*:16: Error: bad type in SIMD instruction -- `vqshl.i16 q0,r1' | |
| 9 | [^:]*:17: Warning: instruction is UNPREDICTABLE with SP operand | |
| 10 | [^:]*:18: Warning: instruction is UNPREDICTABLE with PC operand | |
| 11 | [^:]*:19: Error: bad type in SIMD instruction -- `vqshl.s64 q0,q1,q2' | |
| 12 | [^:]*:20: Error: bad type in SIMD instruction -- `vqshl.i32 q0,q1,q2' | |
| 13 | [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block | |
| 14 | [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block | |
| 15 | [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block | |
| 16 | [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block | |
| 17 | [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block | |
| 18 | [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block | |
| 19 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
| 20 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
| 21 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
| 22 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
| 23 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
| 24 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
| 25 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
| 26 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
| 27 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
| 28 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
| 29 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
| 30 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
| 31 | [^:]*:25: Error: syntax error -- `vqshleq.s16 q0,q1,#0' | |
| 32 | [^:]*:26: Error: syntax error -- `vqshleq.s16 q0,q1,#0' | |
| 33 | [^:]*:28: Error: syntax error -- `vqshleq.s16 q0,q1,#0' | |
| 34 | [^:]*:29: Error: vector predicated instruction should be in VPT/VPST block -- `vqshlt.s16 q0,q1,#0' | |
| 35 | [^:]*:31: Error: instruction missing MVE vector predication code -- `vqshl.s16 q0,q1,#0' | |
| 36 | [^:]*:33: Error: syntax error -- `vqshleq.s16 q0,r1' | |
| 37 | [^:]*:34: Error: syntax error -- `vqshleq.s16 q0,r1' | |
| 38 | [^:]*:36: Error: syntax error -- `vqshleq.s16 q0,r1' | |
| 39 | [^:]*:37: Error: vector predicated instruction should be in VPT/VPST block -- `vqshlt.s16 q0,r1' | |
| 40 | [^:]*:39: Error: instruction missing MVE vector predication code -- `vqshl.s16 q0,r1' | |
| 41 | [^:]*:41: Error: syntax error -- `vqshleq.s16 q0,q1,q2' | |
| 42 | [^:]*:42: Error: syntax error -- `vqshleq.s16 q0,q1,q2' | |
| 43 | [^:]*:44: Error: syntax error -- `vqshleq.s16 q0,q1,q2' | |
| 44 | [^:]*:45: Error: vector predicated instruction should be in VPT/VPST block -- `vqshlt.s16 q0,q1,q2' | |
| 45 | [^:]*:47: Error: instruction missing MVE vector predication code -- `vqshl.s16 q0,q1,q2' |