gdb: Convert language la_word_break_characters field to a method
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vstld-bad.l
CommitLineData
35c228db
AV
1[^:]*: Assembler messages:
2[^:]*:3: Error: register stride must be 1 -- `vst20.8 {q0,q2},\[r0\]'
3[^:]*:4: Error: syntax error -- `vst20.8 {q0,q1,q2},\[r0\]'
4[^:]*:5: Error: syntax error -- `vst20.8 {q0},\[r0\]'
5[^:]*:6: Warning: instruction is UNPREDICTABLE with PC operand
6[^:]*:7: Warning: instruction is UNPREDICTABLE with PC operand
7[^:]*:8: Warning: instruction is UNPREDICTABLE with SP operand
8[^:]*:9: Error: register stride must be 1 -- `vst20.8 {q3,q2},\[r0\]'
9[^:]*:10: Error: bad element type for instruction -- `vst20.64 {q0,q1},\[r0\]'
10[^:]*:11: Error: register stride must be 1 -- `vst21.8 {q0,q2},\[r0\]'
11[^:]*:12: Error: syntax error -- `vst21.8 {q0,q1,q2},\[r0\]'
12[^:]*:13: Error: syntax error -- `vst21.8 {q0},\[r0\]'
13[^:]*:14: Warning: instruction is UNPREDICTABLE with PC operand
14[^:]*:15: Warning: instruction is UNPREDICTABLE with PC operand
15[^:]*:16: Warning: instruction is UNPREDICTABLE with SP operand
16[^:]*:17: Error: register stride must be 1 -- `vst21.8 {q3,q2},\[r0\]'
17[^:]*:18: Error: bad element type for instruction -- `vst21.64 {q0,q1},\[r0\]'
18[^:]*:19: Error: register stride must be 1 -- `vst40.8 {q0,q2,q3,q4},\[r0\]'
19[^:]*:20: Error: register stride must be 1 -- `vst40.8 {q0,q1,q3,q4},\[r0\]'
20[^:]*:21: Error: register stride must be 1 -- `vst40.8 {q0,q1,q2,q4},\[r0\]'
21[^:]*:22: Error: register stride must be 1 -- `vst40.8 {q3,q1,q2,q3},\[r0\]'
22[^:]*:23: Error: syntax error -- `vst40.8 {q0,q1,q2,q3,q4},\[r0\]'
23[^:]*:24: Error: syntax error -- `vst40.8 {q0,q1,q2},\[r0\]'
24[^:]*:25: Error: syntax error -- `vst40.8 {q0,q1},\[r0\]'
25[^:]*:26: Error: syntax error -- `vst40.8 {q0},\[r0\]'
26[^:]*:27: Warning: instruction is UNPREDICTABLE with PC operand
27[^:]*:28: Warning: instruction is UNPREDICTABLE with PC operand
28[^:]*:29: Warning: instruction is UNPREDICTABLE with SP operand
29[^:]*:30: Error: bad element type for instruction -- `vst40.64 {q0,q1,q2,q3},\[r0\]'
30[^:]*:31: Error: register stride must be 1 -- `vst41.8 {q0,q2,q3,q4},\[r0\]'
31[^:]*:32: Error: register stride must be 1 -- `vst41.8 {q0,q1,q3,q4},\[r0\]'
32[^:]*:33: Error: register stride must be 1 -- `vst41.8 {q0,q1,q2,q4},\[r0\]'
33[^:]*:34: Error: register stride must be 1 -- `vst41.8 {q3,q1,q2,q3},\[r0\]'
34[^:]*:35: Error: syntax error -- `vst41.8 {q0,q1,q2,q3,q4},\[r0\]'
35[^:]*:36: Error: syntax error -- `vst41.8 {q0,q1,q2},\[r0\]'
36[^:]*:37: Error: syntax error -- `vst41.8 {q0,q1},\[r0\]'
37[^:]*:38: Error: syntax error -- `vst41.8 {q0},\[r0\]'
38[^:]*:39: Warning: instruction is UNPREDICTABLE with PC operand
39[^:]*:40: Warning: instruction is UNPREDICTABLE with PC operand
40[^:]*:41: Warning: instruction is UNPREDICTABLE with SP operand
41[^:]*:42: Error: bad element type for instruction -- `vst41.64 {q0,q1,q2,q3},\[r0\]'
42[^:]*:43: Error: register stride must be 1 -- `vst42.8 {q0,q2,q3,q4},\[r0\]'
43[^:]*:44: Error: register stride must be 1 -- `vst42.8 {q0,q1,q3,q4},\[r0\]'
44[^:]*:45: Error: register stride must be 1 -- `vst42.8 {q0,q1,q2,q4},\[r0\]'
45[^:]*:46: Error: register stride must be 1 -- `vst42.8 {q3,q1,q2,q3},\[r0\]'
46[^:]*:47: Error: syntax error -- `vst42.8 {q0,q1,q2,q3,q4},\[r0\]'
47[^:]*:48: Error: syntax error -- `vst42.8 {q0,q1,q2},\[r0\]'
48[^:]*:49: Error: syntax error -- `vst42.8 {q0,q1},\[r0\]'
49[^:]*:50: Error: syntax error -- `vst42.8 {q0},\[r0\]'
50[^:]*:51: Warning: instruction is UNPREDICTABLE with PC operand
51[^:]*:52: Warning: instruction is UNPREDICTABLE with PC operand
52[^:]*:53: Warning: instruction is UNPREDICTABLE with SP operand
53[^:]*:54: Error: bad element type for instruction -- `vst42.64 {q0,q1,q2,q3},\[r0\]'
54[^:]*:55: Error: register stride must be 1 -- `vst43.8 {q0,q2,q3,q4},\[r0\]'
55[^:]*:56: Error: register stride must be 1 -- `vst43.8 {q0,q1,q3,q4},\[r0\]'
56[^:]*:57: Error: register stride must be 1 -- `vst43.8 {q0,q1,q2,q4},\[r0\]'
57[^:]*:58: Error: register stride must be 1 -- `vst43.8 {q3,q1,q2,q3},\[r0\]'
58[^:]*:59: Error: syntax error -- `vst43.8 {q0,q1,q2,q3,q4},\[r0\]'
59[^:]*:60: Error: syntax error -- `vst43.8 {q0,q1,q2},\[r0\]'
60[^:]*:61: Error: syntax error -- `vst43.8 {q0,q1},\[r0\]'
61[^:]*:62: Error: syntax error -- `vst43.8 {q0},\[r0\]'
62[^:]*:63: Warning: instruction is UNPREDICTABLE with PC operand
63[^:]*:64: Warning: instruction is UNPREDICTABLE with PC operand
64[^:]*:65: Warning: instruction is UNPREDICTABLE with SP operand
65[^:]*:66: Error: bad element type for instruction -- `vst43.64 {q0,q1,q2,q3},\[r0\]'
66[^:]*:67: Error: selected processor does not support `vst1.8 {q0,q1},\[r0\]' in Thumb mode
67[^:]*:68: Error: selected processor does not support `vst2.8 {q0,q1},\[r0\]' in Thumb mode
68[^:]*:69: Error: selected processor does not support `vst3.8 {q0,q1},\[r0\]' in Thumb mode
69[^:]*:70: Error: selected processor does not support `vst4.8 {q0,q1},\[r0\]' in Thumb mode
70[^:]*:71: Error: bad instruction `vst23.32 {q0,q1},\[r0\]'
71[^:]*:72: Error: bad instruction `vst44.32 {q0,q1,q2,q3},\[r0\]'
72[^:]*:73: Error: register stride must be 1 -- `vld20.8 {q0,q2},\[r0\]'
73[^:]*:74: Error: syntax error -- `vld20.8 {q0,q1,q2},\[r0\]'
74[^:]*:75: Error: syntax error -- `vld20.8 {q0},\[r0\]'
75[^:]*:76: Warning: instruction is UNPREDICTABLE with PC operand
76[^:]*:77: Warning: instruction is UNPREDICTABLE with PC operand
77[^:]*:78: Warning: instruction is UNPREDICTABLE with SP operand
78[^:]*:79: Error: register stride must be 1 -- `vld20.8 {q3,q2},\[r0\]'
79[^:]*:80: Error: bad element type for instruction -- `vld20.64 {q0,q1},\[r0\]'
80[^:]*:81: Error: register stride must be 1 -- `vld21.8 {q0,q2},\[r0\]'
81[^:]*:82: Error: syntax error -- `vld21.8 {q0,q1,q2},\[r0\]'
82[^:]*:83: Error: syntax error -- `vld21.8 {q0},\[r0\]'
83[^:]*:84: Warning: instruction is UNPREDICTABLE with PC operand
84[^:]*:85: Warning: instruction is UNPREDICTABLE with PC operand
85[^:]*:86: Warning: instruction is UNPREDICTABLE with SP operand
86[^:]*:87: Error: register stride must be 1 -- `vld21.8 {q3,q2},\[r0\]'
87[^:]*:88: Error: bad element type for instruction -- `vld21.64 {q0,q1},\[r0\]'
88[^:]*:89: Error: register stride must be 1 -- `vld40.8 {q0,q2,q3,q4},\[r0\]'
89[^:]*:90: Error: register stride must be 1 -- `vld40.8 {q0,q1,q3,q4},\[r0\]'
90[^:]*:91: Error: register stride must be 1 -- `vld40.8 {q0,q1,q2,q4},\[r0\]'
91[^:]*:92: Error: register stride must be 1 -- `vld40.8 {q3,q1,q2,q3},\[r0\]'
92[^:]*:93: Error: syntax error -- `vld40.8 {q0,q1,q2,q3,q4},\[r0\]'
93[^:]*:94: Error: syntax error -- `vld40.8 {q0,q1,q2},\[r0\]'
94[^:]*:95: Error: syntax error -- `vld40.8 {q0,q1},\[r0\]'
95[^:]*:96: Error: syntax error -- `vld40.8 {q0},\[r0\]'
96[^:]*:97: Warning: instruction is UNPREDICTABLE with PC operand
97[^:]*:98: Warning: instruction is UNPREDICTABLE with PC operand
98[^:]*:99: Warning: instruction is UNPREDICTABLE with SP operand
99[^:]*:100: Error: bad element type for instruction -- `vld40.64 {q0,q1,q2,q3},\[r0\]'
100[^:]*:101: Error: register stride must be 1 -- `vld41.8 {q0,q2,q3,q4},\[r0\]'
101[^:]*:102: Error: register stride must be 1 -- `vld41.8 {q0,q1,q3,q4},\[r0\]'
102[^:]*:103: Error: register stride must be 1 -- `vld41.8 {q0,q1,q2,q4},\[r0\]'
103[^:]*:104: Error: register stride must be 1 -- `vld41.8 {q3,q1,q2,q3},\[r0\]'
104[^:]*:105: Error: syntax error -- `vld41.8 {q0,q1,q2,q3,q4},\[r0\]'
105[^:]*:106: Error: syntax error -- `vld41.8 {q0,q1,q2},\[r0\]'
106[^:]*:107: Error: syntax error -- `vld41.8 {q0,q1},\[r0\]'
107[^:]*:108: Error: syntax error -- `vld41.8 {q0},\[r0\]'
108[^:]*:109: Warning: instruction is UNPREDICTABLE with PC operand
109[^:]*:110: Warning: instruction is UNPREDICTABLE with PC operand
110[^:]*:111: Warning: instruction is UNPREDICTABLE with SP operand
111[^:]*:112: Error: bad element type for instruction -- `vld41.64 {q0,q1,q2,q3},\[r0\]'
112[^:]*:113: Error: register stride must be 1 -- `vld42.8 {q0,q2,q3,q4},\[r0\]'
113[^:]*:114: Error: register stride must be 1 -- `vld42.8 {q0,q1,q3,q4},\[r0\]'
114[^:]*:115: Error: register stride must be 1 -- `vld42.8 {q0,q1,q2,q4},\[r0\]'
115[^:]*:116: Error: register stride must be 1 -- `vld42.8 {q3,q1,q2,q3},\[r0\]'
116[^:]*:117: Error: syntax error -- `vld42.8 {q0,q1,q2,q3,q4},\[r0\]'
117[^:]*:118: Error: syntax error -- `vld42.8 {q0,q1,q2},\[r0\]'
118[^:]*:119: Error: syntax error -- `vld42.8 {q0,q1},\[r0\]'
119[^:]*:120: Error: syntax error -- `vld42.8 {q0},\[r0\]'
120[^:]*:121: Warning: instruction is UNPREDICTABLE with PC operand
121[^:]*:122: Warning: instruction is UNPREDICTABLE with PC operand
122[^:]*:123: Warning: instruction is UNPREDICTABLE with SP operand
123[^:]*:124: Error: bad element type for instruction -- `vld42.64 {q0,q1,q2,q3},\[r0\]'
124[^:]*:125: Error: register stride must be 1 -- `vld43.8 {q0,q2,q3,q4},\[r0\]'
125[^:]*:126: Error: register stride must be 1 -- `vld43.8 {q0,q1,q3,q4},\[r0\]'
126[^:]*:127: Error: register stride must be 1 -- `vld43.8 {q0,q1,q2,q4},\[r0\]'
127[^:]*:128: Error: register stride must be 1 -- `vld43.8 {q3,q1,q2,q3},\[r0\]'
128[^:]*:129: Error: syntax error -- `vld43.8 {q0,q1,q2,q3,q4},\[r0\]'
129[^:]*:130: Error: syntax error -- `vld43.8 {q0,q1,q2},\[r0\]'
130[^:]*:131: Error: syntax error -- `vld43.8 {q0,q1},\[r0\]'
131[^:]*:132: Error: syntax error -- `vld43.8 {q0},\[r0\]'
132[^:]*:133: Warning: instruction is UNPREDICTABLE with PC operand
133[^:]*:134: Warning: instruction is UNPREDICTABLE with PC operand
134[^:]*:135: Warning: instruction is UNPREDICTABLE with SP operand
135[^:]*:136: Error: bad element type for instruction -- `vld43.64 {q0,q1,q2,q3},\[r0\]'
136[^:]*:137: Error: selected processor does not support `vld1.8 {q0,q1},\[r0\]' in Thumb mode
137[^:]*:138: Error: selected processor does not support `vld2.8 {q0,q1},\[r0\]' in Thumb mode
138[^:]*:139: Error: selected processor does not support `vld3.8 {q0,q1},\[r0\]' in Thumb mode
139[^:]*:140: Error: selected processor does not support `vld4.8 {q0,q1},\[r0\]' in Thumb mode
140[^:]*:141: Error: bad instruction `vld23.32 {q0,q1},\[r0\]'
141[^:]*:142: Error: bad instruction `vld44.32 {q0,q1,q2,q3},\[r0\]'
142[^:]*:160: Warning: instruction is UNPREDICTABLE in an IT block
143[^:]*:160: Warning: instruction is UNPREDICTABLE in an IT block
144[^:]*:160: Warning: instruction is UNPREDICTABLE in an IT block
145[^:]*:160: Warning: instruction is UNPREDICTABLE in an IT block
146[^:]*:160: Warning: instruction is UNPREDICTABLE in an IT block
147[^:]*:160: Warning: instruction is UNPREDICTABLE in an IT block
148[^:]*:161: Warning: instruction is UNPREDICTABLE in an IT block
149[^:]*:161: Warning: instruction is UNPREDICTABLE in an IT block
150[^:]*:161: Warning: instruction is UNPREDICTABLE in an IT block
151[^:]*:161: Warning: instruction is UNPREDICTABLE in an IT block
152[^:]*:161: Warning: instruction is UNPREDICTABLE in an IT block
153[^:]*:161: Warning: instruction is UNPREDICTABLE in an IT block
154[^:]*:162: Warning: instruction is UNPREDICTABLE in an IT block
155[^:]*:162: Warning: instruction is UNPREDICTABLE in an IT block
156[^:]*:162: Warning: instruction is UNPREDICTABLE in an IT block
157[^:]*:162: Warning: instruction is UNPREDICTABLE in an IT block
158[^:]*:162: Warning: instruction is UNPREDICTABLE in an IT block
159[^:]*:162: Warning: instruction is UNPREDICTABLE in an IT block
160[^:]*:163: Warning: instruction is UNPREDICTABLE in an IT block
161[^:]*:163: Warning: instruction is UNPREDICTABLE in an IT block
162[^:]*:163: Warning: instruction is UNPREDICTABLE in an IT block
163[^:]*:163: Warning: instruction is UNPREDICTABLE in an IT block
164[^:]*:163: Warning: instruction is UNPREDICTABLE in an IT block
165[^:]*:163: Warning: instruction is UNPREDICTABLE in an IT block
166[^:]*:164: Warning: instruction is UNPREDICTABLE in an IT block
167[^:]*:164: Warning: instruction is UNPREDICTABLE in an IT block
168[^:]*:164: Warning: instruction is UNPREDICTABLE in an IT block
169[^:]*:164: Warning: instruction is UNPREDICTABLE in an IT block
170[^:]*:164: Warning: instruction is UNPREDICTABLE in an IT block
171[^:]*:164: Warning: instruction is UNPREDICTABLE in an IT block
172[^:]*:165: Warning: instruction is UNPREDICTABLE in an IT block
173[^:]*:165: Warning: instruction is UNPREDICTABLE in an IT block
174[^:]*:165: Warning: instruction is UNPREDICTABLE in an IT block
175[^:]*:165: Warning: instruction is UNPREDICTABLE in an IT block
176[^:]*:165: Warning: instruction is UNPREDICTABLE in an IT block
177[^:]*:165: Warning: instruction is UNPREDICTABLE in an IT block
178[^:]*:167: Error: syntax error -- `vst20t.32 {q0,q1},\[r0\]'
179[^:]*:168: Error: syntax error -- `vst20e.32 {q0,q1},\[r0\]'
180[^:]*:170: Error: syntax error -- `vst21t.32 {q0,q1},\[r0\]'
181[^:]*:171: Error: syntax error -- `vst21e.32 {q0,q1},\[r0\]'
182[^:]*:173: Error: syntax error -- `vst40t.32 {q0,q1,q2,q3},\[r0\]'
183[^:]*:174: Error: syntax error -- `vst40e.32 {q0,q1,q2,q3},\[r0\]'
184[^:]*:176: Error: syntax error -- `vst41t.32 {q0,q1,q2,q3},\[r0\]'
185[^:]*:177: Error: syntax error -- `vst41e.32 {q0,q1,q2,q3},\[r0\]'
186[^:]*:179: Error: syntax error -- `vst42t.32 {q0,q1,q2,q3},\[r0\]'
187[^:]*:180: Error: syntax error -- `vst42e.32 {q0,q1,q2,q3},\[r0\]'
188[^:]*:182: Error: syntax error -- `vst43t.32 {q0,q1,q2,q3},\[r0\]'
189[^:]*:183: Error: syntax error -- `vst43e.32 {q0,q1,q2,q3},\[r0\]'
190[^:]*:186: Warning: instruction is UNPREDICTABLE in a VPT block
191[^:]*:188: Warning: instruction is UNPREDICTABLE in a VPT block
192[^:]*:190: Warning: instruction is UNPREDICTABLE in a VPT block
193[^:]*:192: Warning: instruction is UNPREDICTABLE in a VPT block
194[^:]*:194: Warning: instruction is UNPREDICTABLE in a VPT block
195[^:]*:196: Warning: instruction is UNPREDICTABLE in a VPT block
196[^:]*:198: Warning: instruction is UNPREDICTABLE in an IT block
197[^:]*:198: Warning: instruction is UNPREDICTABLE in an IT block
198[^:]*:198: Warning: instruction is UNPREDICTABLE in an IT block
199[^:]*:198: Warning: instruction is UNPREDICTABLE in an IT block
200[^:]*:198: Warning: instruction is UNPREDICTABLE in an IT block
201[^:]*:198: Warning: instruction is UNPREDICTABLE in an IT block
202[^:]*:199: Warning: instruction is UNPREDICTABLE in an IT block
203[^:]*:199: Warning: instruction is UNPREDICTABLE in an IT block
204[^:]*:199: Warning: instruction is UNPREDICTABLE in an IT block
205[^:]*:199: Warning: instruction is UNPREDICTABLE in an IT block
206[^:]*:199: Warning: instruction is UNPREDICTABLE in an IT block
207[^:]*:199: Warning: instruction is UNPREDICTABLE in an IT block
208[^:]*:200: Warning: instruction is UNPREDICTABLE in an IT block
209[^:]*:200: Warning: instruction is UNPREDICTABLE in an IT block
210[^:]*:200: Warning: instruction is UNPREDICTABLE in an IT block
211[^:]*:200: Warning: instruction is UNPREDICTABLE in an IT block
212[^:]*:200: Warning: instruction is UNPREDICTABLE in an IT block
213[^:]*:200: Warning: instruction is UNPREDICTABLE in an IT block
214[^:]*:201: Warning: instruction is UNPREDICTABLE in an IT block
215[^:]*:201: Warning: instruction is UNPREDICTABLE in an IT block
216[^:]*:201: Warning: instruction is UNPREDICTABLE in an IT block
217[^:]*:201: Warning: instruction is UNPREDICTABLE in an IT block
218[^:]*:201: Warning: instruction is UNPREDICTABLE in an IT block
219[^:]*:201: Warning: instruction is UNPREDICTABLE in an IT block
220[^:]*:202: Warning: instruction is UNPREDICTABLE in an IT block
221[^:]*:202: Warning: instruction is UNPREDICTABLE in an IT block
222[^:]*:202: Warning: instruction is UNPREDICTABLE in an IT block
223[^:]*:202: Warning: instruction is UNPREDICTABLE in an IT block
224[^:]*:202: Warning: instruction is UNPREDICTABLE in an IT block
225[^:]*:202: Warning: instruction is UNPREDICTABLE in an IT block
226[^:]*:203: Warning: instruction is UNPREDICTABLE in an IT block
227[^:]*:203: Warning: instruction is UNPREDICTABLE in an IT block
228[^:]*:203: Warning: instruction is UNPREDICTABLE in an IT block
229[^:]*:203: Warning: instruction is UNPREDICTABLE in an IT block
230[^:]*:203: Warning: instruction is UNPREDICTABLE in an IT block
231[^:]*:203: Warning: instruction is UNPREDICTABLE in an IT block
232[^:]*:205: Error: syntax error -- `vld20t.32 {q0,q1},\[r0\]'
233[^:]*:206: Error: syntax error -- `vld20e.32 {q0,q1},\[r0\]'
234[^:]*:208: Error: syntax error -- `vld21t.32 {q0,q1},\[r0\]'
235[^:]*:209: Error: syntax error -- `vld21e.32 {q0,q1},\[r0\]'
236[^:]*:211: Error: syntax error -- `vld40t.32 {q0,q1,q2,q3},\[r0\]'
237[^:]*:212: Error: syntax error -- `vld40e.32 {q0,q1,q2,q3},\[r0\]'
238[^:]*:214: Error: syntax error -- `vld41t.32 {q0,q1,q2,q3},\[r0\]'
239[^:]*:215: Error: syntax error -- `vld41e.32 {q0,q1,q2,q3},\[r0\]'
240[^:]*:217: Error: syntax error -- `vld42t.32 {q0,q1,q2,q3},\[r0\]'
241[^:]*:218: Error: syntax error -- `vld42e.32 {q0,q1,q2,q3},\[r0\]'
242[^:]*:220: Error: syntax error -- `vld43t.32 {q0,q1,q2,q3},\[r0\]'
243[^:]*:221: Error: syntax error -- `vld43e.32 {q0,q1,q2,q3},\[r0\]'
244[^:]*:224: Warning: instruction is UNPREDICTABLE in a VPT block
245[^:]*:226: Warning: instruction is UNPREDICTABLE in a VPT block
246[^:]*:228: Warning: instruction is UNPREDICTABLE in a VPT block
247[^:]*:230: Warning: instruction is UNPREDICTABLE in a VPT block
248[^:]*:232: Warning: instruction is UNPREDICTABLE in a VPT block
249[^:]*:234: Warning: instruction is UNPREDICTABLE in a VPT block
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