Commit | Line | Data |
---|---|---|
b1a769ed DG |
1 | .syntax unified |
2 | ||
3 | VLD1.8 {d0}, 1f | |
4 | 1: | |
5 | VLD1.8 {D0}, R0 | |
6 | VLD1.8 {Q1}, R0 | |
7 | VLD1.8 {D0}, [PC] | |
8 | VLD1.8 {D0}, [PC, #0] | |
9 | VST1.8 {D0}, R0 | |
10 | VST1.8 {Q1}, R0 | |
11 | VST1.8 {D0}, [PC] | |
12 | VST1.8 {D0}, [PC, #0] | |
2d51fb74 JB |
13 | VST1.8 {D0[]}, [R0] |
14 | VST2.8 {D0[], D2[]}, [R0] | |
15 | VST3.16 {D0[], D1[], D2[]}, [R0] | |
16 | VST4.32 {D0[], D1[], D2[], D3[]}, [R0] | |
4f2374c7 WN |
17 | VLD1.8 {Q0}, [R0, #8] |
18 | VLD1.8 {Q0}, [R0, #8]! | |
19 | VLD1.8 {Q0}, [R0, R1] | |
20 | VLD1.8 {Q0}, [R0, R1]! | |
b1a769ed DG |
21 | .thumb |
22 | VLD1.8 {d0}, 2f | |
23 | 2: | |
24 | VLD1.8 {D0}, R0 | |
25 | VLD1.8 {Q1}, R0 | |
26 | VLD1.8 {D0}, [PC] | |
27 | VLD1.8 {D0}, [PC, #0] | |
28 | VST1.8 {D0}, R0 | |
29 | VST1.8 {Q1}, R0 | |
30 | VST1.8 {D0}, [PC] | |
31 | VST1.8 {D0}, [PC, #0] | |
cb3b1e65 JB |
32 | |
33 | VSHL.I8 d0, d0, #7 | |
34 | VSHL.I8 d0, d0, #8 | |
35 | VSHL.I16 d0, d0, #15 | |
36 | VSHL.I16 d0, d0, #16 | |
37 | VSHL.I32 d0, d0, #31 | |
38 | VSHL.I32 d0, d0, #32 | |
39 | VSHL.I64 d0, d0, #63 | |
40 | VSHL.I64 d0, d0, #64 | |
41 | ||
42 | VQSHL.S8 d0, d0, #7 | |
43 | VQSHL.S8 d0, d0, #8 | |
44 | VQSHL.S16 d0, d0, #15 | |
45 | VQSHL.S16 d0, d0, #16 | |
46 | VQSHL.S32 d0, d0, #31 | |
47 | VQSHL.S32 d0, d0, #32 | |
48 | VQSHL.S64 d0, d0, #63 | |
49 | VQSHL.S64 d0, d0, #64 | |
50 | ||
51 | VQSHLU.S8 d0, d0, #7 | |
52 | VQSHLU.S8 d0, d0, #8 | |
53 | VQSHLU.S16 d0, d0, #15 | |
54 | VQSHLU.S16 d0, d0, #16 | |
55 | VQSHLU.S32 d0, d0, #31 | |
56 | VQSHLU.S32 d0, d0, #32 | |
57 | VQSHLU.S64 d0, d0, #63 | |
58 | VQSHLU.S64 d0, d0, #64 |