Commit | Line | Data |
---|---|---|
5be8be5d DG |
1 | .syntax unified |
2 | .thumb | |
3 | ||
4 | .macro it_test opcode operands:vararg | |
5 | itt eq | |
6 | \opcode\()eq r15, \operands | |
7 | moveq r0, r0 | |
8 | .endm | |
9 | ||
10 | .macro it_testw opcode operands:vararg | |
11 | itt eq | |
12 | \opcode\()eq.w r15, \operands | |
13 | moveq r0, r0 | |
14 | .endm | |
15 | ||
16 | .macro LOAD operands:vararg | |
17 | it_test ldr, \operands | |
18 | .endm | |
19 | ||
20 | .macro LOADw operands:vararg | |
21 | it_testw ldr, \operands | |
22 | .endm | |
23 | ||
24 | @ Loads =============================================================== | |
25 | ||
26 | @ LDR (register) | |
27 | LOAD [r0] | |
28 | LOAD [r0,#0] | |
29 | LOAD [sp] | |
30 | LOAD [sp,#0] | |
31 | LOADw [r0] | |
32 | LOADw [r0,#0] | |
33 | LOAD [r0,#-4] | |
34 | LOAD [r0],#4 | |
35 | LOAD [r0,#0]! | |
36 | ||
37 | @ LDR (literal) | |
38 | LOAD label | |
39 | LOADw label | |
40 | LOADw [pc, #-0] | |
41 | ||
42 | @ LDR (register) | |
43 | LOAD [r0, r1] | |
44 | LOADw [r0, r1] | |
45 | LOADw [r0, r1, LSL #2] | |
46 | ||
47 | @ LDRB (immediate, Thumb) | |
48 | ldrb pc, [r0,#4] @ low reg | |
49 | @ldrb r0, [pc,#4] @ ALLOWED! | |
50 | ldrb.w sp, [r0,#4] @ Unpredictable | |
51 | ldrb.w pc, [r0,#4] @ => PLD | |
52 | ldrb pc, [r0, #-4] @ => PLD | |
53 | @ LDRB<c><q> <Rt>, [<Rn>, #+<imm>] => See LDRBT | |
54 | ldrb pc, [r0],#4 @ BadReg | |
55 | ldrb sp, [r0],#4 @ ditto | |
56 | ldrb pc,[r0,#4]! @ ditto | |
57 | ldrb sp,[r0,#4]! @ ditto | |
58 | ||
59 | @ LDRB (literal) | |
60 | ldrb pc,label @ => PLD | |
61 | ldrb pc,[PC,#-0] @ => PLD (special case) | |
62 | ldrb sp,label @ Unpredictable | |
63 | ldrb sp,[PC,#-0] @ ditto | |
64 | ||
65 | @ LDRB (register) | |
66 | ldrb pc,[r0,r1] @ low reg | |
67 | ldrb r0,[pc,r1] @ ditto | |
68 | ldrb r0,[r1,pc] @ ditto | |
69 | ldrb.w pc,[r0,r1,LSL #1] @ => PLD | |
70 | ldrb.w sp,[r0,r1] @ Unpredictable | |
71 | ldrb.w r2,[r0,pc,LSL #2] @ BadReg | |
72 | ldrb.w r2,[r0,sp,LSL #2] @ ditto | |
73 | ||
74 | @ LDRBT | |
75 | ldrbt pc, [r0, #4] @ BadReg | |
76 | ldrbt sp, [r0, #4] @ ditto | |
77 | ||
78 | @ LDRD (immediate) | |
79 | ldrd pc, r0, [r1] @ BadReg | |
80 | ldrd sp, r0, [r1] @ ditto | |
81 | ldrd r0, pc, [r1] @ ditto | |
82 | ldrd r0, sp, [r1] @ ditto | |
83 | ldrd pc, r0, [r1], #4 @ ditto | |
84 | ldrd sp, r0, [r1], #4 @ ditto | |
85 | ldrd r0, pc, [r1], #4 @ ditto | |
86 | ldrd r0, sp, [r1], #4 @ ditto | |
87 | ldrd pc, r0, [r1, #4]! @ ditto | |
88 | ldrd sp, r0, [r1, #4]! @ ditto | |
89 | ldrd r0, pc, [r1, #4]! @ ditto | |
90 | ldrd r0, sp, [r1, #4]! @ ditto | |
91 | ||
92 | @ LDRD (literal) | |
93 | ldrd pc, r0, label @ BadReg | |
94 | ldrd sp, r0, label @ ditto | |
95 | ldrd r0, pc, label @ ditto | |
96 | ldrd r0, sp, label @ ditto | |
97 | ldrd pc, r0, [pc, #-0] @ ditto | |
98 | ldrd sp, r0, [pc, #-0] @ ditto | |
99 | ldrd r0, pc, [pc, #-0] @ ditto | |
100 | ldrd r0, sp, [pc, #-0] @ ditto | |
101 | ||
102 | @ LDRD (register): ARM only | |
103 | ||
104 | @ LDREX/B/D/H | |
105 | ldrex pc, [r0] @ BadReg | |
106 | ldrex sp, [r0] @ ditto | |
107 | ldrex r0, [pc] @ Unpredictable | |
108 | ldrexb pc, [r0] @ BadReg | |
109 | ldrexb sp, [r0] @ ditto | |
110 | ldrexb r0, [pc] @ Unpredictable | |
111 | ldrexd pc, r0, [r1] @ BadReg | |
112 | ldrexd sp, r0, [r1] @ ditto | |
113 | ldrexd r0, pc, [r1] @ ditto | |
114 | ldrexd r0, sp, [r1] @ ditto | |
115 | ldrexd r0, r1, [pc] @ Unpredictable | |
116 | ldrexh pc, [r0] @ BadReg | |
117 | ldrexh sp, [r0] @ ditto | |
118 | ldrexh r0, [pc] @ Unpredictable | |
119 | ||
120 | @ LDRH (immediate) | |
121 | ldrh pc, [r0] @ low reg | |
122 | ldrh pc, [r0, #4] @ ditto | |
123 | @ldrh r0, [pc] @ ALLOWED! | |
124 | @ldrh r0, [pc, #4] @ ditto | |
125 | ldrh.w pc, [r0] @ => Unallocated memory hints | |
126 | ldrh.w pc, [r0, #4] @ ditto | |
127 | ldrh.w sp, [r0] @ Unpredictable | |
128 | ldrh.w sp, [r0, #4] @ ditto | |
129 | ldrh pc, [r0, #-3] @ => Unallocated memory hint | |
130 | @ LDRH<c><q> <Rt>, [<Rn>, #+<imm>] => See LDRHT | |
131 | ldrh pc,[r0],#4 @ BadReg | |
132 | ldrh sp,[r0],#4 @ ditto | |
133 | ldrh pc,[r0,#4]! @ ditto | |
134 | ldrh sp,[r0,#4]! @ ditto | |
135 | ||
136 | @ LDRH (literal) | |
137 | ldrh pc, label @ Unallocated memory hint | |
138 | ldrh pc, [pc, #-0] @ ditto | |
139 | ldrh sp, label @ Unpredictable | |
140 | ldrh sp, [pc, #-0] @ ditto | |
141 | ||
142 | @ LDRH (register) | |
143 | ldrh pc, [r0, r1] @ low reg | |
144 | ldrh r0, [pc, r1] @ ditto | |
145 | ldrh r0, [r1, pc] @ ditto | |
146 | ldrh.w pc,[r0,r1,LSL #1] @ => Unallocated memory hints | |
147 | ldrh.w sp,[r0,r1,LSL #1] @ Unpredictable | |
148 | ldrh.w r2,[r0,pc,LSL #1] @ ditto | |
149 | ldrh.w r2,[r0,sp,LSL #1] @ ditto | |
150 | ||
151 | @ LDRHT | |
152 | ldrht pc, [r0, #4] @ BadReg | |
153 | ldrht sp, [r0, #4] @ ditto | |
154 | ||
155 | @ LDRSB (immediate) | |
156 | ldrsb pc, [r0, #4] @ => PLI | |
157 | @ldrsb r0, [pc, #4] => LDRSB (literal) | |
158 | ldrsb sp, [r0, #4] @ Unpredictable | |
159 | ldrsb pc, [r0, #-4] @ => PLI | |
160 | ldrsb sp,[r0,#-4] @ BadReg | |
161 | ldrsb pc,[r0],#4 @ ditto | |
162 | ldrsb sp,[r0],#4 @ ditto | |
163 | ldrsb pc,[r0,#4]! @ ditto | |
164 | ldrsb sp,[r0,#4]! @ ditto | |
165 | ||
166 | @ LDRSB (literal) | |
167 | ldrsb pc, label @ => PLI | |
168 | ldrsb pc, [pc, #-0] @ => PLI | |
169 | ldrsb sp, label @ Unpredictable | |
170 | ldrsb sp, [pc, #-0] @ ditto | |
171 | ||
172 | @ LDRSB (register) | |
173 | ldrsb pc, [r0, r1] @ low reg | |
174 | ldrsb r0, [pc, r1] @ ditto | |
175 | ldrsb r0, [r1, pc] @ ditto | |
176 | ldrsb.w pc, [r0, r1, LSL #2] @ => PLI | |
177 | @ldrsb.w r0, [pc, r0, LSL #2] => LDRSB (literal) | |
178 | ldrsb.w sp, [r0, r1, LSL #2] @ Unpredictable | |
179 | ldrsb.w r2, [r0, pc, LSL #2] @ ditto | |
180 | ldrsb.w r2, [r0, sp, LSL #2] @ ditto | |
181 | ||
182 | @ LDRSBT | |
183 | @ldrsbt r0, [pc, #4] => LDRSB (literal) | |
184 | ldrsbt pc, [r0, #4] @ BadReg | |
185 | ldrsbt sp, [r0, #4] @ ditto | |
186 | ||
187 | @ LDRSH (immediate) | |
188 | @ldrsh r0,[pc,#4] => LDRSH (literal) | |
189 | ldrsh pc,[r0,#4] @ => Unallocated memory hints | |
190 | ldrsh sp,[r0,#4] @ Unpredictable | |
191 | ldrsh pc, [r0, #-4] @ => Unallocated memory hints | |
192 | ldrsh pc,[r0],#4 @ BadReg | |
193 | ldrsh pc,[r0,#4]! @ ditto | |
194 | ldrsh sp,[r0,#-4] @ ditto | |
195 | ldrsh sp,[r0],#4 @ ditto | |
196 | ldrsh sp,[r0,#4]! @ ditto | |
197 | ||
198 | @ LDRSH (literal) | |
199 | ldrsh pc, label @ => Unallocated memory hints | |
200 | ldrsh sp, label @ Unpredictable | |
201 | ldrsh sp, [pc,#-0] @ ditto | |
202 | ||
203 | @ LDRSH (register) | |
204 | ldrsh pc,[r0,r1] @ low reg | |
205 | ldrsh r0,[pc,r1] @ ditto | |
206 | ldrsh r0,[r1,pc] @ ditto | |
207 | @ldrsh.w r0,[pc,r1,LSL #3] => LDRSH (literal) | |
208 | ldrsh.w pc,[r0,r1,LSL #3] @ => Unallocated memory hints | |
209 | ldrsh.w sp,[r0,r1,LSL #3] @ Unpredictable | |
210 | ldrsh.w r0,[r1,sp,LSL #3] @ BadReg | |
211 | ldrsh.w r0,[r1,pc,LSL #3] @ ditto | |
212 | ||
213 | @ LDRSHT | |
214 | @ldrsht r0,[pc,#4] => LDRSH (literal) | |
215 | ldrsht pc,[r0,#4] @ BadReg | |
216 | ldrsht sp,[r0,#4] @ ditto | |
217 | ||
218 | @ LDRT | |
219 | @ldrt r0,[pc,#4] => LDR (literal) | |
220 | ldrt pc,[r0,#4] @ BadReg | |
221 | ldrt sp,[r0,#4] @ ditto | |
222 | ||
223 | @ Stores ============================================================== | |
224 | ||
225 | @ STR (immediate, Thumb) | |
226 | str pc, [r0, #4] @ Unpredictable | |
227 | str.w r0, [pc, #4] @ Undefined | |
228 | str r0, [pc, #-4] @ ditto | |
229 | str r0, [pc], #4 @ ditto | |
230 | str r0, [pc, #4]! @ ditto | |
231 | ||
232 | @ STR (register) | |
233 | str.w r0,[pc,r1] @ Undefined | |
234 | str.w r0,[pc,r1,LSL #2] @ ditto | |
235 | @str.w pc,[r0,r1{,LSL #<imm2>}] @ Unpredictable | |
236 | @str.w r1,[r0,sp{,LSL #<imm2>}] @ ditto | |
237 | @str.w r1,[r0,pc{,LSL #<imm2>}] @ ditto | |
238 | ||
239 | @ STRB (immediate, Thumb) | |
240 | strb.w r0,[pc,#4] @ Undefined | |
241 | strb.w pc,[r0,#4] @ Unpredictable | |
242 | strb.w sp,[r0,#4] @ ditto | |
243 | strb r0,[pc,#-4] @ Undefined | |
244 | strb r0,[pc],#4 @ ditto | |
245 | strb r0,[pc,#4]! @ ditto | |
246 | strb pc,[r0,#-4] @ Unpredictable | |
247 | strb pc,[r0],#4 @ ditto | |
248 | strb pc,[r0,#4]! @ ditto | |
249 | strb sp,[r0,#-4] @ ditto | |
250 | strb sp,[r0],#4 @ ditto | |
251 | strb sp,[r0,#4]! @ ditto | |
252 | ||
253 | @ STRB (register) | |
254 | strb.w r0,[pc,r1] @ Undefined | |
255 | strb.w r0,[pc,r1,LSL #2] @ ditto | |
256 | strb.w pc,[r0,r1] @ Unpredictable | |
257 | strb.w pc,[r0,r1,LSL #2] @ ditto | |
258 | strb.w sp,[r0,r1] @ ditto | |
259 | strb.w sp,[r0,r1,LSL #2] @ ditto | |
260 | strb.w r0,[r1,pc] @ ditto | |
261 | strb.w r0,[r1,pc,LSL #2] @ ditto | |
262 | strb.w r0,[r1,sp] @ ditto | |
263 | strb.w r0,[r1,sp,LSL #2] @ ditto | |
264 | ||
265 | @ STRBT | |
266 | strbt r0,[pc,#4] @ Undefined | |
267 | strbt pc,[r0,#4] @ Unpredictable | |
268 | strbt sp,[r0,#4] @ ditto | |
269 | ||
270 | @ STRD (immediate) | |
271 | strd r0,r1,[pc,#4] @ Unpredictable | |
272 | strd r0,r1,[pc],#4 @ ditto | |
273 | strd r0,r1,[pc,#4]! @ ditto | |
274 | strd pc,r0,[r1,#4] @ ditto | |
275 | strd pc,r0,[r1],#4 @ ditto | |
276 | strd pc,r0,[r1,#4]! @ ditto | |
277 | strd sp,r0,[r1,#4] @ ditto | |
278 | strd sp,r0,[r1],#4 @ ditto | |
279 | strd sp,r0,[r1,#4]! @ ditto | |
280 | strd r0,pc,[r1,#4] @ ditto | |
281 | strd r0,pc,[r1],#4 @ ditto | |
282 | strd r0,pc,[r1,#4]! @ ditto | |
283 | strd r0,sp,[r1,#4] @ ditto | |
284 | strd r0,sp,[r1],#4 @ ditto | |
285 | strd r0,sp,[r1,#4]! @ ditto | |
286 | ||
287 | @ STRD (register) | |
288 | @No thumb. | |
289 | ||
290 | @ STREX | |
291 | strex pc,r0,[r1] @ Unpredictable | |
292 | strex pc,r0,[r1,#4] @ ditto | |
293 | strex sp,r0,[r1] @ ditto | |
294 | strex sp,r0,[r1,#4] @ ditto | |
295 | strex r0,pc,[r1] @ ditto | |
296 | strex r0,pc,[r1,#4] @ ditto | |
297 | strex r0,sp,[r1] @ ditto | |
298 | strex r0,sp,[r1,#4] @ ditto | |
299 | strex r0,r1,[pc] @ ditto | |
300 | strex r0,r1,[pc,#4] @ ditto | |
301 | ||
302 | @ STREXB | |
303 | strexb pc,r0,[r1] @ Unpredictable | |
304 | strexb sp,r0,[r1] @ ditto | |
305 | strexb r0,pc,[r1] @ ditto | |
306 | strexb r0,sp,[r1] @ ditto | |
307 | strexb r0,r1,[pc] @ ditto | |
308 | ||
309 | @ STREXD | |
310 | strexd pc,r0,r1,[r2] @ Unpredictable | |
311 | strexd sp,r0,r1,[r2] @ ditto | |
312 | strexd r0,pc,r1,[r2] @ ditto | |
313 | strexd r0,sp,r1,[r2] @ ditto | |
314 | strexd r0,r1,pc,[r2] @ ditto | |
315 | strexd r0,r1,sp,[r2] @ ditto | |
316 | strexd r0,r1,r2,[pc] @ ditto | |
317 | ||
318 | @ STREXH | |
319 | strexh pc,r0,[r1] @ Unpredictable | |
320 | strexh sp,r0,[r1] @ ditto | |
321 | strexh r0,pc,[r1] @ ditto | |
322 | strexh r0,sp,[r1] @ ditto | |
323 | strexh r0,r1,[pc] @ ditto | |
324 | ||
325 | @ STRH (immediate, Thumb) | |
326 | strh.w r0,[pc] @ Undefined | |
327 | strh.w r0,[pc,#4] @ ditto | |
328 | strh r0,[pc,#-4] @ ditto | |
329 | strh r0,[pc],#4 @ ditto | |
330 | strh r0,[pc,#4]! @ ditto | |
331 | ||
332 | @ STRH (register) | |
333 | strh.w r0,[pc,r1] @ Undefined | |
334 | strh.w r0,[pc,r1,LSL #2] @ ditto | |
335 | strh.w pc,[r0,#4] @ Unpredictable | |
336 | strh.w pc,[r0] @ ditto | |
337 | strh.w sp,[r0,#4] @ ditto | |
338 | strh.w sp,[r0] @ ditto | |
339 | strh pc,[r0,#-4] @ ditto | |
340 | strh pc,[r0],#4 @ ditto | |
341 | strh pc,[r0,#4]! @ ditto | |
342 | strh sp,[r0,#-4] @ ditto | |
343 | strh sp,[r0],#4 @ ditto | |
344 | strh sp,[r0,#4]! @ ditto | |
345 | strh.w pc,[r0,r1] @ ditto | |
346 | strh.w sp,[r0,r1] @ ditto | |
347 | strh.w r0,[r1,pc] @ ditto | |
348 | strh.w r0,[r1,sp] @ ditto | |
349 | strh.w pc,[r0,r1,LSL #2] @ ditto | |
350 | strh.w sp,[r0,r1,LSL #2] @ ditto | |
351 | strh.w r0,[r1,pc,LSL #2] @ ditto | |
352 | strh.w r0,[r1,sp,LSL #2] @ ditto | |
353 | ||
354 | @ STRHT | |
355 | strht r0,[pc,#4] @ Undefined | |
356 | strht pc,[r0,#4] @ Unpredictable | |
357 | strht sp,[pc,#4] @ ditto | |
358 | ||
359 | @ STRT | |
360 | strt r0,[pc,#4] @ Undefined | |
361 | strt pc,[r0,#4] @ Unpredictable | |
362 | strt sp,[r0,#4] @ ditto | |
363 | ||
364 | @ ============================================================================ | |
365 | ||
366 | .label: | |
367 | ldr r0, [r1] |