Commit | Line | Data |
---|---|---|
bfae80f2 RE |
1 | @ VFP Instructions for v1xD variants (Single precision only) |
2 | .text | |
3 | .global F | |
4 | F: | |
5 | @ First we test the basic syntax and bit patterns of the opcodes. | |
6 | @ Most of these tests deliberatly use s0/r0 to avoid setting | |
7 | @ any more bits than necessary. | |
8 | ||
9 | @ Comparison operations | |
10 | ||
11 | fmstat | |
12 | ||
13 | fcmpes s0, s0 | |
14 | fcmpezs s0 | |
15 | fcmps s0, s0 | |
16 | fcmpzs s0 | |
17 | ||
18 | @ Monadic data operations | |
19 | ||
20 | fabss s0, s0 | |
21 | fcpys s0, s0 | |
22 | fnegs s0, s0 | |
23 | fsqrts s0, s0 | |
24 | ||
25 | @ Dyadic data operations | |
26 | ||
27 | fadds s0, s0, s0 | |
28 | fdivs s0, s0, s0 | |
29 | fmacs s0, s0, s0 | |
30 | fmscs s0, s0, s0 | |
31 | fmuls s0, s0, s0 | |
32 | fnmacs s0, s0, s0 | |
33 | fnmscs s0, s0, s0 | |
34 | fnmuls s0, s0, s0 | |
35 | fsubs s0, s0, s0 | |
36 | ||
37 | @ Load/store operations | |
38 | ||
39 | flds s0, [r0] | |
40 | fsts s0, [r0] | |
41 | ||
42 | @ Load/store multiple operations | |
43 | ||
44 | fldmias r0, {s0} | |
45 | fldmfds r0, {s0} | |
46 | fldmias r0!, {s0} | |
47 | fldmfds r0!, {s0} | |
48 | fldmdbs r0!, {s0} | |
49 | fldmeas r0!, {s0} | |
50 | ||
51 | fldmiax r0, {d0} | |
52 | fldmfdx r0, {d0} | |
53 | fldmiax r0!, {d0} | |
54 | fldmfdx r0!, {d0} | |
55 | fldmdbx r0!, {d0} | |
56 | fldmeax r0!, {d0} | |
57 | ||
58 | fstmias r0, {s0} | |
59 | fstmeas r0, {s0} | |
60 | fstmias r0!, {s0} | |
61 | fstmeas r0!, {s0} | |
62 | fstmdbs r0!, {s0} | |
63 | fstmfds r0!, {s0} | |
64 | ||
65 | fstmiax r0, {d0} | |
66 | fstmeax r0, {d0} | |
67 | fstmiax r0!, {d0} | |
68 | fstmeax r0!, {d0} | |
69 | fstmdbx r0!, {d0} | |
70 | fstmfdx r0!, {d0} | |
71 | ||
72 | @ Conversion operations | |
73 | ||
74 | fsitos s0, s0 | |
75 | fuitos s0, s0 | |
76 | ||
77 | ftosis s0, s0 | |
78 | ftosizs s0, s0 | |
79 | ftouis s0, s0 | |
80 | ftouizs s0, s0 | |
81 | ||
82 | @ ARM from VFP operations | |
83 | ||
84 | fmrs r0, s0 | |
85 | fmrx r0, fpsid | |
86 | fmrx r0, fpscr | |
87 | fmrx r0, fpexc | |
88 | ||
89 | @ VFP From ARM operations | |
90 | ||
91 | fmsr s0, r0 | |
92 | fmxr fpsid, r0 | |
93 | fmxr fpscr, r0 | |
94 | fmxr fpexc, r0 | |
95 | ||
96 | @ Now we test that the register fields are updated correctly for | |
97 | @ each class of instruction. | |
98 | ||
99 | @ Single register operations (compare-zero): | |
100 | ||
101 | fcmpzs s1 | |
102 | fcmpzs s2 | |
103 | fcmpzs s31 | |
104 | ||
105 | @ Two register comparison operations: | |
106 | ||
107 | fcmps s0, s1 | |
108 | fcmps s0, s2 | |
109 | fcmps s0, s31 | |
110 | fcmps s1, s0 | |
111 | fcmps s2, s0 | |
112 | fcmps s31, s0 | |
113 | fcmps s21, s12 | |
114 | ||
115 | @ Two register data operations (monadic) | |
116 | ||
117 | fnegs s0, s1 | |
118 | fnegs s0, s2 | |
119 | fnegs s0, s31 | |
120 | fnegs s1, s0 | |
121 | fnegs s2, s0 | |
122 | fnegs s31, s0 | |
123 | fnegs s12, s21 | |
124 | ||
125 | @ Three register data operations (dyadic) | |
126 | ||
127 | fadds s0, s0, s1 | |
128 | fadds s0, s0, s2 | |
129 | fadds s0, s0, s31 | |
130 | fadds s0, s1, s0 | |
131 | fadds s0, s2, s0 | |
132 | fadds s0, s31, s0 | |
133 | fadds s1, s0, s0 | |
134 | fadds s2, s0, s0 | |
135 | fadds s31, s0, s0 | |
136 | fadds s12, s21, s5 | |
137 | ||
138 | @ Conversion operations | |
139 | ||
140 | fsitos s0, s1 | |
141 | fsitos s0, s2 | |
142 | fsitos s0, s31 | |
143 | fsitos s1, s0 | |
144 | fsitos s2, s0 | |
145 | fsitos s31, s0 | |
146 | ||
147 | ftosis s0, s1 | |
148 | ftosis s0, s2 | |
149 | ftosis s0, s31 | |
150 | ftosis s1, s0 | |
151 | ftosis s2, s0 | |
152 | ftosis s31, s0 | |
153 | ||
154 | @ Move to VFP from ARM | |
155 | ||
156 | fmsr s0, r1 | |
157 | fmsr s0, r7 | |
158 | fmsr s0, r14 | |
159 | fmsr s1, r0 | |
160 | fmsr s2, r0 | |
161 | fmsr s31, r0 | |
162 | fmsr s21, r7 | |
163 | ||
164 | fmxr fpsid, r1 | |
165 | fmxr fpsid, r14 | |
166 | ||
167 | @ Move to ARM from VFP | |
168 | ||
169 | fmrs r0, s1 | |
170 | fmrs r0, s2 | |
171 | fmrs r0, s31 | |
172 | fmrs r1, s0 | |
173 | fmrs r7, s0 | |
174 | fmrs r14, s0 | |
175 | fmrs r9, s11 | |
176 | ||
177 | fmrx r1, fpsid | |
178 | fmrx r14, fpsid | |
179 | ||
180 | @ Load/store operations | |
181 | ||
182 | flds s0, [r1] | |
183 | flds s0, [r14] | |
184 | flds s0, [r0, #0] | |
185 | flds s0, [r0, #1020] | |
186 | flds s0, [r0, #-1020] | |
187 | flds s1, [r0] | |
188 | flds s2, [r0] | |
189 | flds s31, [r0] | |
190 | fsts s21, [r12, #804] | |
191 | ||
192 | @ Load/store multiple operations | |
193 | ||
194 | fldmias r0, {s1} | |
195 | fldmias r0, {s2} | |
196 | fldmias r0, {s31} | |
197 | fldmias r0, {s0-s1} | |
198 | fldmias r0, {s0-s2} | |
199 | fldmias r0, {s0-s31} | |
200 | fldmias r0, {s1-s31} | |
201 | fldmias r0, {s2-s31} | |
202 | fldmias r0, {s30-s31} | |
203 | fldmias r1, {s0} | |
204 | fldmias r14, {s0} | |
205 | ||
206 | fstmiax r0, {d1} | |
207 | fstmiax r0, {d2} | |
208 | fstmiax r0, {d15} | |
209 | fstmiax r0, {d0-d1} | |
210 | fstmiax r0, {d0-d2} | |
211 | fstmiax r0, {d0-d15} | |
212 | fstmiax r0, {d1-d15} | |
213 | fstmiax r0, {d2-d15} | |
214 | fstmiax r0, {d14-d15} | |
215 | fstmiax r1, {d0} | |
216 | fstmiax r14, {d0} | |
217 | ||
218 | @ Check that we assemble all the register names correctly | |
219 | ||
220 | fcmpzs s0 | |
221 | fcmpzs s1 | |
222 | fcmpzs s2 | |
223 | fcmpzs s3 | |
224 | fcmpzs s4 | |
225 | fcmpzs s5 | |
226 | fcmpzs s6 | |
227 | fcmpzs s7 | |
228 | fcmpzs s8 | |
229 | fcmpzs s9 | |
230 | fcmpzs s10 | |
231 | fcmpzs s11 | |
232 | fcmpzs s12 | |
233 | fcmpzs s13 | |
234 | fcmpzs s14 | |
235 | fcmpzs s15 | |
236 | fcmpzs s16 | |
237 | fcmpzs s17 | |
238 | fcmpzs s18 | |
239 | fcmpzs s19 | |
240 | fcmpzs s20 | |
241 | fcmpzs s21 | |
242 | fcmpzs s22 | |
243 | fcmpzs s23 | |
244 | fcmpzs s24 | |
245 | fcmpzs s25 | |
246 | fcmpzs s26 | |
247 | fcmpzs s27 | |
248 | fcmpzs s28 | |
249 | fcmpzs s29 | |
250 | fcmpzs s30 | |
251 | fcmpzs s31 | |
252 | ||
253 | @ Now we check the placement of the conditional execution substring. | |
254 | @ On VFP this is always at the end of the instruction. | |
255 | @ We use different register numbers here to check for correct | |
256 | @ disassembly | |
257 | ||
258 | @ Comparison operations | |
259 | ||
260 | fmstateq | |
261 | ||
262 | fcmpeseq s3, s7 | |
263 | fcmpezseq s5 | |
264 | fcmpseq s1, s2 | |
265 | fcmpzseq s1 | |
266 | ||
267 | @ Monadic data operations | |
268 | ||
269 | fabsseq s1, s3 | |
270 | fcpyseq s31, s19 | |
271 | fnegseq s20, s8 | |
272 | fsqrtseq s5, s7 | |
273 | ||
274 | @ Dyadic data operations | |
275 | ||
276 | faddseq s6, s5, s4 | |
277 | fdivseq s3, s2, s1 | |
278 | fmacseq s31, s30, s29 | |
279 | fmscseq s28, s27, s26 | |
280 | fmulseq s25, s24, s23 | |
281 | fnmacseq s22, s21, s20 | |
282 | fnmscseq s19, s18, s17 | |
283 | fnmulseq s16, s15, s14 | |
284 | fsubseq s13, s12, s11 | |
285 | ||
286 | @ Load/store operations | |
287 | ||
288 | fldseq s10, [r8] | |
289 | fstseq s9, [r7] | |
290 | ||
291 | @ Load/store multiple operations | |
292 | ||
293 | fldmiaseq r1, {s8} | |
294 | fldmfdseq r2, {s7} | |
295 | fldmiaseq r3!, {s6} | |
296 | fldmfdseq r4!, {s5} | |
297 | fldmdbseq r5!, {s4} | |
298 | fldmeaseq r6!, {s3} | |
299 | ||
300 | fldmiaxeq r7, {d1} | |
301 | fldmfdxeq r8, {d2} | |
302 | fldmiaxeq r9!, {d3} | |
303 | fldmfdxeq r10!, {d4} | |
304 | fldmdbxeq r11!, {d5} | |
305 | fldmeaxeq r12!, {d6} | |
306 | ||
307 | fstmiaseq r13, {s2} | |
308 | fstmeaseq r14, {s1} | |
309 | fstmiaseq r1!, {s31} | |
310 | fstmeaseq r2!, {s30} | |
311 | fstmdbseq r3!, {s29} | |
312 | fstmfdseq r4!, {s28} | |
313 | ||
314 | fstmiaxeq r5, {d7} | |
315 | fstmeaxeq r6, {d8} | |
316 | fstmiaxeq r7!, {d9} | |
317 | fstmeaxeq r8!, {d10} | |
318 | fstmdbxeq r9!, {d11} | |
319 | fstmfdxeq r10!, {d12} | |
320 | ||
321 | @ Conversion operations | |
322 | ||
323 | fsitoseq s27, s6 | |
324 | ftosiseq s25, s5 | |
325 | ftosizseq s23, s4 | |
326 | ftouiseq s21, s3 | |
327 | ftouizseq s19, s2 | |
328 | fuitoseq s17, s1 | |
329 | ||
330 | @ ARM from VFP operations | |
331 | ||
332 | fmrseq r11, s3 | |
333 | fmrxeq r9, fpsid | |
334 | ||
335 | @ VFP From ARM operations | |
336 | ||
337 | fmsreq s3, r9 | |
338 | fmxreq fpsid, r8 | |
339 |