Commit | Line | Data |
---|---|---|
ba592044 AM |
1 | # name: VFPv2 vldr to vmov |
2 | # as: -mfpu=vfpv2 | |
3 | # objdump: -dr --prefix-addresses --show-raw-insn | |
4 | ||
5 | .*: +file format .*arm.* | |
6 | ||
7 | Disassembly of section \.text: | |
8 | ||
9 | 0[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].* | |
10 | 0[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].* | |
11 | 0[0-9a-fx]+ .*00000000 .* | |
12 | 0[0-9a-fx]+ .*3fbe0000 .* | |
13 | 0[0-9a-fx]+ .*3df00000 .* | |
14 | .* | |
15 | 0[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].* | |
16 | 0[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].* | |
17 | 0[0-9a-fx]+ .*00000000 .* | |
18 | 0[0-9a-fx]+ .*bfc00000 .* | |
19 | 0[0-9a-fx]+ .*be000000 .* | |
20 | .* | |
21 | 0[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].* | |
22 | 0[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].* | |
23 | 0[0-9a-fx]+ .*00000000 .* | |
24 | 0[0-9a-fx]+ .*3fc00000 .* | |
25 | 0[0-9a-fx]+ .*3e000000 .* | |
26 | .* | |
27 | 0[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].* | |
28 | 0[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].* | |
29 | 0[0-9a-fx]+ .*00000000 .* | |
30 | 0[0-9a-fx]+ .*3fe08000 .* | |
31 | 0[0-9a-fx]+ .*3f040000 .* | |
32 | .* | |
33 | 0[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].* | |
34 | 0[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].* | |
35 | 0[0-9a-fx]+ .*00000000 .* | |
36 | 0[0-9a-fx]+ .*3fef0000 .* | |
37 | 0[0-9a-fx]+ .*3f780000 .* | |
38 | .* | |
39 | 0[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].* | |
40 | 0[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].* | |
41 | 0[0-9a-fx]+ .*00000000 .* | |
42 | 0[0-9a-fx]+ .*403f0000 .* | |
43 | 0[0-9a-fx]+ .*41f80000 .* | |
44 | .* | |
45 | 0[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].* | |
46 | 0[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].* | |
47 | 0[0-9a-fx]+ .*00000000 .* | |
48 | 0[0-9a-fx]+ .*40400000 .* | |
49 | 0[0-9a-fx]+ .*42000000 .* | |
50 | #pass |