[ARM] Make human parsing of "processor does not support instruction in mode" error...
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / vfpv3xd-ldr_immediate.d
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AM
1# name: VFPv3xd vldr to vmov
2# as: -mfpu=vfpv3xd
3# objdump: -dr --prefix-addresses --show-raw-insn
4
5.*: +file format .*arm.*
6
7Disassembly of section \.text:
8
90[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].*
100[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].*
110[0-9a-fx]+ .*00000000 .*
120[0-9a-fx]+ .*3fbe0000 .*
130[0-9a-fx]+ .*3df00000 .*
14.*
150[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].*
160[0-9a-fx]+ .*eebc0a00 (vmov\.f32|fconsts) s0, #192.*
170[0-9a-fx]+ .*00000000 .*
180[0-9a-fx]+ .*bfc00000 .*
190[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].*
200[0-9a-fx]+ .*eeb40a00 (vmov\.f32|fconsts) s0, #64.*
210[0-9a-fx]+ .*00000000 .*
220[0-9a-fx]+ .*3fc00000 .*
230[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].*
240[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].*
250[0-9a-fx]+ .*00000000 .*
260[0-9a-fx]+ .*3fe08000 .*
270[0-9a-fx]+ .*3f040000 .*
28.*
290[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].*
300[0-9a-fx]+ .*eeb60a0f (vmov\.f32|fconsts) s0, #111.*
310[0-9a-fx]+ .*00000000 .*
320[0-9a-fx]+ .*3fef0000 .*
330[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].*
340[0-9a-fx]+ .*eeb30a0f (vmov\.f32|fconsts) s0, #63.*
350[0-9a-fx]+ .*00000000 .*
360[0-9a-fx]+ .*403f0000 .*
370[0-9a-fx]+ .*ed9f0b00 vldr d0, \[pc\].*
380[0-9a-fx]+ .*ed9f0a01 vldr s0, \[pc, #4\].*
390[0-9a-fx]+ .*00000000 .*
400[0-9a-fx]+ .*40400000 .*
410[0-9a-fx]+ .*42000000 .*
42#pass
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