* gas/bfin: New testsuite for bfin.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / bfin / control_code2.s
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1\r
2.EXTERN MY_LABEL2;\r
3.section .text;\r
4\r
5//\r
6//6 CONTROL CODE BIT MANAGEMENT\r
7//\r
8\r
9//CC = Dreg == Dreg ; /* equal, register, signed (a) */\r
10CC = R7 == R0;\r
11CC = R6 == R1;\r
12CC = R0 == R7;\r
13\r
14//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */\r
15CC = R7 == -4;\r
16CC = R7 == 3;\r
17CC = R0 == -4;\r
18CC = R0 == 3;\r
19\r
20//CC = Dreg < Dreg ; /* less than, register, signed (a) */\r
21CC = R7 < R0;\r
22CC = R6 < R0;\r
23CC = R7 < R1;\r
24CC = R1 < R7;\r
25CC = R0 < R6;\r
26\r
27//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */\r
28CC = R7 < -4;\r
29CC = R6 < -4;\r
30CC = R7 < 3;\r
31CC = R1 < 3;\r
32\r
33//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */\r
34CC = R7 <= R0;\r
35CC = R6 <= R0;\r
36CC = R7 <= R1;\r
37CC = R1 <= R7;\r
38CC = R0 <= R6;\r
39\r
40//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */\r
41CC = R7 <= -4;\r
42CC = R6 <= -4;\r
43CC = R7 <= 3;\r
44CC = R1 <= 3;\r
45\r
46//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */\r
47CC = R7 < R0(IU);\r
48CC = R6 < R0(IU);\r
49CC = R7 < R1(IU);\r
50CC = R1 < R7(IU);\r
51CC = R0 < R6(IU);\r
52\r
53//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */\r
54CC = R7 < 0(IU);\r
55CC = R6 < 0(IU);\r
56CC = R7 < 7(IU);\r
57CC = R1 < 7(IU);\r
58//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */\r
59CC = R7 <= R0(IU);\r
60CC = R6 <= R0(IU);\r
61CC = R7 <= R1(IU);\r
62CC = R1 <= R7(IU);\r
63CC = R0 <= R6(IU);\r
64\r
65\r
66//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */\r
67CC = R7 <= 0(IU);\r
68CC = R6 <= 0(IU);\r
69CC = R7 <= 7(IU);\r
70CC = R1 <= 7(IU);\r
71\r
72//CC = Preg == Preg ; /* equal, register, signed (a) */\r
73CC = P5 == P0;\r
74CC = P5 == P1;\r
75CC = P0 == P2;\r
76CC = P3 == P5;\r
77\r
78//CC = Preg == imm3 ; /* equal, immediate, signed (a) */\r
79CC = P5 == -4;\r
80CC = P5 == 0;\r
81CC = P5 == 3;\r
82CC = P2 == -4;\r
83CC = P2 == 0;\r
84CC = P2 == 3;\r
85\r
86//CC = Preg < Preg ; /* less than, register, signed (a) */\r
87CC = P5 < P0;\r
88CC = P5 < P1;\r
89CC = P0 < P2;\r
90CC = P3 < P5;\r
91\r
92//CC = Preg < imm3 ; /* less than, immediate, signed (a) */\r
93CC = P5 < -4;\r
94CC = P5 < 0;\r
95CC = P5 < 3;\r
96CC = P2 < -4;\r
97CC = P2 < 0;\r
98CC = P2 < 3;\r
99\r
100\r
101//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */\r
102CC = P5 <= P0;\r
103CC = P5 <= P1;\r
104CC = P0 <= P2;\r
105CC = P3 <= P5;\r
106\r
107//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */\r
108CC = P5 <= -4;\r
109CC = P5 <= 0;\r
110CC = P5 <= 3;\r
111CC = P2 <= -4;\r
112CC = P2 <= 0;\r
113CC = P2 <= 3;\r
114\r
115//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */\r
116CC = P5 < P0(IU);\r
117CC = P5 < P1(IU);\r
118CC = P0 < P2(IU);\r
119CC = P3 < P5(IU);\r
120\r
121//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */\r
122CC = P5 < 0(IU);\r
123CC = P5 < 7(IU);\r
124CC = P2 < 0(IU);\r
125CC = P2 < 7(IU);\r
126\r
127//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */\r
128CC = P5 <= P0(IU);\r
129CC = P5 <= P1(IU);\r
130CC = P0 <= P2(IU);\r
131CC = P3 <= P5(IU);\r
132\r
133//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */\r
134CC = P5 <= 0(IU);\r
135CC = P5 <= 7(IU);\r
136CC = P2 <= 0(IU);\r
137CC = P2 <= 7(IU);\r
138\r
139CC = A0 == A1 ; /* equal, signed (a) */\r
140CC = A0 < A1 ; /* less than, Accumulator, signed (a) */\r
141CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */\r
142\r
143//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */\r
144R7 = CC;\r
145R0 = CC;\r
146\r
147//statbit = CC ; /* status bit equals CC (a) */\r
148AZ = CC;\r
149AN = CC;\r
150AC0= CC;\r
151AC1= CC;\r
152//V = CC;\r
153VS = CC; \r
154AV0= CC;\r
155AV0S= CC; \r
156AV1 = CC; \r
157AV1S= CC; \r
158AQ = CC;\r
159//statbit |= CC ; /* status bit equals status bit OR CC (a) */\r
160AZ |= CC;\r
161AN |= CC;\r
162AC0|= CC;\r
163AC1|= CC;\r
164//V |= CC;\r
165VS |= CC; \r
166AV0|= CC;\r
167AV0S|= CC; \r
168AV1 |= CC; \r
169AV1S|= CC; \r
170AQ |= CC;\r
171\r
172//statbit &= CC ; /* status bit equals status bit AND CC (a) */\r
173AZ &= CC;\r
174AN &= CC;\r
175AC0&= CC;\r
176AC1&= CC;\r
177//V &= CC;\r
178VS &= CC; \r
179AV0&= CC;\r
180AV0S&= CC; \r
181AV1 &= CC; \r
182AV1S&= CC; \r
183AQ &= CC;\r
184\r
185//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */\r
186\r
187AZ ^= CC;\r
188AN ^= CC;\r
189AC0^= CC;\r
190AC1^= CC;\r
191//V ^= CC;\r
192VS ^= CC; \r
193AV0^= CC;\r
194AV0S^= CC; \r
195AV1 ^= CC; \r
196AV1S^= CC; \r
197AQ ^= CC;\r
198//CC = Dreg ; /* CC set if the register is non-zero (a) */\r
199CC = R7;\r
200CC = R6;\r
201CC = R1;\r
202CC = R0;\r
203\r
204\r
205//CC = statbit ; /* CC equals status bit (a) */\r
206CC = AZ;\r
207CC = AN;\r
208CC = AC0;\r
209CC = AC1;\r
210//CC = V;\r
211CC = VS; \r
212CC = AV0;\r
213CC = AV0S; \r
214CC = AV1; \r
215CC = AV1S; \r
216CC = AQ;\r
217\r
218//CC |= statbit ; /* CC equals CC OR status bit (a) */\r
219CC |= AZ;\r
220CC |= AN;\r
221CC |= AC0;\r
222CC |= AC1;\r
223//CC |= V;\r
224CC |= VS; \r
225CC |= AV0;\r
226CC |= AV0S; \r
227CC |= AV1; \r
228CC |= AV1S; \r
229CC |= AQ;\r
230\r
231//CC &= statbit ; /* CC equals CC AND status bit (a) */\r
232CC &= AZ;\r
233CC &= AN;\r
234CC &= AC0;\r
235CC &= AC1;\r
236//CC &= V;\r
237CC &= VS; \r
238CC &= AV0;\r
239CC &= AV0S; \r
240CC &= AV1; \r
241CC &= AV1S; \r
242CC &= AQ;\r
243\r
244//CC ^= statbit ; /* CC equals CC XOR status bit (a) */\r
245CC ^= AZ;\r
246CC ^= AN;\r
247CC ^= AC0;\r
248CC ^= AC1;\r
249//CC ^= V;\r
250CC ^= VS; \r
251CC ^= AV0;\r
252CC ^= AV0S; \r
253CC ^= AV1; \r
254CC ^= AV1S; \r
255CC ^= AQ;\r
256\r
257CC = ! CC ; /* (a) */\r
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