Commit | Line | Data |
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c1db045b BS |
1 | |
2 | .EXTERN MY_LABEL2; | |
3 | .section .text; | |
4 | ||
5 | // | |
6 | //14 VECTOR OPERATIONS | |
7 | // | |
8 | ||
9 | //Dreg_hi = Dreg_lo = SIGN ( Dreg_hi ) * Dreg_hi + SIGN ( Dreg_lo ) * Dreg_lo ; /* (b) */ | |
10 | ||
11 | r7.h=r7.l=sign(r2.h)*r3.h+sign(r2.l)*r3.l ; | |
12 | r0.h=r0.l=sign(r1.h)*r2.h+sign(r1.l)*r2.l ; | |
13 | r3.h=r3.l=sign(r4.h)*r5.h+sign(r4.l)*r5.l ; | |
14 | r6.h=r6.l=sign(r7.h)*r0.h+sign(r7.l)*r0.l ; | |
15 | r1.h=r1.l=sign(r2.h)*r3.h+sign(r2.l)*r3.l ; | |
16 | r4.h=r4.l=sign(r5.h)*r6.h+sign(r5.l)*r6.l ; | |
17 | r7.h=r7.l=sign(r0.h)*r1.h+sign(r0.l)*r1.l ; | |
18 | r2.h=r2.l=sign(r3.h)*r4.h+sign(r3.l)*r4.l ; | |
19 | ||
20 | //Dual 16-Bit Operation | |
21 | //Dreg = VIT_MAX ( Dreg , Dreg ) (ASL) ; /* shift history bits left (b) */ | |
22 | //Dreg = VIT_MAX ( Dreg , Dreg ) (ASR) ; /* shift history bits right (b) */ | |
23 | //Single 16-Bit Operation | |
24 | //Dreg_lo = VIT_MAX ( Dreg ) (ASL) ; /* shift history bits left (b) */ | |
25 | //Dreg_lo = VIT_MAX ( Dreg ) (ASR) ; /* shift history bits right (b) */ | |
26 | r5 = vit_max(r3, r2)(asl) ; /* shift left, dual operation */ | |
27 | r7 = vit_max (r1, r0) (asr) ; /* shift right, dual operation */ | |
28 | ||
29 | r0 = vit_max(r1, r2)(asl) ; /* shift left, dual operation */ | |
30 | r3 = vit_max (r4, r5) (asr) ; /* shift right, dual operation */ | |
31 | r6 = vit_max(r7, r0)(asl) ; /* shift left, dual operation */ | |
32 | r1 = vit_max (r2, r3) (asr) ; /* shift right, dual operation */ | |
33 | r4 = vit_max(r5, r6)(asl) ; /* shift left, dual operation */ | |
34 | r7 = vit_max (r0, r1) (asr) ; /* shift right, dual operation */ | |
35 | r2 = vit_max(r3, r4)(asl) ; /* shift left, dual operation */ | |
36 | r5 = vit_max (r6, r7) (asr) ; /* shift right, dual operation */ | |
37 | ||
38 | ||
39 | r3.l = vit_max (r1)(asl) ; /* shift left, single operation */ | |
40 | r3.l = vit_max (r1)(asr) ; /* shift right, single operation */ | |
41 | ||
42 | r0.l = vit_max (r1)(asl) ; /* shift left, single operation */ | |
43 | r2.l = vit_max (r3)(asr) ; /* shift right, single operation */ | |
44 | r4.l = vit_max (r5)(asl) ; /* shift left, single operation */ | |
45 | r6.l = vit_max (r7)(asr) ; /* shift right, single operation */ | |
46 | r1.l = vit_max (r2)(asl) ; /* shift left, single operation */ | |
47 | r3.l = vit_max (r4)(asr) ; /* shift right, single operation */ | |
48 | r5.l = vit_max (r6)(asl) ; /* shift left, single operation */ | |
49 | r7.l = vit_max (r0)(asr) ; /* shift right, single operation */ | |
50 | ||
51 | //Dreg = ABS Dreg (V) ; /* (b) */ | |
52 | r3 = abs r1 (v) ; | |
53 | ||
54 | r0 = abs r0 (v) ; | |
55 | r0 = abs r1 (v) ; | |
56 | r2 = abs r3 (v) ; | |
57 | r4 = abs r5 (v) ; | |
58 | r6 = abs r7 (v) ; | |
59 | r1 = abs r0 (v) ; | |
60 | r3 = abs r2 (v) ; | |
61 | r5 = abs r4 (v) ; | |
62 | r7 = abs r6 (v) ; | |
63 | ||
64 | //Dual 16-Bit Operations | |
65 | //Dreg = Dreg +|+ Dreg (opt_mode_0) ; /* add | add (b) */ | |
66 | r5=r3 +|+ r4 ; /* dual 16-bit operations, add|add */ | |
67 | ||
68 | r0=r1 +|+ r2 ; | |
69 | r3=r4 +|+ r5 ; | |
70 | r6=r7 +|+ r0 ; | |
71 | r1=r2 +|+ r3 ; | |
72 | r4=r3 +|+ r5 ; | |
73 | r6=r3 +|+ r7 ; | |
74 | ||
75 | r0=r1 +|+ r2 (S); | |
76 | r3=r4 +|+ r5 (S); | |
77 | r6=r7 +|+ r0 (S); | |
78 | r1=r2 +|+ r3 (S); | |
79 | r4=r3 +|+ r5 (S); | |
80 | r6=r3 +|+ r7 (S); | |
81 | ||
82 | r0=r1 +|+ r2 (CO); | |
83 | r3=r4 +|+ r5 (CO); | |
84 | r6=r7 +|+ r0 (CO) ; | |
85 | r1=r2 +|+ r3 (CO); | |
86 | r4=r3 +|+ r5 (CO); | |
87 | r6=r3 +|+ r7 (CO); | |
88 | ||
89 | r0=r1 +|+ r2 (SCO); | |
90 | r3=r4 +|+ r5 (SCO); | |
91 | r6=r7 +|+ r0 (SCO); | |
92 | r1=r2 +|+ r3 (SCO); | |
93 | r4=r3 +|+ r5 (SCO); | |
94 | r6=r3 +|+ r7 (SCO); | |
95 |