Commit | Line | Data |
---|---|---|
ff1982d5 IT |
1 | # Check 32bit AVX512VL,VPCLMULQDQ WIG instructions |
2 | ||
3 | .allow_index_reg | |
4 | .text | |
5 | _start: | |
6 | vpclmulqdq $0xab, %xmm4, %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ | |
7 | vpclmulqdq $123, -123456(%esp,%esi,8), %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ | |
8 | vpclmulqdq $123, 2032(%edx), %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ Disp8 | |
9 | vpclmulqdq $0xab, %ymm2, %ymm5, %ymm3 # AVX512VL,VPCLMULQDQ | |
10 | vpclmulqdq $123, -123456(%esp,%esi,8), %ymm5, %ymm3 # AVX512VL,VPCLMULQDQ | |
11 | vpclmulqdq $123, 4064(%edx), %ymm5, %ymm3 # AVX512VL,VPCLMULQDQ Disp8 | |
12 | ||
13 | {evex} vpclmulqdq $0xab, %xmm4, %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ | |
14 | {evex} vpclmulqdq $123, -123456(%esp,%esi,8), %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ | |
15 | {evex} vpclmulqdq $123, 2032(%edx), %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ Disp8 | |
16 | {evex} vpclmulqdq $0xab, %ymm2, %ymm5, %ymm3 # AVX512VL,VPCLMULQDQ | |
17 | {evex} vpclmulqdq $123, -123456(%esp,%esi,8), %ymm5, %ymm3 # AVX512VL,VPCLMULQDQ | |
18 | {evex} vpclmulqdq $123, 4064(%edx), %ymm5, %ymm3 # AVX512VL,VPCLMULQDQ Disp8 | |
19 | ||
20 | .intel_syntax noprefix | |
21 | vpclmulqdq xmm6, xmm4, xmm1, 0xab # AVX512VL,VPCLMULQDQ | |
22 | vpclmulqdq xmm6, xmm4, XMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ | |
23 | vpclmulqdq xmm6, xmm4, XMMWORD PTR [edx+2032], 123 # AVX512VL,VPCLMULQDQ Disp8 | |
24 | vpclmulqdq ymm2, ymm4, ymm4, 0xab # AVX512VL,VPCLMULQDQ | |
25 | vpclmulqdq ymm2, ymm4, YMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ | |
26 | vpclmulqdq ymm2, ymm4, YMMWORD PTR [edx+4064], 123 # AVX512VL,VPCLMULQDQ Disp8 | |
27 | ||
28 | {evex} vpclmulqdq xmm6, xmm4, xmm1, 0xab # AVX512VL,VPCLMULQDQ | |
29 | {evex} vpclmulqdq xmm6, xmm4, XMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ | |
30 | {evex} vpclmulqdq xmm6, xmm4, XMMWORD PTR [edx+2032], 123 # AVX512VL,VPCLMULQDQ Disp8 | |
31 | {evex} vpclmulqdq ymm2, ymm4, ymm4, 0xab # AVX512VL,VPCLMULQDQ | |
32 | {evex} vpclmulqdq ymm2, ymm4, YMMWORD PTR [esp+esi*8-123456], 123 # AVX512VL,VPCLMULQDQ | |
33 | {evex} vpclmulqdq ymm2, ymm4, YMMWORD PTR [edx+4064], 123 # AVX512VL,VPCLMULQDQ Disp8 |