[deliverable/binutils-gdb.git] / gas / testsuite / gas / ia64 / opc-a-err.l

.*: Assembler messages:
.*:1: Error: Operand 2 of `adds' should be a 14-bit .*
.*:2: Error: Operand 2 of `adds' should be a 14-bit .*
.*:4: Error: Operand 2 of `addl' should be a 22-bit .*
.*:5: Error: Operand 2 of `addl' should be a 22-bit .*
.*:6: Error: Operand 3 of `addl' should be a general register r0-r3
.*:8: Error: Operand 2 of `sub' should be .*
.*:9: Error: Operand 2 of `sub' should be .*
.*:11: Error: Operand 2 of `and' should be .*
.*:12: Error: Operand 2 of `and' should be .*
.*:14: Error: Operand 2 of `or' should be .*
.*:15: Error: Operand 2 of `or' should be .*
.*:17: Error: Operand 2 of `xor' should be .*
.*:18: Error: Operand 2 of `xor' should be .*
.*:20: Error: Operand 2 of `andcm' should be .*
.*:21: Error: Operand 2 of `andcm' should be .*
.*:23: Error: Operand [34] of `cmp4.lt.or' should be r0
.*:24: Error: Operand [34] of `cmp4.lt.or' should be r0
Commit	Line	Data
800eeca4 JW	1	.*: Assembler messages:
	2	.:1: Error: Operand 2 of `adds' should be a 14-bit .
	3	.:2: Error: Operand 2 of `adds' should be a 14-bit .
	4	.:4: Error: Operand 2 of `addl' should be a 22-bit .
	5	.:5: Error: Operand 2 of `addl' should be a 22-bit .
	6	.*:6: Error: Operand 3 of `addl' should be a general register r0-r3
	7	.:8: Error: Operand 2 of `sub' should be .
	8	.:9: Error: Operand 2 of `sub' should be .
	9	.:11: Error: Operand 2 of `and' should be .
	10	.:12: Error: Operand 2 of `and' should be .
	11	.:14: Error: Operand 2 of `or' should be .
	12	.:15: Error: Operand 2 of `or' should be .
	13	.:17: Error: Operand 2 of `xor' should be .
	14	.:18: Error: Operand 2 of `xor' should be .
	15	.:20: Error: Operand 2 of `andcm' should be .
	16	.:21: Error: Operand 2 of `andcm' should be .
fa7cd6d2 L	17	.*:23: Error: Operand [34] of `cmp4.lt.or' should be r0
fa7cd6d2 L	18	.*:24: Error: Operand [34] of `cmp4.lt.or' should be r0