Commit | Line | Data |
---|---|---|
800eeca4 JW |
1 | .text |
2 | .type _start,@function | |
3 | _start: | |
4 | ||
5 | pmpyshr2 r4 = r5, r6, 0 | |
6 | pmpyshr2.u r4 = r5, r6, 16 | |
7 | ||
8 | pmpy2.r r4 = r5, r6 | |
9 | pmpy2.l r4 = r5, r6 | |
10 | ||
11 | mix1.r r4 = r5, r6 | |
12 | mix2.r r4 = r5, r6 | |
13 | mix4.r r4 = r5, r6 | |
14 | mix1.l r4 = r5, r6 | |
15 | mix2.l r4 = r5, r6 | |
16 | mix4.l r4 = r5, r6 | |
17 | ||
18 | pack2.uss r4 = r5, r6 | |
19 | pack2.sss r4 = r5, r6 | |
20 | pack4.sss r4 = r5, r6 | |
21 | ||
22 | unpack1.h r4 = r5, r6 | |
23 | unpack2.h r4 = r5, r6 | |
24 | unpack4.h r4 = r5, r6 | |
25 | unpack1.l r4 = r5, r6 | |
26 | unpack2.l r4 = r5, r6 | |
27 | unpack4.l r4 = r5, r6 | |
28 | ||
29 | pmin1.u r4 = r5, r6 | |
30 | pmax1.u r4 = r5, r6 | |
31 | ||
32 | pmin2 r4 = r5, r6 | |
33 | pmax2 r4 = r5, r6 | |
34 | ||
35 | psad1 r4 = r5, r6 | |
36 | ||
37 | mux1 r4 = r5, @rev | |
38 | mux1 r4 = r5, @mix | |
39 | mux1 r4 = r5, @shuf | |
40 | mux1 r4 = r5, @alt | |
41 | mux1 r4 = r5, @brcst | |
42 | ||
43 | mux2 r4 = r5, 0 | |
44 | mux2 r4 = r5, 0xff | |
45 | mux2 r4 = r5, 0xaa | |
46 | ||
47 | pshr2 r4 = r5, r6 | |
48 | pshr2 r4 = r5, 0 | |
49 | pshr2 r4 = r5, 8 | |
50 | pshr2 r4 = r5, 31 | |
51 | ||
52 | pshr4 r4 = r5, r6 | |
53 | pshr4 r4 = r5, 0 | |
54 | pshr4 r4 = r5, 8 | |
55 | pshr4 r4 = r5, 31 | |
56 | ||
57 | pshr2.u r4 = r5, r6 | |
58 | pshr2.u r4 = r5, 0 | |
59 | pshr2.u r4 = r5, 8 | |
60 | pshr2.u r4 = r5, 31 | |
61 | ||
62 | pshr4.u r4 = r5, r6 | |
63 | pshr4.u r4 = r5, 0 | |
64 | pshr4.u r4 = r5, 8 | |
65 | pshr4.u r4 = r5, 31 | |
66 | ||
67 | shr r4 = r5, r6 | |
68 | shr.u r4 = r5, r6 | |
69 | ||
70 | pshl2 r4 = r5, r6 | |
71 | pshl2 r4 = r5, 0 | |
72 | pshl2 r4 = r5, 8 | |
73 | pshl2 r4 = r5, 31 | |
74 | ||
75 | pshl4 r4 = r5, r6 | |
76 | pshl4 r4 = r5, 0 | |
77 | pshl4 r4 = r5, 8 | |
78 | pshl4 r4 = r5, 31 | |
79 | ||
80 | shl r4 = r5, r6 | |
81 | ||
82 | popcnt r4 = r5 | |
83 | ||
84 | shrp r4 = r5, r6, 0 | |
85 | shrp r4 = r5, r6, 12 | |
86 | shrp r4 = r5, r6, 63 | |
87 | ||
88 | extr r4 = r5, 0, 16 | |
89 | extr r4 = r5, 0, 63 | |
90 | extr r4 = r5, 10, 40 | |
91 | ||
92 | extr.u r4 = r5, 0, 16 | |
93 | extr.u r4 = r5, 0, 63 | |
94 | extr.u r4 = r5, 10, 40 | |
95 | ||
96 | dep.z r4 = r5, 0, 16 | |
97 | dep.z r4 = r5, 0, 63 | |
98 | dep.z r4 = r5, 10, 40 | |
99 | dep.z r4 = 0, 0, 16 | |
100 | dep.z r4 = 127, 0, 63 | |
101 | dep.z r4 = -128, 5, 50 | |
102 | dep.z r4 = 0x55, 10, 40 | |
103 | ||
104 | dep r4 = 0, r5, 0, 16 | |
105 | dep r4 = -1, r5, 0, 63 | |
106 | dep r4 = r5, r6, 10, 7 | |
107 | ||
108 | movl r4 = 0 | |
109 | movl r4 = 0xffffffffffffffff | |
110 | movl r4 = 0x1234567890abcdef | |
111 | ||
112 | break.i 0 | |
113 | break.i 0x1fffff | |
114 | ||
115 | nop.i 0 | |
116 | nop.i 0x1fffff | |
117 | ||
118 | chk.s.i r4, _start | |
119 | ||
120 | mov r4 = b0 | |
121 | mov b0 = r4 | |
122 | ||
123 | mov pr = r4, 0 | |
124 | mov pr = r4, 0x1234 | |
125 | mov pr = r4, 0x1ffff | |
126 | ||
127 | mov pr.rot = 0 | |
c4479208 JW |
128 | // ??? This was originally 0x3ffffff, but that generates an assembler warning |
129 | // that the testsuite infrastructure isn't set up to ignore. | |
800eeca4 JW |
130 | mov pr.rot = 0x3ff0000 |
131 | mov pr.rot = -0x4000000 | |
132 | ||
133 | zxt1 r4 = r5 | |
134 | zxt2 r4 = r5 | |
135 | zxt4 r4 = r5 | |
136 | ||
137 | sxt1 r4 = r5 | |
138 | sxt2 r4 = r5 | |
139 | sxt4 r4 = r5 | |
140 | ||
141 | czx1.l r4 = r5 | |
142 | czx2.l r4 = r5 | |
143 | czx1.r r4 = r5 | |
144 | czx2.r r4 = r5 | |
145 | ||
146 | tbit.z p2, p3 = r4, 0 | |
147 | tbit.z.unc p2, p3 = r4, 1 | |
148 | tbit.z.and p2, p3 = r4, 2 | |
149 | tbit.z.or p2, p3 = r4, 3 | |
150 | tbit.z.or.andcm p2, p3 = r4, 4 | |
151 | tbit.z.orcm p2, p3 = r4, 5 | |
152 | tbit.z.andcm p2, p3 = r4, 6 | |
153 | tbit.z.and.orcm p2, p3 = r4, 7 | |
154 | tbit.nz p2, p3 = r4, 8 | |
155 | tbit.nz.unc p2, p3 = r4, 9 | |
156 | tbit.nz.and p2, p3 = r4, 10 | |
157 | tbit.nz.or p2, p3 = r4, 11 | |
158 | tbit.nz.or.andcm p2, p3 = r4, 12 | |
159 | tbit.nz.orcm p2, p3 = r4, 13 | |
160 | tbit.nz.andcm p2, p3 = r4, 14 | |
161 | tbit.nz.and.orcm p2, p3 = r4, 15 | |
162 | ||
163 | tnat.z p2, p3 = r4 | |
164 | tnat.z.unc p2, p3 = r4 | |
165 | tnat.z.and p2, p3 = r4 | |
166 | tnat.z.or p2, p3 = r4 | |
167 | tnat.z.or.andcm p2, p3 = r4 | |
168 | tnat.z.orcm p2, p3 = r4 | |
169 | tnat.z.andcm p2, p3 = r4 | |
170 | tnat.z.and.orcm p2, p3 = r4 | |
171 | tnat.nz p2, p3 = r4 | |
172 | tnat.nz.unc p2, p3 = r4 | |
173 | tnat.nz.and p2, p3 = r4 | |
174 | tnat.nz.or p2, p3 = r4 | |
175 | tnat.nz.or.andcm p2, p3 = r4 | |
176 | tnat.nz.orcm p2, p3 = r4 | |
177 | tnat.nz.andcm p2, p3 = r4 | |
178 | tnat.nz.and.orcm p2, p3 = r4 | |
179 | ||
c4479208 JW |
180 | mov b3 = r4, .L1 |
181 | mov.imp b3 = r4, .L1 | |
182 | .space 240 | |
800eeca4 | 183 | .L1: |
c4479208 JW |
184 | mov.sptk b3 = r4, .L2 |
185 | mov.sptk.imp b3 = r4, .L2 | |
186 | .space 240 | |
800eeca4 | 187 | .L2: |
c4479208 JW |
188 | mov.dptk b3 = r4, .L3 |
189 | mov.dptk.imp b3 = r4, .L3 | |
190 | .space 240 | |
800eeca4 | 191 | .L3: |
c4479208 JW |
192 | |
193 | mov.ret b3 = r4, .L4 | |
194 | mov.ret.imp b3 = r4, .L4 | |
195 | .space 240 | |
800eeca4 | 196 | .L4: |
c4479208 JW |
197 | mov.ret.sptk b3 = r4, .L5 |
198 | mov.ret.sptk.imp b3 = r4, .L5 | |
199 | .space 240 | |
800eeca4 | 200 | .L5: |
c4479208 JW |
201 | mov.ret.dptk b3 = r4, .L6 |
202 | mov.ret.dptk.imp b3 = r4, .L6 | |
203 | .space 240 | |
800eeca4 JW |
204 | .L6: |
205 |