[AArch64] Warn on load pair to same register
[deliverable/binutils-gdb.git] / gas / testsuite / gas / ia64 / pcrel.s
CommitLineData
7b347e43
JB
1.explicit
2.global esym
3
4.altmacro
5
6.macro begin n, attr
7 .section .&n, attr, @progbits
8 .align 16
9_&n:
10.endm
11.macro end n
12 .align 16
13_e&n:
14.endm
15
16.macro m1 op, opnd1
17 .align 16
18 op opnd1 _e&op - _&op
19.endm
20.macro m2 op, opnd1
21 .align 16
22 op opnd1 @pcrel(esym)
23.endm
24.macro m3 op, opnd1
25 .align 16
26 op opnd1 esym - _&op
27.endm
28.macro m4 op, opnd1
29 .align 16
30 op opnd1 esym - .
31.endm
32.macro m5 op, opnd1
33 .align 16
34 op opnd1 esym - _e&op
35.endm
36.macro m6 op, opnd1
37 .align 16
38 op opnd1 0
39.endm
40
41begin mov, "ax"
42 m1 mov, r2 =
43 ;;
44 m2 mov, r2 =
45 ;;
46 m3 mov, r2 =
47 ;;
48 m4 mov, r2 =
49 ;;
50 m5 mov, r2 =
51 ;;
52 m6 mov, r2 =
53 ;;
54end mov
55
56begin movl, "ax"
57 m1 movl, r2 =
58 ;;
59 m2 movl, r2 =
60 ;;
61 m3 movl, r2 =
62 ;;
63 m4 movl, r2 =
64 ;;
65 m5 movl, r2 =
66 ;;
67 m6 movl, r2 =
68 ;;
69end movl
70
71begin data8, "a"
72 m1 data8
73 m2 data8
74 m3 data8
75 m4 data8
76 m5 data8
77 m6 data8
78end data8
79
80begin data4, "a"
81 m1 data4
82 m2 data4
83 m3 data4
84 m4 data4
85 m5 data4
86 m6 data4
87end data4
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