Commit | Line | Data |
---|---|---|
0f99255d AB |
1 | #as: |
2 | #objdump: -dr | |
3 | #name: allinsn | |
4 | ||
5 | .*: +file format .* | |
6 | ||
7 | ||
8 | Disassembly of section \.text: | |
9 | ||
10 | 00000000 <jmp>: | |
11 | 0: e0 01 jmp \$00002 | |
12 | 2: f0 00 jmp \$02000 | |
13 | 4: e8 00 jmp \$01000 | |
14 | 6: e7 ff jmp \$00ffe | |
15 | 8: e0 01 jmp \$00002 | |
16 | a: e5 c8 jmp \$00b90 | |
17 | c: e4 28 jmp \$00850 | |
18 | e: e5 b7 jmp \$00b6e | |
19 | ||
20 | 00000010 <call>: | |
21 | 10: c0 02 call \$00004 | |
22 | 12: d0 00 call \$02000 | |
23 | 14: c8 00 call \$01000 | |
24 | 16: c7 ff call \$00ffe | |
25 | 18: c0 01 call \$00002 | |
26 | 1a: ce 6c call \$01cd8 | |
27 | 1c: cf 9f call \$01f3e | |
28 | 1e: c9 e9 call \$013d2 | |
29 | ||
30 | 00000020 <sb>: | |
31 | 20: b2 01 sb \$01,1 | |
32 | 22: be 19 sb INTED,7 | |
33 | 24: b8 19 sb INTED,4 | |
34 | 26: b6 19 sb INTED,3 | |
35 | 28: b2 01 sb \$01,1 | |
36 | 2a: be 18 sb INTE,7 | |
37 | 2c: b2 10 sb ADDRH,1 | |
38 | 2e: bc 0c sb DPH,6 | |
39 | ||
40 | 00000030 <snb>: | |
41 | 30: a2 01 snb \$01,1 | |
42 | 32: ae 0b snb STATUS,7 | |
43 | 34: a8 38 snb \$38,4 | |
44 | 36: a6 19 snb INTED,3 | |
45 | 38: a2 01 snb \$01,1 | |
46 | 3a: aa 29 snb RCOUT,5 | |
47 | 3c: a2 3e snb \$3e,1 | |
48 | 3e: a2 2b snb LFSRA,1 | |
49 | ||
50 | 00000040 <setb>: | |
51 | 40: 92 01 setb \$01,1 | |
52 | 42: 9e 0b setb STATUS,7 | |
53 | 44: 98 38 setb \$38,4 | |
54 | 46: 96 19 setb INTED,3 | |
55 | 48: 92 01 setb \$01,1 | |
56 | 4a: 92 17 setb INTF,1 | |
57 | 4c: 9c 19 setb INTED,6 | |
58 | 4e: 96 1c setb XCFG,3 | |
59 | ||
60 | 00000050 <clrb>: | |
61 | 50: 82 01 clrb \$01,1 | |
62 | 52: 8e 0b clrb STATUS,7 | |
63 | 54: 88 38 clrb \$38,4 | |
64 | 56: 86 19 clrb INTED,3 | |
65 | 58: 82 01 clrb \$01,1 | |
66 | 5a: 8e 24 clrb RBIN,7 | |
67 | 5c: 86 0f clrb MULH,3 | |
68 | 5e: 8a 12 clrb DATAH,5 | |
69 | ||
70 | 00000060 <xorw_l>: | |
71 | 60: 7f 00 xor W,#\$00 | |
72 | 62: 7f 19 xor W,#\$19 | |
73 | 64: 7f 0c xor W,#\$0c | |
74 | 66: 7f 7b xor W,#\$7b | |
75 | 68: 7f 01 xor W,#\$01 | |
76 | 6a: 7f 14 xor W,#\$14 | |
77 | 6c: 7f 7a xor W,#\$7a | |
78 | 6e: 7f 0f xor W,#\$0f | |
79 | ||
80 | 00000070 <andw_l>: | |
81 | 70: 7e 00 and W,#\$00 | |
82 | 72: 7e 19 and W,#\$19 | |
83 | 74: 7e 0c and W,#\$0c | |
84 | 76: 7e 0c and W,#\$0c | |
85 | 78: 7e 01 and W,#\$01 | |
86 | 7a: 7e 12 and W,#\$12 | |
87 | 7c: 7e 1d and W,#\$1d | |
88 | 7e: 7e 0e and W,#\$0e | |
89 | ||
90 | 00000080 <orw_l>: | |
91 | 80: 7d 00 or W,#\$00 | |
92 | 82: 7d 19 or W,#\$19 | |
93 | 84: 7d 0c or W,#\$0c | |
94 | 86: 7d 0c or W,#\$0c | |
95 | 88: 7d 01 or W,#\$01 | |
96 | 8a: 7d 20 or W,#\$20 | |
97 | 8c: 7d 0e or W,#\$0e | |
98 | 8e: 7d 21 or W,#\$21 | |
99 | ||
100 | 00000090 <addw_l>: | |
101 | 90: 7b 00 add W,#\$00 | |
102 | 92: 7b 19 add W,#\$19 | |
103 | 94: 7b 0c add W,#\$0c | |
104 | 96: 7b 0c add W,#\$0c | |
105 | 98: 7b 01 add W,#\$01 | |
106 | 9a: 7b 15 add W,#\$15 | |
107 | 9c: 7b 18 add W,#\$18 | |
108 | 9e: 7b 2f add W,#\$2f | |
109 | ||
110 | 000000a0 <subw_l>: | |
111 | a0: 7a 00 sub W,#\$00 | |
112 | a2: 7a 19 sub W,#\$19 | |
113 | a4: 7a d4 sub W,#\$d4 | |
114 | a6: 7a 0c sub W,#\$0c | |
115 | a8: 7a 01 sub W,#\$01 | |
116 | aa: 7a 70 sub W,#\$70 | |
117 | ac: 7a 54 sub W,#\$54 | |
118 | ae: 7a e1 sub W,#\$e1 | |
119 | ||
120 | 000000b0 <cmpw_l>: | |
121 | b0: 79 00 cmp W,#\$00 | |
122 | b2: 79 19 cmp W,#\$19 | |
123 | b4: 79 0c cmp W,#\$0c | |
124 | b6: 79 0c cmp W,#\$0c | |
125 | b8: 79 01 cmp W,#\$01 | |
126 | ba: 79 0b cmp W,#\$0b | |
127 | bc: 79 0d cmp W,#\$0d | |
128 | be: 79 13 cmp W,#\$13 | |
129 | ||
130 | 000000c0 <retw_l>: | |
131 | c0: 78 00 retw #\$00 | |
132 | c2: 78 19 retw #\$19 | |
133 | c4: 78 7a retw #\$7a | |
134 | c6: 78 0c retw #\$0c | |
135 | c8: 78 01 retw #\$01 | |
136 | ca: 78 c9 retw #\$c9 | |
137 | cc: 78 0e retw #\$0e | |
138 | ce: 78 14 retw #\$14 | |
139 | ||
140 | 000000d0 <csew_l>: | |
141 | d0: 77 00 cse W,#\$00 | |
142 | d2: 77 19 cse W,#\$19 | |
143 | d4: 77 79 cse W,#\$79 | |
144 | d6: 77 7a cse W,#\$7a | |
145 | d8: 77 01 cse W,#\$01 | |
146 | da: 77 0c cse W,#\$0c | |
147 | dc: 77 e7 cse W,#\$e7 | |
148 | de: 77 15 cse W,#\$15 | |
149 | ||
150 | 000000e0 <csnew_l>: | |
151 | e0: 76 00 csne W,#\$00 | |
152 | e2: 76 19 csne W,#\$19 | |
153 | e4: 76 7a csne W,#\$7a | |
154 | e6: 76 0c csne W,#\$0c | |
155 | e8: 76 01 csne W,#\$01 | |
156 | ea: 76 16 csne W,#\$16 | |
157 | ec: 76 70 csne W,#\$70 | |
158 | ee: 76 16 csne W,#\$16 | |
159 | ||
160 | 000000f0 <push_l>: | |
161 | f0: 74 00 push #\$00 | |
162 | f2: 74 19 push #\$19 | |
163 | f4: 74 70 push #\$70 | |
164 | f6: 74 0c push #\$0c | |
165 | f8: 74 01 push #\$01 | |
166 | fa: 74 12 push #\$12 | |
167 | fc: 74 0f push #\$0f | |
168 | fe: 74 7a push #\$7a | |
169 | ||
170 | 00000100 <mulsw_l>: | |
171 | 100: 73 00 muls W,#\$00 | |
172 | 102: 73 19 muls W,#\$19 | |
173 | 104: 73 0c muls W,#\$0c | |
174 | 106: 73 0c muls W,#\$0c | |
175 | 108: 73 01 muls W,#\$01 | |
176 | 10a: 73 17 muls W,#\$17 | |
177 | 10c: 73 15 muls W,#\$15 | |
178 | 10e: 73 12 muls W,#\$12 | |
179 | ||
180 | 00000110 <muluw_l>: | |
181 | 110: 72 00 mulu W,#\$00 | |
182 | 112: 72 19 mulu W,#\$19 | |
183 | 114: 72 0c mulu W,#\$0c | |
184 | 116: 72 0c mulu W,#\$0c | |
185 | 118: 72 01 mulu W,#\$01 | |
186 | 11a: 72 0f mulu W,#\$0f | |
187 | 11c: 72 15 mulu W,#\$15 | |
188 | 11e: 72 17 mulu W,#\$17 | |
189 | ||
190 | 00000120 <loadl_l>: | |
191 | 120: 71 00 loadl #\$00 | |
192 | 122: 71 19 loadl #\$19 | |
193 | 124: 71 0c loadl #\$0c | |
194 | 126: 71 0c loadl #\$0c | |
195 | 128: 71 01 loadl #\$01 | |
196 | 12a: 71 10 loadl #\$10 | |
197 | 12c: 71 10 loadl #\$10 | |
198 | 12e: 71 15 loadl #\$15 | |
199 | ||
200 | 00000130 <loadh_l>: | |
201 | 130: 70 00 loadh #\$00 | |
202 | 132: 70 19 loadh #\$19 | |
203 | 134: 70 0c loadh #\$0c | |
204 | 136: 70 0c loadh #\$0c | |
205 | 138: 70 01 loadh #\$01 | |
206 | 13a: 70 11 loadh #\$11 | |
207 | 13c: 70 18 loadh #\$18 | |
208 | 13e: 70 18 loadh #\$18 | |
209 | ||
210 | 00000140 <loadl_a>: | |
211 | 140: 71 01 loadl #\$01 | |
212 | 142: 71 19 loadl #\$19 | |
213 | 144: 71 0c loadl #\$0c | |
214 | 146: 71 0c loadl #\$0c | |
215 | 148: 71 01 loadl #\$01 | |
216 | 14a: 71 4c loadl #\$4c | |
217 | 14c: 71 14 loadl #\$14 | |
218 | 14e: 71 34 loadl #\$34 | |
219 | ||
220 | 00000150 <loadh_a>: | |
221 | 150: 70 00 loadh #\$00 | |
222 | 152: 70 00 loadh #\$00 | |
223 | 154: 70 00 loadh #\$00 | |
224 | 156: 70 00 loadh #\$00 | |
225 | 158: 70 00 loadh #\$00 | |
226 | 15a: 70 00 loadh #\$00 | |
227 | 15c: 70 00 loadh #\$00 | |
228 | 15e: 70 00 loadh #\$00 | |
229 | ||
230 | 00000160 <addcfr_w>: | |
231 | 160: 5e 01 addc \$01,W | |
232 | 162: 5e 0b addc STATUS,W | |
233 | 164: 5e 38 addc \$38,W | |
234 | 166: 5e 19 addc INTED,W | |
235 | 168: 5e 64 addc S1TCFG,W | |
236 | 16a: 5e 22 addc RADIR,W | |
237 | 16c: 5e 32 addc REDIR,W | |
238 | 16e: 5e 18 addc INTE,W | |
239 | ||
240 | 00000170 <addcw_fr>: | |
241 | 170: 5c 01 addc W,\$01 | |
242 | 172: 5c 0b addc W,STATUS | |
243 | 174: 5c 1a addc W,FCFG | |
244 | 176: 5c 19 addc W,INTED | |
245 | 178: 5c 0a addc W,WREG | |
246 | 17a: 5c 1b addc W,TCTRL | |
247 | 17c: 5c 6f addc W,CMPCFG | |
248 | 17e: 5c 16 addc W,INTSPD | |
249 | ||
250 | 00000180 <incsnz_fr>: | |
251 | 180: 5a 03 incsnz ADDRX | |
252 | 182: 5a 0b incsnz STATUS | |
253 | 184: 5a 38 incsnz \$38 | |
254 | 186: 5a 19 incsnz INTED | |
255 | 188: 5a 01 incsnz \$01 | |
256 | 18a: 5a 32 incsnz REDIR | |
257 | 18c: 5a 25 incsnz RBOUT | |
258 | 18e: 5a 2b incsnz LFSRA | |
259 | ||
260 | 00000190 <incsnzw_fr>: | |
261 | 190: 58 01 incsnz W,\$01 | |
262 | 192: 58 0b incsnz W,STATUS | |
263 | 194: 58 1a incsnz W,FCFG | |
264 | 196: 58 19 incsnz W,INTED | |
265 | 198: 58 01 incsnz W,\$01 | |
266 | 19a: 58 21 incsnz W,RAOUT | |
267 | 19c: 58 1d incsnz W,EMCFG | |
268 | 19e: 58 18 incsnz W,INTE | |
269 | ||
270 | 000001a0 <mulsw_fr>: | |
271 | 1a0: 54 01 muls W,\$01 | |
272 | 1a2: 54 0b muls W,STATUS | |
273 | 1a4: 54 1a muls W,FCFG | |
274 | 1a6: 54 19 muls W,INTED | |
275 | 1a8: 54 01 muls W,\$01 | |
276 | 1aa: 54 17 muls W,INTF | |
277 | 1ac: 54 0d muls W,DPL | |
278 | 1ae: 54 25 muls W,RBOUT | |
279 | ||
280 | 000001b0 <muluw_fr>: | |
281 | 1b0: 50 01 mulu W,\$01 | |
282 | 1b2: 50 0b mulu W,STATUS | |
283 | 1b4: 50 1a mulu W,FCFG | |
284 | 1b6: 50 19 mulu W,INTED | |
285 | 1b8: 50 01 mulu W,\$01 | |
286 | 1ba: 50 15 mulu W,INTVECL | |
287 | 1bc: 50 15 mulu W,INTVECL | |
288 | 1be: 50 22 mulu W,RADIR | |
289 | ||
290 | 000001c0 <decsnz_fr>: | |
291 | 1c0: 4e 01 decsnz \$01 | |
292 | 1c2: 4e 0b decsnz STATUS | |
293 | 1c4: 4e 38 decsnz \$38 | |
294 | 1c6: 4e 19 decsnz INTED | |
295 | 1c8: 4e 01 decsnz \$01 | |
296 | 1ca: 4e 2b decsnz LFSRA | |
297 | 1cc: 4e 06 decsnz SPH | |
298 | 1ce: 4e 1e decsnz IPCH | |
299 | ||
300 | 000001d0 <decsnzw_fr>: | |
301 | 1d0: 4c 01 decsnz W,\$01 | |
302 | 1d2: 4c 0b decsnz W,STATUS | |
303 | 1d4: 4c 1a decsnz W,FCFG | |
304 | 1d6: 4c 19 decsnz W,INTED | |
305 | 1d8: 4c 01 decsnz W,\$01 | |
306 | 1da: 4c 18 decsnz W,INTE | |
307 | 1dc: 4c 3a decsnz W,RGDIR | |
308 | 1de: 4c 14 decsnz W,INTVECH | |
309 | ||
310 | 000001e0 <subcw_fr>: | |
311 | 1e0: 48 01 subc W,\$01 | |
312 | 1e2: 48 0b subc W,STATUS | |
313 | 1e4: 48 1a subc W,FCFG | |
314 | 1e6: 48 19 subc W,INTED | |
315 | 1e8: 48 01 subc W,\$01 | |
316 | 1ea: 48 2b subc W,LFSRA | |
317 | 1ec: 48 0d subc W,DPL | |
318 | 1ee: 48 21 subc W,RAOUT | |
319 | ||
320 | 000001f0 <subcfr_w>: | |
321 | 1f0: 4a 01 subc \$01,W | |
322 | 1f2: 4a 0b subc STATUS,W | |
323 | 1f4: 4a 38 subc \$38,W | |
324 | 1f6: 4a 19 subc INTED,W | |
325 | 1f8: 4a 01 subc \$01,W | |
326 | 1fa: 4a 0f subc MULH,W | |
327 | 1fc: 4a 15 subc INTVECL,W | |
328 | 1fe: 4a 2b subc LFSRA,W | |
329 | ||
330 | 00000200 <pop_fr>: | |
331 | 200: 46 01 pop \$01 | |
332 | 202: 46 0b pop STATUS | |
333 | 204: 46 38 pop \$38 | |
334 | 206: 46 19 pop INTED | |
335 | 208: 46 01 pop \$01 | |
336 | 20a: 46 23 pop LFSRH | |
337 | 20c: 46 0a pop WREG | |
338 | 20e: 46 0d pop DPL | |
339 | ||
340 | 00000210 <push_fr>: | |
341 | 210: 44 01 push \$01 | |
342 | 212: 44 0b push STATUS | |
343 | 214: 44 38 push \$38 | |
344 | 216: 44 19 push INTED | |
345 | 218: 44 01 push \$01 | |
346 | 21a: 44 1a push FCFG | |
347 | 21c: 44 0d push DPL | |
348 | 21e: 44 0d push DPL | |
349 | ||
350 | 00000220 <csew_fr>: | |
351 | 220: 42 01 cse W,\$01 | |
352 | 222: 42 0b cse W,STATUS | |
353 | 224: 42 1a cse W,FCFG | |
354 | 226: 42 19 cse W,INTED | |
355 | 228: 42 01 cse W,\$01 | |
356 | 22a: 42 1b cse W,TCTRL | |
357 | 22c: 42 0f cse W,MULH | |
358 | 22e: 42 57 cse W,T2CAP1L | |
359 | ||
360 | 00000230 <csnew_fr>: | |
361 | 230: 40 02 csne W,ADDRSEL | |
362 | 232: 40 0b csne W,STATUS | |
363 | 234: 40 1a csne W,FCFG | |
364 | 236: 40 19 csne W,INTED | |
365 | 238: 40 01 csne W,\$01 | |
366 | 23a: 40 27 csne W,LFSRL | |
367 | 23c: 40 11 csne W,ADDRL | |
368 | 23e: 40 2b csne W,LFSRA | |
369 | ||
370 | 00000240 <incsz_fr>: | |
371 | 240: 3e 01 incsz \$01 | |
372 | 242: 3e 0b incsz STATUS | |
373 | 244: 3e 38 incsz \$38 | |
374 | 246: 3e 19 incsz INTED | |
375 | 248: 3e 01 incsz \$01 | |
376 | 24a: 3e 2d incsz RDOUT | |
377 | 24c: 3e 18 incsz INTE | |
378 | 24e: 3e 4d incsz T1CFG1L | |
379 | ||
380 | 00000250 <incszw_fr>: | |
381 | 250: 3c 01 incsz W,\$01 | |
382 | 252: 3c 0b incsz W,STATUS | |
383 | 254: 3c 1a incsz W,FCFG | |
384 | 256: 3c 19 incsz W,INTED | |
385 | 258: 3c 01 incsz W,\$01 | |
386 | 25a: 3c 4d incsz W,T1CFG1L | |
387 | 25c: 3c 0b incsz W,STATUS | |
388 | 25e: 3c 62 incsz W,S1TBUFH | |
389 | ||
390 | 00000260 <swap_fr>: | |
391 | 260: 3a 01 swap \$01 | |
392 | 262: 3a 0b swap STATUS | |
393 | 264: 3a 38 swap \$38 | |
394 | 266: 3a 19 swap INTED | |
395 | 268: 3a 02 swap ADDRSEL | |
396 | 26a: 3a 21 swap RAOUT | |
397 | 26c: 3a 18 swap INTE | |
398 | 26e: 3a 33 swap \$33 | |
399 | ||
400 | 00000270 <swapw_fr>: | |
401 | 270: 38 01 swap W,\$01 | |
402 | 272: 38 0b swap W,STATUS | |
403 | 274: 38 1a swap W,FCFG | |
404 | 276: 38 19 swap W,INTED | |
405 | 278: 38 01 swap W,\$01 | |
406 | 27a: 38 2b swap W,LFSRA | |
407 | 27c: 38 20 swap W,RAIN | |
408 | 27e: 38 11 swap W,ADDRL | |
409 | ||
410 | 00000280 <rl_fr>: | |
411 | 280: 36 02 rl ADDRSEL | |
412 | 282: 36 0b rl STATUS | |
413 | 284: 36 38 rl \$38 | |
414 | 286: 36 19 rl INTED | |
415 | 288: 36 01 rl \$01 | |
416 | 28a: 36 1e rl IPCH | |
417 | 28c: 36 22 rl RADIR | |
418 | 28e: 36 2b rl LFSRA | |
419 | ||
420 | 00000290 <rlw_fr>: | |
421 | 290: 34 02 rl W,ADDRSEL | |
422 | 292: 34 0b rl W,STATUS | |
423 | 294: 34 1a rl W,FCFG | |
424 | 296: 34 19 rl W,INTED | |
425 | 298: 34 01 rl W,\$01 | |
426 | 29a: 34 0e rl W,SPDREG | |
427 | 29c: 34 18 rl W,INTE | |
428 | 29e: 34 1b rl W,TCTRL | |
429 | ||
430 | 000002a0 <rr_fr>: | |
431 | 2a0: 32 01 rr \$01 | |
432 | 2a2: 32 0b rr STATUS | |
433 | 2a4: 32 38 rr \$38 | |
434 | 2a6: 32 19 rr INTED | |
435 | 2a8: 32 01 rr \$01 | |
436 | 2aa: 32 2b rr LFSRA | |
437 | 2ac: 32 19 rr INTED | |
438 | 2ae: 32 10 rr ADDRH | |
439 | ||
440 | 000002b0 <rrw_fr>: | |
441 | 2b0: 30 01 rr W,\$01 | |
442 | 2b2: 30 0b rr W,STATUS | |
443 | 2b4: 30 1a rr W,FCFG | |
444 | 2b6: 30 19 rr W,INTED | |
445 | 2b8: 30 01 rr W,\$01 | |
446 | 2ba: 30 10 rr W,ADDRH | |
447 | 2bc: 30 48 rr W,T1CAP2H | |
448 | 2be: 30 11 rr W,ADDRL | |
449 | ||
450 | 000002c0 <decsz_fr>: | |
451 | 2c0: 2e 01 decsz \$01 | |
452 | 2c2: 2e 0b decsz STATUS | |
453 | 2c4: 2e 38 decsz \$38 | |
454 | 2c6: 2e 19 decsz INTED | |
455 | 2c8: 2e 01 decsz \$01 | |
456 | 2ca: 2e 4e decsz T1CFG2H | |
457 | 2cc: 2e 1d decsz EMCFG | |
458 | 2ce: 2e 10 decsz ADDRH | |
459 | ||
460 | 000002d0 <decszw_fr>: | |
461 | 2d0: 2c 01 decsz W,\$01 | |
462 | 2d2: 2c 0b decsz W,STATUS | |
463 | 2d4: 2c 1a decsz W,FCFG | |
464 | 2d6: 2c 19 decsz W,INTED | |
465 | 2d8: 2c 01 decsz W,\$01 | |
466 | 2da: 2c 1a decsz W,FCFG | |
467 | 2dc: 2c 16 decsz W,INTSPD | |
468 | 2de: 2c 04 decsz W,IPH | |
469 | ||
470 | 000002e0 <inc_fr>: | |
471 | 2e0: 2a 01 inc \$01 | |
472 | 2e2: 2a 0b inc STATUS | |
473 | 2e4: 2a 38 inc \$38 | |
474 | 2e6: 2a 19 inc INTED | |
475 | 2e8: 2a 01 inc \$01 | |
476 | 2ea: 2a 2b inc LFSRA | |
477 | 2ec: 2a 2b inc LFSRA | |
478 | 2ee: 2a 53 inc ADCTMR | |
479 | ||
480 | 000002f0 <incw_fr>: | |
481 | 2f0: 28 01 inc W,\$01 | |
482 | 2f2: 28 0b inc W,STATUS | |
483 | 2f4: 28 1a inc W,FCFG | |
484 | 2f6: 28 19 inc W,INTED | |
485 | 2f8: 28 01 inc W,\$01 | |
486 | 2fa: 28 2b inc W,LFSRA | |
487 | 2fc: 28 1e inc W,IPCH | |
488 | 2fe: 28 21 inc W,RAOUT | |
489 | ||
490 | 00000300 <not_fr>: | |
491 | 300: 26 01 not \$01 | |
492 | 302: 26 0b not STATUS | |
493 | 304: 26 38 not \$38 | |
494 | 306: 26 19 not INTED | |
495 | 308: 26 01 not \$01 | |
496 | 30a: 26 2b not LFSRA | |
497 | 30c: 26 0e not SPDREG | |
498 | 30e: 26 2b not LFSRA | |
499 | ||
500 | 00000310 <notw_fr>: | |
501 | 310: 24 01 not W,\$01 | |
502 | 312: 24 0b not W,STATUS | |
503 | 314: 24 1a not W,FCFG | |
504 | 316: 24 19 not W,INTED | |
505 | 318: 24 01 not W,\$01 | |
506 | 31a: 24 54 not W,T2CNTH | |
507 | 31c: 24 2b not W,LFSRA | |
508 | 31e: 24 32 not W,REDIR | |
509 | ||
510 | 00000320 <test_fr>: | |
511 | 320: 22 02 test ADDRSEL | |
512 | 322: 22 0b test STATUS | |
513 | 324: 22 38 test \$38 | |
514 | 326: 22 d7 test \$d7 | |
515 | 328: 22 01 test \$01 | |
516 | 32a: 22 2b test LFSRA | |
517 | 32c: 22 18 test INTE | |
518 | 32e: 22 19 test INTED | |
519 | ||
520 | 00000330 <movw_l>: | |
521 | 330: 7c 00 mov W,#\$00 | |
522 | 332: 7c 19 mov W,#\$19 | |
523 | 334: 7c 0c mov W,#\$0c | |
524 | 336: 7c 0c mov W,#\$0c | |
525 | 338: 7c 01 mov W,#\$01 | |
526 | 33a: 7c 0e mov W,#\$0e | |
527 | 33c: 7c 0b mov W,#\$0b | |
528 | 33e: 7c 42 mov W,#\$42 | |
529 | ||
530 | 00000340 <movfr_w>: | |
531 | 340: 02 01 mov \$01,W | |
532 | 342: 02 0b mov STATUS,W | |
533 | 344: 02 38 mov \$38,W | |
534 | 346: 02 19 mov INTED,W | |
535 | 348: 02 01 mov \$01,W | |
536 | 34a: 02 24 mov RBIN,W | |
537 | 34c: 02 56 mov T2CAP1H,W | |
538 | 34e: 02 12 mov DATAH,W | |
539 | ||
540 | 00000350 <movw_fr>: | |
541 | 350: 20 01 mov W,\$01 | |
542 | 352: 20 0b mov W,STATUS | |
543 | 354: 20 1a mov W,FCFG | |
544 | 356: 20 19 mov W,INTED | |
545 | 358: 20 01 mov W,\$01 | |
546 | 35a: 20 0c mov W,DPH | |
547 | 35c: 20 2b mov W,LFSRA | |
548 | 35e: 20 17 mov W,INTF | |
549 | ||
550 | 00000360 <addfr_w>: | |
551 | 360: 1e 0a add WREG,W | |
552 | 362: 1e 0b add STATUS,W | |
553 | 364: 1e 38 add \$38,W | |
554 | 366: 1e d7 add \$d7,W | |
555 | 368: 1e 01 add \$01,W | |
556 | 36a: 1e 2b add LFSRA,W | |
557 | 36c: 1e 19 add INTED,W | |
558 | 36e: 1e 27 add LFSRL,W | |
559 | ||
560 | 00000370 <addw_fr>: | |
561 | 370: 1c 01 add W,\$01 | |
562 | 372: 1c 0b add W,STATUS | |
563 | 374: 1c 1a add W,FCFG | |
564 | 376: 1c 19 add W,INTED | |
565 | 378: 1c 01 add W,\$01 | |
566 | 37a: 1c 13 add W,DATAL | |
567 | 37c: 1c 5b add W,T2CMP1L | |
568 | 37e: 1c 19 add W,INTED | |
569 | ||
570 | 00000380 <xorfr_w>: | |
571 | 380: 1a 01 xor \$01,W | |
572 | 382: 1a 0b xor STATUS,W | |
573 | 384: 1a 38 xor \$38,W | |
574 | 386: 1a 19 xor INTED,W | |
575 | 388: 1a 02 xor ADDRSEL,W | |
576 | 38a: 1a 1f xor IPCL,W | |
577 | 38c: 1a 16 xor INTSPD,W | |
578 | 38e: 1a 2b xor LFSRA,W | |
579 | ||
580 | 00000390 <xorw_fr>: | |
581 | 390: 18 02 xor W,ADDRSEL | |
582 | 392: 18 0b xor W,STATUS | |
583 | 394: 18 1a xor W,FCFG | |
584 | 396: 18 19 xor W,INTED | |
585 | 398: 18 01 xor W,\$01 | |
586 | 39a: 18 0e xor W,SPDREG | |
587 | 39c: 18 0a xor W,WREG | |
588 | 39e: 18 15 xor W,INTVECL | |
589 | ||
590 | 000003a0 <andfr_w>: | |
591 | 3a0: 16 01 and \$01,W | |
592 | 3a2: 16 0b and STATUS,W | |
593 | 3a4: 16 38 and \$38,W | |
594 | 3a6: 16 19 and INTED,W | |
595 | 3a8: 16 01 and \$01,W | |
596 | 3aa: 16 1c and XCFG,W | |
597 | 3ac: 16 25 and RBOUT,W | |
598 | 3ae: 16 18 and INTE,W | |
599 | ||
600 | 000003b0 <andw_fr>: | |
601 | 3b0: 14 01 and W,\$01 | |
602 | 3b2: 14 0b and W,STATUS | |
603 | 3b4: 14 1a and W,FCFG | |
604 | 3b6: 14 19 and W,INTED | |
605 | 3b8: 14 01 and W,\$01 | |
606 | 3ba: 14 15 and W,INTVECL | |
607 | 3bc: 14 28 and W,RCIN | |
608 | 3be: 14 2b and W,LFSRA | |
609 | ||
610 | 000003c0 <orfr_w>: | |
611 | 3c0: 12 01 or \$01,W | |
612 | 3c2: 12 0b or STATUS,W | |
613 | 3c4: 12 38 or \$38,W | |
614 | 3c6: 12 19 or INTED,W | |
615 | 3c8: 12 01 or \$01,W | |
616 | 3ca: 12 3a or RGDIR,W | |
617 | 3cc: 12 1d or EMCFG,W | |
618 | 3ce: 12 0a or WREG,W | |
619 | ||
620 | 000003d0 <orw_fr>: | |
621 | 3d0: 10 01 or W,\$01 | |
622 | 3d2: 10 0b or W,STATUS | |
623 | 3d4: 10 1a or W,FCFG | |
624 | 3d6: 10 19 or W,INTED | |
625 | 3d8: 10 01 or W,\$01 | |
626 | 3da: 10 0b or W,STATUS | |
627 | 3dc: 10 18 or W,INTE | |
628 | 3de: 10 3b or W,\$3b | |
629 | ||
630 | 000003e0 <dec_fr>: | |
631 | 3e0: 0e 02 dec ADDRSEL | |
632 | 3e2: 0e 33 dec \$33 | |
633 | 3e4: 0e 1a dec FCFG | |
634 | 3e6: 0e 19 dec INTED | |
635 | 3e8: 0e 01 dec \$01 | |
636 | 3ea: 0e 4c dec T1CFG1H | |
637 | 3ec: 0e 20 dec RAIN | |
638 | 3ee: 0e 11 dec ADDRL | |
639 | ||
640 | 000003f0 <decw_fr>: | |
641 | 3f0: 0c 02 dec W,ADDRSEL | |
642 | 3f2: 0c 33 dec W,\$33 | |
643 | 3f4: 0c 38 dec W,\$38 | |
644 | 3f6: 0c 19 dec W,INTED | |
645 | 3f8: 0c 01 dec W,\$01 | |
646 | 3fa: 0c 01 dec W,\$01 | |
647 | 3fc: 0c 44 dec W,T1CNTH | |
648 | 3fe: 0c 07 dec W,SPL | |
649 | ||
650 | 00000400 <subfr_w>: | |
651 | 400: 0a 02 sub ADDRSEL,W | |
652 | 402: 0a 0b sub STATUS,W | |
653 | 404: 0a 0f sub MULH,W | |
654 | 406: 0a 19 sub INTED,W | |
655 | 408: 0a 01 sub \$01,W | |
656 | 40a: 0a 28 sub RCIN,W | |
657 | 40c: 0a 37 sub \$37,W | |
658 | 40e: 0a 11 sub ADDRL,W | |
659 | ||
660 | 00000410 <subw_fr>: | |
661 | 410: 08 01 sub W,\$01 | |
662 | 412: 08 15 sub W,INTVECL | |
663 | 414: 08 19 sub W,INTED | |
664 | 416: 08 19 sub W,INTED | |
665 | 418: 08 01 sub W,\$01 | |
666 | 41a: 08 11 sub W,ADDRL | |
667 | 41c: 08 10 sub W,ADDRH | |
668 | 41e: 08 12 sub W,DATAH | |
669 | ||
670 | 00000420 <clr_fr>: | |
671 | 420: 06 0a clr WREG | |
672 | 422: 06 0b clr STATUS | |
673 | 424: 06 19 clr INTED | |
674 | 426: 06 19 clr INTED | |
675 | 428: 06 01 clr \$01 | |
676 | 42a: 06 18 clr INTE | |
677 | 42c: 06 d7 clr \$d7 | |
678 | 42e: 06 17 clr INTF | |
679 | ||
680 | 00000430 <cmpw_fr>: | |
681 | 430: 04 01 cmp W,\$01 | |
682 | 432: 04 15 cmp W,INTVECL | |
683 | 434: 04 19 cmp W,INTED | |
684 | 436: 04 19 cmp W,INTED | |
685 | 438: 04 01 cmp W,\$01 | |
686 | 43a: 04 12 cmp W,DATAH | |
687 | 43c: 04 14 cmp W,INTVECH | |
688 | 43e: 04 10 cmp W,ADDRH | |
689 | ||
690 | 00000440 <speed>: | |
691 | 440: 01 00 speed #\$00 | |
692 | 442: 01 19 speed #\$19 | |
693 | 444: 01 0c speed #\$0c | |
694 | 446: 01 0c speed #\$0c | |
695 | 448: 01 01 speed #\$01 | |
696 | 44a: 01 0e speed #\$0e | |
697 | 44c: 01 12 speed #\$12 | |
698 | 44e: 01 61 speed #\$61 | |
699 | ||
700 | 00000450 <ireadi>: | |
701 | 450: 00 1d ireadi | |
702 | ||
703 | 00000452 <iwritei>: | |
704 | 452: 00 1c iwritei | |
705 | ||
706 | 00000454 <fread>: | |
707 | 454: 00 1b fread | |
708 | ||
709 | 00000456 <fwrite>: | |
710 | 456: 00 1a fwrite | |
711 | ||
712 | 00000458 <iread>: | |
713 | 458: 00 19 iread | |
714 | ||
715 | 0000045a <iwrite>: | |
716 | 45a: 00 18 iwrite | |
717 | ||
718 | 0000045c <page>: | |
719 | 45c: 00 10 page \$00000 | |
720 | 45e: 00 10 page \$00000 | |
721 | 460: 00 10 page \$00000 | |
722 | 462: 00 10 page \$00000 | |
723 | 464: 00 10 page \$00000 | |
724 | 466: 00 10 page \$00000 | |
725 | 468: 00 10 page \$00000 | |
726 | 46a: 00 10 page \$00000 | |
727 | ||
728 | 0000046c <system>: | |
729 | 46c: 00 ff system | |
730 | ||
731 | 0000046e <reti>: | |
732 | 46e: 00 08 reti #\$0 | |
733 | 470: 00 09 reti #\$1 | |
734 | 472: 00 0a reti #\$2 | |
735 | 474: 00 0b reti #\$3 | |
736 | 476: 00 0c reti #\$4 | |
737 | 478: 00 0d reti #\$5 | |
738 | 47a: 00 0e reti #\$6 | |
739 | 47c: 00 0f reti #\$7 | |
740 | ||
741 | 0000047e <ret>: | |
742 | 47e: 00 07 ret | |
743 | ||
744 | 00000480 <int>: | |
745 | 480: 00 06 int | |
746 | ||
747 | 00000482 <breakx>: | |
748 | 482: 00 05 breakx | |
749 | ||
750 | 00000484 <cwdt>: | |
751 | 484: 00 04 cwdt | |
752 | ||
753 | 00000486 <ferase>: | |
754 | 486: 00 03 ferase | |
755 | ||
756 | 00000488 <retnp>: | |
757 | 488: 00 02 retnp | |
758 | ||
759 | 0000048a <break>: | |
760 | 48a: 00 01 break | |
761 | ||
762 | 0000048c <nop>: | |
763 | \.\.\. |