[deliverable/binutils-gdb.git] / gas / testsuite / gas / m68hc11 / opers12-dwarf2.d

#objdump: -S
#as: -m68hc12 -gdwarf2
#name: Dwarf2 test on opers12.s
#source: opers12.s

.*: +file format elf32\-m68hc12

Disassembly of section .text:

0+00 <start>:
#...
	sect .text
	globl start

start:
	anda	\[12,x\]		; Indexed indirect
   0:	a4 e3 00 0c 	anda	\[0xc,X\]
	ldaa	#10
   4:	86 0a       	ldaa	#0xa
	ldx	L1
   6:	fe 00 00    	ldx	0x0 <start>

0+09 <L1>:
L1:	ldy	,x
   9:	ed 00       	ldy	0x0,X
	addd	1,y		; Offset from register
   b:	e3 41       	addd	0x1,Y
	subd	\-1,y
   d:	a3 5f       	subd	0xffff,Y
	eora	15,y
   f:	a8 4f       	eora	0xf,Y
	eora	\-16,y
  11:	a8 50       	eora	0xfff0,Y
	eorb	16,y
  13:	e8 e8 10    	eorb	0x10,Y
	eorb	\-17,y
  16:	e8 e9 ef    	eorb	0xffef,Y
	oraa	128,sp
  19:	aa f0 80    	oraa	0x80,SP
	orab	\-128,sp
  1c:	ea f1 80    	orab	0xff80,SP
	orab	255,x
  1f:	ea e0 ff    	orab	0xff,X
	orab	\-256,x
  22:	ea e1 00    	orab	0xff00,X
	anda	256,x
  25:	a4 e2 01 00 	anda	0x100,X
	andb	\-257,x
  29:	e4 e2 fe ff 	andb	0xfeff,X
	anda	\[12,x\]		; Indexed indirect \(16\-bit offset\)
  2d:	a4 e3 00 0c 	anda	\[0xc,X\]
	ldaa	\[257,y\]
  31:	a6 eb 01 01 	ldaa	\[0x101,Y\]
	ldab	\[32767,sp\]
  35:	e6 f3 7f ff 	ldab	\[0x7fff,SP\]
	ldd	\[32768,pc\]
  39:	ec fb 80 00 	ldd	\[0x8000,PC\]
	ldd	L1,pc
  3d:	ec f9 c9    	ldd	0xffc9,PC \{0x9 <L1>\}
	std	a,x		; Two\-reg index
  40:	6c e4       	std	A,X
	ldx	b,x
  42:	ee e5       	ldx	B,X
	stx	d,y
  44:	6e ee       	stx	D,Y
	addd	1,\+x		; Pre\-Auto inc
  46:	e3 20       	addd	1,\+X
	addd	2,\+x
  48:	e3 21       	addd	2,\+X
	addd	8,\+x
  4a:	e3 27       	addd	8,\+X
	addd	1,sp\+		; Post\-Auto inc
  4c:	e3 b0       	addd	1,SP\+
	addd	2,sp\+
  4e:	e3 b1       	addd	2,SP\+
	addd	8,sp\+
  50:	e3 b7       	addd	8,SP\+
	subd	1,\-y		; Pre\-Auto dec
  52:	a3 6f       	subd	1,\-Y
	subd	2,\-y
  54:	a3 6e       	subd	2,\-Y
	subd	8,\-y
  56:	a3 68       	subd	8,\-Y
	addd	1,y\-		; Post\-Auto dec
  58:	e3 7f       	addd	1,Y\-
	addd	2,y\-
  5a:	e3 7e       	addd	2,Y\-
	addd	8,y\-
  5c:	e3 78       	addd	8,Y\-
	std	\[d,x\]		; Indexed indirect with two reg index
  5e:	6c e7       	std	\[D,X\]
	std	\[d,y\]
  60:	6c ef       	std	\[D,Y\]
	std	\[d,sp\]
  62:	6c f7       	std	\[D,SP\]
	std	\[d,pc\]
  64:	6c ff       	std	\[D,PC\]
	beq	L1
  66:	27 a1       	beq	0x9 <L1>
	lbeq	start
  68:	18 27 ff 94 	lbeq	0x0 <start>
	lbcc	L2
  6c:	18 24 00 4c 	lbcc	0xbc <L2>
;;
;; Move insn with various operands
;; 
	movb	start, 1,x
  70:	18 09 01 00 	movb	0x0 <start>, 0x1,X
  74:	00 
	movw	1,x, start
  75:	18 05 01 00 	movw	0x1,X, 0x0 <start>
  79:	00 
	movb	start, 1,\+x
  7a:	18 09 20 00 	movb	0x0 <start>, 1,\+X
  7e:	00 
	movb	start, 1,\-x
  7f:	18 09 2f 00 	movb	0x0 <start>, 1,\-X
  83:	00 
	movb	#23, 1,\-sp
  84:	18 08 af 17 	movb	#0x17, 1,\-SP
	movb	L1, L2
  88:	18 0c 00 00 	movb	0x0 <start>, 0x0 <start>
  8c:	00 00 
	movb	L1, a,x
  8e:	18 09 e4 00 	movb	0x0 <start>, A,X
  92:	00 
	movw	L1, b,x
  93:	18 01 e5 00 	movw	0x0 <start>, B,X
  97:	00 
	movw	L1, d,x
  98:	18 01 e6 00 	movw	0x0 <start>, D,X
  9c:	00 
	movw	d,x, a,x
  9d:	18 02 e6 e4 	movw	D,X, A,X
	movw	b,sp, d,pc
  a1:	18 02 f5 fe 	movw	B,SP, D,PC
	movw	b,sp, L1
  a5:	18 05 f5 00 	movw	B,SP, 0x0 <start>
  a9:	00 
	movw	b,sp, 1,x
  aa:	18 02 f5 01 	movw	B,SP, 0x1,X
	movw	d,x, a,y
  ae:	18 02 e6 ec 	movw	D,X, A,Y
	trap	#0x30
  b2:	18 30       	trap	#0x30
	trap	#0x39
  b4:	18 39       	trap	#0x39
	trap	#0x40
  b6:	18 40       	trap	#0x40
	trap	#0x80
  b8:	18 80       	trap	#0x80
	trap	#255
  ba:	18 ff       	trap	#0xff

0+bc <L2>:
L2:	
	movw 1,x,2,x
  bc:	18 02 01 02 	movw	0x1,X, 0x2,X
	movw \-1,\-1
  c0:	18 04 ff ff 	movw	0xffff <bb\+0xd7ff>, 0xffff <bb\+0xd7ff>
  c4:	ff ff 
	movw \-1,1,x
  c6:	18 01 01 ff 	movw	0xffff <bb\+0xd7ff>, 0x1,X
  ca:	ff 
	movw #\-1,1,x
  cb:	18 00 01 ff 	movw	#0xffff <bb\+0xd7ff>, 0x1,X
  cf:	ff 
	movw 3,8
  d0:	18 04 00 03 	movw	0x3 <start\+0x3>, 0x8 <start\+0x8>
  d4:	00 08 
	movw #3,3
  d6:	18 03 00 03 	movw	#0x3 <start\+0x3>, 0x3 <start\+0x3>
  da:	00 03 
	movw #3,1,x
  dc:	18 00 01 00 	movw	#0x3 <start\+0x3>, 0x1,X
  e0:	03 
	movw 3,1,x
  e1:	18 01 01 00 	movw	0x3 <start\+0x3>, 0x1,X
  e5:	03 
	movw 3,\+2,x
  e6:	18 01 02 00 	movw	0x3 <start\+0x3>, 0x2,X
  ea:	03 
	movw 4,\-2,x
  eb:	18 01 1e 00 	movw	0x4 <start\+0x4>, 0xfffe,X
  ef:	04 
	rts
  f0:	3d          	rts

0+f1 <post_indexed_pb>:
;;
;; Post\-index byte with relocation
;; 
post_indexed_pb:
t1:
	leas	abort,x
  f1:	1b e2 00 00 	leas	0x0,X

0+f5 <t2>:
t2:
	leax	t2\-t1,y
  f5:	1a 44       	leax	0x4,Y
	leax	toto,x
  f7:	1a e0 64    	leax	0x64,X
	leas	toto\+titi,sp
  fa:	1b f0 6e    	leas	0x6e,SP
	leay	titi,x
  fd:	19 0a       	leay	0xa,X
	leas	bb,y
  ff:	1b ea 28 00 	leas	0x2800,Y
	leas	min5b,pc
 103:	1b d0       	leas	0xfff0,PC \{0xf5 <t2>\}
	leas	max5b,pc
 105:	1b cf       	leas	0xf,PC \{0x116 <t2\+0x21>\}
	leas	min9b,pc
 107:	1b fa ff 00 	leas	0xff00,PC \{0xb <L1\+0x2>\}
	leas	max9b,pc
 10b:	1b f8 ff    	leas	0xff,PC \{0x20d <L0\ 1\+0xd9>\}

;;
;; Disassembler bug with movb
;;
	movb	#23,0x2345
 10e:	18 0b 17 23 	movb	#0x17, 0x2345 <L0\ 1\+0x2211>
 112:	45 
	movb	#40,12,sp
 113:	18 08 8c 28 	movb	#0x28, 0xc,SP
	movb	#39,3,\+sp
 117:	18 08 a2 27 	movb	#0x27, 3,\+SP
	movb	#20,14,sp
 11b:	18 08 8e 14 	movb	#0x14, 0xe,SP
	movw	#0x3210,0x3456
 11f:	18 03 32 10 	movw	#0x3210 <bb\+0xa10>, 0x3456 <bb\+0xc56>
 123:	34 56 
	movw	#0x4040,12,sp
 125:	18 00 8c 40 	movw	#0x4040 <bb\+0x1840>, 0xc,SP
 129:	40 
	movw	#0x3900,3,\+sp
 12a:	18 00 a2 39 	movw	#0x3900 <bb\+0x1100>, 3,\+SP
 12e:	00 
	movw	#0x2000,14,sp
 12f:	18 00 8e 20 	movw	#0x2000 <L0\ 1\+0x1ecc>, 0xe,SP
 133:	00
Commit	Line	Data
68a581b8 SC	1	#objdump: -S
	2	#as: -m68hc12 -gdwarf2
	3	#name: Dwarf2 test on opers12.s
	4	#source: opers12.s
	5
	6	.*: +file format elf32\-m68hc12
	7
	8	Disassembly of section .text:
	9
cd2b2939	10	0+00 <start>:
a696b49e	11	#...
68a581b8 SC	12	sect .text
	13	globl start
	14
	15	start:
	16	anda \[12,x\] ; Indexed indirect
6927f982	17	0: a4 e3 00 0c anda \[0xc,X\]
68a581b8	18	ldaa #10
6927f982	19	4: 86 0a ldaa #0xa
68a581b8	20	ldx L1
6927f982	21	6: fe 00 00 ldx 0x0 <start>
68a581b8	22
cd2b2939	23	0+09 <L1>:
68a581b8	24	L1: ldy ,x
6927f982	25	9: ed 00 ldy 0x0,X
68a581b8	26	addd 1,y ; Offset from register
6927f982	27	b: e3 41 addd 0x1,Y
68a581b8	28	subd \-1,y
6927f982	29	d: a3 5f subd 0xffff,Y
68a581b8	30	eora 15,y
6927f982	31	f: a8 4f eora 0xf,Y
68a581b8	32	eora \-16,y
6927f982	33	11: a8 50 eora 0xfff0,Y
68a581b8	34	eorb 16,y
6927f982	35	13: e8 e8 10 eorb 0x10,Y
68a581b8	36	eorb \-17,y
6927f982	37	16: e8 e9 ef eorb 0xffef,Y
68a581b8	38	oraa 128,sp
6927f982	39	19: aa f0 80 oraa 0x80,SP
68a581b8	40	orab \-128,sp
6927f982	41	1c: ea f1 80 orab 0xff80,SP
68a581b8	42	orab 255,x
6927f982	43	1f: ea e0 ff orab 0xff,X
68a581b8	44	orab \-256,x
6927f982	45	22: ea e1 00 orab 0xff00,X
68a581b8	46	anda 256,x
6927f982	47	25: a4 e2 01 00 anda 0x100,X
68a581b8	48	andb \-257,x
6927f982	49	29: e4 e2 fe ff andb 0xfeff,X
68a581b8	50	anda \[12,x\] ; Indexed indirect \(16\-bit offset\)
6927f982	51	2d: a4 e3 00 0c anda \[0xc,X\]
68a581b8	52	ldaa \[257,y\]
6927f982	53	31: a6 eb 01 01 ldaa \[0x101,Y\]
68a581b8	54	ldab \[32767,sp\]
6927f982	55	35: e6 f3 7f ff ldab \[0x7fff,SP\]
68a581b8	56	ldd \[32768,pc\]
6927f982	57	39: ec fb 80 00 ldd \[0x8000,PC\]
68a581b8	58	ldd L1,pc
6927f982	59	3d: ec f9 c9 ldd 0xffc9,PC \{0x9 <L1>\}
68a581b8 SC	60	std a,x ; Two\-reg index
	61	40: 6c e4 std A,X
	62	ldx b,x
	63	42: ee e5 ldx B,X
	64	stx d,y
	65	44: 6e ee stx D,Y
	66	addd 1,\+x ; Pre\-Auto inc
	67	46: e3 20 addd 1,\+X
	68	addd 2,\+x
	69	48: e3 21 addd 2,\+X
	70	addd 8,\+x
	71	4a: e3 27 addd 8,\+X
	72	addd 1,sp\+ ; Post\-Auto inc
	73	4c: e3 b0 addd 1,SP\+
	74	addd 2,sp\+
	75	4e: e3 b1 addd 2,SP\+
	76	addd 8,sp\+
	77	50: e3 b7 addd 8,SP\+
	78	subd 1,\-y ; Pre\-Auto dec
	79	52: a3 6f subd 1,\-Y
	80	subd 2,\-y
	81	54: a3 6e subd 2,\-Y
	82	subd 8,\-y
	83	56: a3 68 subd 8,\-Y
	84	addd 1,y\- ; Post\-Auto dec
	85	58: e3 7f addd 1,Y\-
	86	addd 2,y\-
	87	5a: e3 7e addd 2,Y\-
	88	addd 8,y\-
	89	5c: e3 78 addd 8,Y\-
	90	std \[d,x\] ; Indexed indirect with two reg index
	91	5e: 6c e7 std \[D,X\]
	92	std \[d,y\]
	93	60: 6c ef std \[D,Y\]
	94	std \[d,sp\]
	95	62: 6c f7 std \[D,SP\]
	96	std \[d,pc\]
	97	64: 6c ff std \[D,PC\]
	98	beq L1
6927f982	99	66: 27 a1 beq 0x9 <L1>
68a581b8	100	lbeq start
6927f982	101	68: 18 27 ff 94 lbeq 0x0 <start>
68a581b8	102	lbcc L2
6927f982	103	6c: 18 24 00 4c lbcc 0xbc <L2>
68a581b8 SC	104	;;
	105	;; Move insn with various operands
	106	;;
	107	movb start, 1,x
6927f982	108	70: 18 09 01 00 movb 0x0 <start>, 0x1,X
68a581b8 SC	109	74: 00
68a581b8 SC	110	movw 1,x, start
6927f982	111	75: 18 05 01 00 movw 0x1,X, 0x0 <start>
68a581b8 SC	112	79: 00
68a581b8 SC	113	movb start, 1,\+x
6927f982	114	7a: 18 09 20 00 movb 0x0 <start>, 1,\+X
68a581b8 SC	115	7e: 00
68a581b8 SC	116	movb start, 1,\-x
6927f982	117	7f: 18 09 2f 00 movb 0x0 <start>, 1,\-X
68a581b8 SC	118	83: 00
68a581b8 SC	119	movb #23, 1,\-sp
6927f982	120	84: 18 08 af 17 movb #0x17, 1,\-SP
68a581b8	121	movb L1, L2
6927f982	122	88: 18 0c 00 00 movb 0x0 <start>, 0x0 <start>
cd2b2939	123	8c: 00 00
68a581b8	124	movb L1, a,x
6927f982	125	8e: 18 09 e4 00 movb 0x0 <start>, A,X
cd2b2939	126	92: 00
68a581b8	127	movw L1, b,x
6927f982	128	93: 18 01 e5 00 movw 0x0 <start>, B,X
cd2b2939	129	97: 00
68a581b8	130	movw L1, d,x
6927f982	131	98: 18 01 e6 00 movw 0x0 <start>, D,X
cd2b2939	132	9c: 00
68a581b8 SC	133	movw d,x, a,x
	134	9d: 18 02 e6 e4 movw D,X, A,X
	135	movw b,sp, d,pc
	136	a1: 18 02 f5 fe movw B,SP, D,PC
	137	movw b,sp, L1
6927f982	138	a5: 18 05 f5 00 movw B,SP, 0x0 <start>
cd2b2939	139	a9: 00
68a581b8	140	movw b,sp, 1,x
6927f982	141	aa: 18 02 f5 01 movw B,SP, 0x1,X
68a581b8 SC	142	movw d,x, a,y
	143	ae: 18 02 e6 ec movw D,X, A,Y
	144	trap #0x30
6927f982	145	b2: 18 30 trap #0x30
68a581b8	146	trap #0x39
6927f982	147	b4: 18 39 trap #0x39
68a581b8	148	trap #0x40
6927f982	149	b6: 18 40 trap #0x40
68a581b8	150	trap #0x80
6927f982	151	b8: 18 80 trap #0x80
68a581b8	152	trap #255
6927f982	153	ba: 18 ff trap #0xff
68a581b8	154
cd2b2939	155	0+bc <L2>:
68a581b8 SC	156	L2:
68a581b8 SC	157	movw 1,x,2,x
6927f982	158	bc: 18 02 01 02 movw 0x1,X, 0x2,X
68a581b8	159	movw \-1,\-1
6927f982	160	c0: 18 04 ff ff movw 0xffff <bb\+0xd7ff>, 0xffff <bb\+0xd7ff>
68a581b8 SC	161	c4: ff ff
68a581b8 SC	162	movw \-1,1,x
6927f982	163	c6: 18 01 01 ff movw 0xffff <bb\+0xd7ff>, 0x1,X
68a581b8 SC	164	ca: ff
68a581b8 SC	165	movw #\-1,1,x
6927f982	166	cb: 18 00 01 ff movw #0xffff <bb\+0xd7ff>, 0x1,X
68a581b8 SC	167	cf: ff
68a581b8 SC	168	movw 3,8
6927f982	169	d0: 18 04 00 03 movw 0x3 <start\+0x3>, 0x8 <start\+0x8>
68a581b8 SC	170	d4: 00 08
68a581b8 SC	171	movw #3,3
6927f982	172	d6: 18 03 00 03 movw #0x3 <start\+0x3>, 0x3 <start\+0x3>
68a581b8 SC	173	da: 00 03
68a581b8 SC	174	movw #3,1,x
6927f982	175	dc: 18 00 01 00 movw #0x3 <start\+0x3>, 0x1,X
68a581b8 SC	176	e0: 03
68a581b8 SC	177	movw 3,1,x
6927f982	178	e1: 18 01 01 00 movw 0x3 <start\+0x3>, 0x1,X
68a581b8 SC	179	e5: 03
68a581b8 SC	180	movw 3,\+2,x
6927f982	181	e6: 18 01 02 00 movw 0x3 <start\+0x3>, 0x2,X
68a581b8 SC	182	ea: 03
68a581b8 SC	183	movw 4,\-2,x
6927f982	184	eb: 18 01 1e 00 movw 0x4 <start\+0x4>, 0xfffe,X
68a581b8 SC	185	ef: 04
	186	rts
	187	f0: 3d rts
	188
cd2b2939	189	0+f1 <post_indexed_pb>:
68a581b8 SC	190	;;
	191	;; Post\-index byte with relocation
	192	;;
	193	post_indexed_pb:
	194	t1:
	195	leas abort,x
6927f982	196	f1: 1b e2 00 00 leas 0x0,X
68a581b8	197
cd2b2939	198	0+f5 <t2>:
68a581b8 SC	199	t2:
68a581b8 SC	200	leax t2\-t1,y
6927f982	201	f5: 1a 44 leax 0x4,Y
68a581b8	202	leax toto,x
6927f982	203	f7: 1a e0 64 leax 0x64,X
68a581b8	204	leas toto\+titi,sp
6927f982	205	fa: 1b f0 6e leas 0x6e,SP
68a581b8	206	leay titi,x
6927f982	207	fd: 19 0a leay 0xa,X
68a581b8	208	leas bb,y
6927f982	209	ff: 1b ea 28 00 leas 0x2800,Y
68a581b8	210	leas min5b,pc
6927f982	211	103: 1b d0 leas 0xfff0,PC \{0xf5 <t2>\}
68a581b8	212	leas max5b,pc
6927f982	213	105: 1b cf leas 0xf,PC \{0x116 <t2\+0x21>\}
68a581b8	214	leas min9b,pc
6927f982	215	107: 1b fa ff 00 leas 0xff00,PC \{0xb <L1\+0x2>\}
68a581b8	216	leas max9b,pc
6927f982	217	10b: 1b f8 ff leas 0xff,PC \{0x20d <L0\ 1\+0xd9>\}
5d45665a SC	218
	219	;;
	220	;; Disassembler bug with movb
	221	;;
	222	movb #23,0x2345
6927f982	223	10e: 18 0b 17 23 movb #0x17, 0x2345 <L0\ 1\+0x2211>
5da0c277	224	112: 45
5d45665a	225	movb #40,12,sp
6927f982	226	113: 18 08 8c 28 movb #0x28, 0xc,SP
5d45665a	227	movb #39,3,\+sp
6927f982	228	117: 18 08 a2 27 movb #0x27, 3,\+SP
5d45665a	229	movb #20,14,sp
6927f982	230	11b: 18 08 8e 14 movb #0x14, 0xe,SP
5d45665a	231	movw #0x3210,0x3456
6927f982	232	11f: 18 03 32 10 movw #0x3210 <bb\+0xa10>, 0x3456 <bb\+0xc56>
5da0c277	233	123: 34 56
5d45665a	234	movw #0x4040,12,sp
6927f982	235	125: 18 00 8c 40 movw #0x4040 <bb\+0x1840>, 0xc,SP
5da0c277	236	129: 40
5d45665a	237	movw #0x3900,3,\+sp
6927f982	238	12a: 18 00 a2 39 movw #0x3900 <bb\+0x1100>, 3,\+SP
5da0c277	239	12e: 00
5d45665a	240	movw #0x2000,14,sp
6927f982	241	12f: 18 00 8e 20 movw #0x2000 <L0\ 1\+0x1ecc>, 0xe,SP
5da0c277	242	133: 00