Commit | Line | Data |
---|---|---|
dc36a61f RS |
1 | # ctc1s and compares shouldn't appear in a branch delay slot. |
2 | ctc1 $4,$31 | |
3 | b 1f | |
4 | 1: | |
5 | ctc1 $4,$31 | |
6 | bc1t 1f | |
7 | 1: | |
8 | c.eq.s $f0,$f2 | |
9 | b 1f | |
10 | 1: | |
11 | c.eq.s $f0,$f2 | |
12 | bc1t 1f | |
13 | 1: | |
14 | ||
15 | # The next three branches should have nop-filled slots. | |
16 | ctc1 $4,$31 | |
17 | addiu $5,$5,1 | |
18 | bc1t 1f | |
19 | 1: | |
20 | ctc1 $4,$31 | |
21 | addiu $5,$5,1 | |
22 | addiu $6,$6,1 | |
23 | bc1t 1f | |
24 | 1: | |
25 | c.eq.s $f0,$f2 | |
26 | addiu $5,$5,1 | |
27 | bc1t 1f | |
28 | 1: | |
29 | ||
30 | # ...but a swap is possible in these three. | |
31 | ctc1 $4,$31 | |
32 | addiu $5,$5,1 | |
33 | addiu $6,$6,1 | |
34 | addiu $7,$7,1 | |
35 | bc1t 1f | |
36 | 1: | |
37 | c.eq.s $f0,$f2 | |
38 | addiu $5,$5,1 | |
39 | addiu $6,$6,1 | |
40 | bc1t 1f | |
41 | 1: | |
42 | addiu $7,$7,1 | |
43 | bc1t 1f | |
44 | 1: |