Commit | Line | Data |
---|---|---|
f2ae14a1 RS |
1 | #as: -32 -EB |
2 | #objdump: -dr --prefix-addresses -Mgpr-names=numeric | |
3 | #name: ULH with relocation operators | |
4 | ||
5 | .*file format.* | |
6 | ||
7 | Disassembly of section \.text: | |
8 | [0-9a-f]+ <[^>]*> lb \$1,0\(\$4\) | |
9 | [0-9a-f]+ <[^>]*> lbu \$4,1\(\$4\) | |
10 | [0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 | |
11 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
12 | [0-9a-f]+ <[^>]*> lb \$1,32766\(\$4\) | |
13 | [0-9a-f]+ <[^>]*> lbu \$4,32767\(\$4\) | |
14 | [0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 | |
15 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
16 | [0-9a-f]+ <[^>]*> addiu \$1,\$4,32767 | |
17 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
18 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
19 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
20 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
21 | [0-9a-f]+ <[^>]*> li \$1,0x8000 | |
22 | [0-9a-f]+ <[^>]*> addu \$1,\$1,\$4 | |
23 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
24 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
25 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
26 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
27 | #-------------------------------------------------------------------- | |
28 | [0-9a-f]+ <[^>]*> lb \$1,0\(\$5\) | |
29 | [0-9a-f]+ <[^>]*> lbu \$4,1\(\$5\) | |
30 | [0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 | |
31 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
32 | [0-9a-f]+ <[^>]*> lb \$1,32766\(\$5\) | |
33 | [0-9a-f]+ <[^>]*> lbu \$4,32767\(\$5\) | |
34 | [0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 | |
35 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
36 | [0-9a-f]+ <[^>]*> addiu \$1,\$5,32767 | |
37 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
38 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
39 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
40 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
41 | [0-9a-f]+ <[^>]*> li \$1,0x8000 | |
42 | [0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 | |
43 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
44 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
45 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
46 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
47 | # Would be more efficient to apply the offset to the base register. | |
48 | [0-9a-f]+ <[^>]*> lui \$1,0x3 | |
49 | [0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffe | |
50 | [0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 | |
51 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
52 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
53 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
54 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
55 | # This one must use LUI/ORI | |
56 | [0-9a-f]+ <[^>]*> lui \$1,0x3 | |
57 | [0-9a-f]+ <[^>]*> ori \$1,\$1,0x7fff | |
58 | [0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 | |
59 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
60 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
61 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
62 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
63 | # Would be more efficient to apply the offset to the base register. | |
64 | [0-9a-f]+ <[^>]*> lui \$1,0x3 | |
65 | [0-9a-f]+ <[^>]*> ori \$1,\$1,0x8000 | |
66 | [0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 | |
67 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
68 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
69 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
70 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
71 | #-------------------------------------------------------------------- | |
72 | [0-9a-f]+ <[^>]*> li \$1,0 | |
73 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo | |
74 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
75 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
76 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
77 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
78 | [0-9a-f]+ <[^>]*> li \$1,0 | |
79 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo | |
80 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
81 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
82 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
83 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
84 | [0-9a-f]+ <[^>]*> lb \$1,0\(\$0\) | |
85 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo | |
86 | [0-9a-f]+ <[^>]*> lbu \$4,1\(\$0\) | |
87 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo | |
88 | [0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 | |
89 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
90 | [0-9a-f]+ <[^>]*> li \$1,-30875 | |
91 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
92 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
93 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
94 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
95 | [0-9a-f]+ <[^>]*> li \$1,4661 | |
96 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
97 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
98 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
99 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
100 | #-------------------------------------------------------------------- | |
101 | [0-9a-f]+ <[^>]*> addiu \$1,\$4,0 | |
102 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo | |
103 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
104 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
105 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
106 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
107 | [0-9a-f]+ <[^>]*> addiu \$1,\$4,0 | |
108 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo | |
109 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
110 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
111 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
112 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
113 | [0-9a-f]+ <[^>]*> lb \$1,0\(\$4\) | |
114 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo | |
115 | [0-9a-f]+ <[^>]*> lbu \$4,1\(\$4\) | |
116 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo | |
117 | [0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 | |
118 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
119 | #-------------------------------------------------------------------- | |
120 | [0-9a-f]+ <[^>]*> addiu \$1,\$5,0 | |
121 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo | |
122 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
123 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
124 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
125 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
126 | [0-9a-f]+ <[^>]*> addiu \$1,\$5,0 | |
127 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo | |
128 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
129 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
130 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
131 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
132 | [0-9a-f]+ <[^>]*> lb \$1,0\(\$5\) | |
133 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo | |
134 | [0-9a-f]+ <[^>]*> lbu \$4,1\(\$5\) | |
135 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo | |
136 | [0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 | |
137 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
138 | [0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 | |
139 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
140 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
141 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
142 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
143 | [0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 | |
144 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
145 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
146 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
147 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
148 | [0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 | |
149 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo | |
150 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
151 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
152 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
153 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
154 | [0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 | |
155 | [ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo | |
156 | [0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) | |
157 | [0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) | |
158 | [0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 | |
159 | [0-9a-f]+ <[^>]*> or \$4,\$4,\$1 | |
160 | #pass |