Update copyright years
[deliverable/binutils-gdb.git] / gas / testsuite / gas / nds32 / sys-reg.d
CommitLineData
6b9d3259
KLC
1#objdump: -d --prefix-addresses
2#name: nds32 sys-reg instructions
3#as:
4
5# Test system register instructions
6
7.*: file format .*
8
9
10Disassembly of section .text:
110+0000 <[^>]*> mfsr \$r0, \$CPU_VER
120+0004 <[^>]*> mfsr \$r0, \$CORE_ID
130+0008 <[^>]*> mfsr \$r0, \$ICM_CFG
140+000c <[^>]*> mfsr \$r0, \$DCM_CFG
150+0010 <[^>]*> mfsr \$r0, \$MMU_CFG
160+0014 <[^>]*> mfsr \$r0, \$MSC_CFG
170+0018 <[^>]*> mfsr \$r0, \$PSW
180+001c <[^>]*> mfsr \$r0, \$IPSW
190+0020 <[^>]*> mfsr \$r0, \$P_IPSW
200+0024 <[^>]*> mfsr \$r0, \$IVB
210+0028 <[^>]*> mfsr \$r0, \$INT_CTRL
220+002c <[^>]*> mfsr \$r0, \$EVA
230+0030 <[^>]*> mfsr \$r0, \$P_EVA
240+0034 <[^>]*> mfsr \$r0, \$ITYPE
250+0038 <[^>]*> mfsr \$r0, \$P_ITYPE
260+003c <[^>]*> mfsr \$r0, \$MERR
270+0040 <[^>]*> mfsr \$r0, \$IPC
280+0044 <[^>]*> mfsr \$r0, \$P_IPC
290+0048 <[^>]*> mfsr \$r0, \$OIPC
300+004c <[^>]*> mfsr \$r0, \$P_P0
310+0050 <[^>]*> mfsr \$r0, \$P_P1
320+0054 <[^>]*> mfsr \$r0, \$INT_MASK
330+0058 <[^>]*> mfsr \$r0, \$INT_MASK2
340+005c <[^>]*> mfsr \$r0, \$INT_PEND
350+0060 <[^>]*> mfsr \$r0, \$INT_PEND2
360+0064 <[^>]*> mfsr \$r0, \$INT_TRIGGER
370+0068 <[^>]*> mfsr \$r0, \$SP_USR
380+006c <[^>]*> mfsr \$r0, \$SP_PRIV
390+0070 <[^>]*> mfsr \$r0, \$INT_PRI
400+0074 <[^>]*> mfsr \$r0, \$INT_PRI2
410+0078 <[^>]*> mfsr \$r0, \$MMU_CTL
420+007c <[^>]*> mfsr \$r0, \$L1_PPTB
430+0080 <[^>]*> mfsr \$r0, \$TLB_VPN
440+0084 <[^>]*> mfsr \$r0, \$TLB_DATA
450+0088 <[^>]*> mfsr \$r0, \$TLB_MISC
460+008c <[^>]*> mfsr \$r0, \$VLPT_IDX
470+0090 <[^>]*> mfsr \$r0, \$ILMB
480+0094 <[^>]*> mfsr \$r0, \$DLMB
490+0098 <[^>]*> mfsr \$r0, \$CACHE_CTL
500+009c <[^>]*> mfsr \$r0, \$HSMP_SADDR
510+00a0 <[^>]*> mfsr \$r0, \$HSMP_EADDR
520+00a4 <[^>]*> mfsr \$r0, \$SDZ_CTL
530+00a8 <[^>]*> mfsr \$r0, \$MISC_CTL
540+00ac <[^>]*> mfsr \$r0, \$BPC0
550+00b0 <[^>]*> mfsr \$r0, \$BPC1
560+00b4 <[^>]*> mfsr \$r0, \$BPC2
570+00b8 <[^>]*> mfsr \$r0, \$BPC3
580+00bc <[^>]*> mfsr \$r0, \$BPC4
590+00c0 <[^>]*> mfsr \$r0, \$BPC5
600+00c4 <[^>]*> mfsr \$r0, \$BPC6
610+00c8 <[^>]*> mfsr \$r0, \$BPC7
620+00cc <[^>]*> mfsr \$r0, \$BPA0
630+00d0 <[^>]*> mfsr \$r0, \$BPA1
640+00d4 <[^>]*> mfsr \$r0, \$BPA2
650+00d8 <[^>]*> mfsr \$r0, \$BPA3
660+00dc <[^>]*> mfsr \$r0, \$BPA4
670+00e0 <[^>]*> mfsr \$r0, \$BPA5
680+00e4 <[^>]*> mfsr \$r0, \$BPA6
690+00e8 <[^>]*> mfsr \$r0, \$BPA7
700+00ec <[^>]*> mfsr \$r0, \$BPAM0
710+00f0 <[^>]*> mfsr \$r0, \$BPAM1
720+00f4 <[^>]*> mfsr \$r0, \$BPAM2
730+00f8 <[^>]*> mfsr \$r0, \$BPAM3
740+00fc <[^>]*> mfsr \$r0, \$BPAM4
750+0100 <[^>]*> mfsr \$r0, \$BPAM5
760+0104 <[^>]*> mfsr \$r0, \$BPAM6
770+0108 <[^>]*> mfsr \$r0, \$BPAM7
780+010c <[^>]*> mfsr \$r0, \$BPV0
790+0110 <[^>]*> mfsr \$r0, \$BPV1
800+0114 <[^>]*> mfsr \$r0, \$BPV2
810+0118 <[^>]*> mfsr \$r0, \$BPV3
820+011c <[^>]*> mfsr \$r0, \$BPV4
830+0120 <[^>]*> mfsr \$r0, \$BPV5
840+0124 <[^>]*> mfsr \$r0, \$BPV6
850+0128 <[^>]*> mfsr \$r0, \$BPV7
860+012c <[^>]*> mfsr \$r0, \$BPCID0
870+0130 <[^>]*> mfsr \$r0, \$BPCID1
880+0134 <[^>]*> mfsr \$r0, \$BPCID2
890+0138 <[^>]*> mfsr \$r0, \$BPCID3
900+013c <[^>]*> mfsr \$r0, \$BPCID4
910+0140 <[^>]*> mfsr \$r0, \$BPCID5
920+0144 <[^>]*> mfsr \$r0, \$BPCID6
930+0148 <[^>]*> mfsr \$r0, \$BPCID7
940+014c <[^>]*> mfsr \$r0, \$EDM_CFG
950+0150 <[^>]*> mfsr \$r0, \$EDMSW
960+0154 <[^>]*> mfsr \$r0, \$EDM_CTL
970+0158 <[^>]*> mfsr \$r0, \$EDM_DTR
980+015c <[^>]*> mfsr \$r0, \$BPMTC
990+0160 <[^>]*> mfsr \$r0, \$DIMBR
1000+0164 <[^>]*> mfsr \$r0, \$TECR0
1010+0168 <[^>]*> mfsr \$r0, \$TECR1
1020+016c <[^>]*> mfsr \$r0, \$PFMC0
1030+0170 <[^>]*> mfsr \$r0, \$PFMC1
1040+0174 <[^>]*> mfsr \$r0, \$PFMC2
1050+0178 <[^>]*> mfsr \$r0, \$PFM_CTL
1060+017c <[^>]*> mfsr \$r0, \$PRUSR_ACC_CTL
1070+0180 <[^>]*> mfsr \$r0, \$FUCOP_CTL
1080+0184 <[^>]*> mfsr \$r0, \$DMA_CFG
1090+0188 <[^>]*> mfsr \$r0, \$DMA_GCSW
1100+018c <[^>]*> mfsr \$r0, \$DMA_CHNSEL
1110+0190 <[^>]*> mfsr \$r0, \$DMA_ACT
1120+0194 <[^>]*> mfsr \$r0, \$DMA_SETUP
1130+0198 <[^>]*> mfsr \$r0, \$DMA_ISADDR
1140+019c <[^>]*> mfsr \$r0, \$DMA_ESADDR
1150+01a0 <[^>]*> mfsr \$r0, \$DMA_TCNT
1160+01a4 <[^>]*> mfsr \$r0, \$DMA_STATUS
1170+01a8 <[^>]*> mfsr \$r0, \$DMA_2DSET
1180+01ac <[^>]*> mfsr \$r0, \$DMA_2DSCTL
This page took 0.036578 seconds and 4 git commands to generate.