Commit | Line | Data |
---|---|---|
252b5132 RH |
1 | #objdump: -Dr |
2 | #name: PowerPC test 2 | |
3 | ||
4 | .*: +file format elf32-powerpc | |
5 | ||
7bbfa6f5 | 6 | Disassembly of section \.text: |
252b5132 RH |
7 | |
8 | 0+0000000 <foo>: | |
9 | 0: 60 00 00 00 nop | |
10 | 4: 60 00 00 00 nop | |
11 | 8: 60 00 00 00 nop | |
fdd12ef3 AM |
12 | c: 48 00 00 04 b 10 <foo\+0x10> |
13 | 10: 48 00 00 08 b 18 <foo\+0x18> | |
14 | 14: 48 00 00 00 b 14 <foo\+0x14> | |
252b5132 | 15 | 14: R_PPC_REL24 x |
fdd12ef3 | 16 | 18: 48 00 00 04 b 1c <foo\+0x1c> |
7bbfa6f5 | 17 | 18: R_PPC_REL24 \.data\+0x4 |
fdd12ef3 | 18 | 1c: 48 00 00 00 b 1c <foo\+0x1c> |
252b5132 | 19 | 1c: R_PPC_REL24 z |
fdd12ef3 | 20 | 20: 48 00 00 14 b 34 <foo\+0x34> |
252b5132 | 21 | 20: R_PPC_REL24 z\+0x14 |
fdd12ef3 AM |
22 | 24: 48 00 00 04 b 28 <foo\+0x28> |
23 | 28: 48 00 00 00 b 28 <foo\+0x28> | |
252b5132 | 24 | 28: R_PPC_REL24 a |
fdd12ef3 AM |
25 | 2c: 48 00 00 50 b 7c <apfour> |
26 | 30: 48 00 00 04 b 34 <foo\+0x34> | |
252b5132 | 27 | 30: R_PPC_REL24 a\+0x4 |
fdd12ef3 AM |
28 | 34: 48 00 00 4c b 80 <apfour\+0x4> |
29 | 38: 48 00 00 00 b 38 <foo\+0x38> | |
252b5132 | 30 | 38: R_PPC_LOCAL24PC a |
fdd12ef3 | 31 | 3c: 48 00 00 40 b 7c <apfour> |
7bbfa6f5 AM |
32 | 40: 00 00 00 40 \.long 0x40 |
33 | 40: R_PPC_ADDR32 \.text\+0x40 | |
7bbfa6f5 AM |
34 | 44: 00 00 00 4c \.long 0x4c |
35 | 44: R_PPC_ADDR32 \.text\+0x4c | |
36 | 48: 00 00 00 00 \.long 0x0 | |
252b5132 | 37 | 48: R_PPC_REL32 x |
7bbfa6f5 | 38 | 4c: 00 00 00 04 \.long 0x4 |
252b5132 | 39 | 4c: R_PPC_REL32 x\+0x4 |
632d447c | 40 | 50: 00 00 00 00 \.long 0x0 |
252b5132 | 41 | 50: R_PPC_REL32 z |
632d447c AM |
42 | 54: 00 00 00 04 \.long 0x4 |
43 | 54: R_PPC_REL32 \.data\+0x4 | |
44 | 58: 00 00 00 00 \.long 0x0 | |
252b5132 | 45 | 58: R_PPC_ADDR32 x |
632d447c AM |
46 | 5c: 00 00 00 04 \.long 0x4 |
47 | 5c: R_PPC_ADDR32 \.data\+0x4 | |
48 | 60: 00 00 00 00 \.long 0x0 | |
252b5132 | 49 | 60: R_PPC_ADDR32 z |
fdd12ef3 | 50 | 64: ff ff ff fc fnmsub f31,f31,f31,f31 |
252b5132 | 51 | 64: R_PPC_ADDR32 x\+0xf+ffffffc |
632d447c AM |
52 | 68: 00 00 00 00 \.long 0x0 |
53 | 68: R_PPC_ADDR32 \.data | |
fdd12ef3 | 54 | 6c: ff ff ff fc fnmsub f31,f31,f31,f31 |
252b5132 | 55 | 6c: R_PPC_ADDR32 z\+0xf+ffffffc |
7bbfa6f5 AM |
56 | 70: 00 00 00 08 \.long 0x8 |
57 | 74: 00 00 00 08 \.long 0x8 | |
252b5132 RH |
58 | |
59 | 0+0000078 <a>: | |
7bbfa6f5 | 60 | 78: 00 00 00 00 \.long 0x0 |
252b5132 RH |
61 | 78: R_PPC_ADDR32 a |
62 | ||
63 | 0+000007c <apfour>: | |
632d447c AM |
64 | 7c: 00 00 00 7c \.long 0x7c |
65 | 7c: R_PPC_ADDR32 \.text\+0x7c | |
66 | 80: 00 00 00 7c \.long 0x7c | |
67 | 80: R_PPC_ADDR32 \.text\+0x7c | |
fdd12ef3 | 68 | 84: ff ff ff fc fnmsub f31,f31,f31,f31 |
632d447c AM |
69 | 88: 00 00 00 7e \.long 0x7e |
70 | 88: R_PPC_ADDR32 \.text\+0x7e | |
7bbfa6f5 | 71 | 8c: 00 00 00 00 \.long 0x0 |
504c3621 | 72 | 90: 60 00 00 00 nop |
fdd12ef3 AM |
73 | 94: 40 a5 ff fc ble- cr1,90 <apfour\+0x14> |
74 | 98: 41 a9 ff f8 bgt- cr2,90 <apfour\+0x14> | |
75 | 9c: 40 8d ff f4 ble\+ cr3,90 <apfour\+0x14> | |
76 | a0: 41 91 ff f0 bgt\+ cr4,90 <apfour\+0x14> | |
77 | a4: 40 95 00 10 ble- cr5,b4 <nop> | |
78 | a8: 41 99 00 0c bgt- cr6,b4 <nop> | |
79 | ac: 40 bd 00 08 ble\+ cr7,b4 <nop> | |
80 | b0: 41 a1 00 04 bgt\+ b4 <nop> | |
7bbfa6f5 | 81 | Disassembly of section \.data: |
252b5132 RH |
82 | |
83 | 0+0000000 <x>: | |
7bbfa6f5 | 84 | 0: 00 00 00 00 \.long 0x0 |
252b5132 RH |
85 | |
86 | 0+0000004 <y>: | |
7bbfa6f5 | 87 | 4: 00 00 00 00 \.long 0x0 |