Commit | Line | Data |
---|---|---|
03417200 | 1 | #objdump: -drx -Mpower4 |
adadcc0c | 2 | #as: -mpower4 |
03417200 | 3 | #name: Power4 instructions |
adadcc0c | 4 | |
ab1f5dd1 | 5 | .* |
adadcc0c AM |
6 | .* |
7 | architecture: powerpc:common64, flags 0x0+11: | |
8 | HAS_RELOC, HAS_SYMS | |
9 | start address 0x0+ | |
10 | ||
11 | Sections: | |
12 | Idx Name +Size +VMA +LMA +File off +Algn | |
026122a6 | 13 | +0 \.text +0+108 +0+ +0+ +.* |
adadcc0c | 14 | +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE |
e3b0b0ab | 15 | +1 \.data +0+20 +0+ +0+ +.* |
adadcc0c AM |
16 | +CONTENTS, ALLOC, LOAD, DATA |
17 | +2 \.bss +0+ +0+ +0+ +.* | |
18 | +ALLOC | |
e3b0b0ab | 19 | +3 \.toc +0+20 +0+ +0+ +.* |
adadcc0c AM |
20 | +CONTENTS, ALLOC, LOAD, RELOC, DATA |
21 | SYMBOL TABLE: | |
5c799c07 AM |
22 | 0+ l +d +\.text 0+ (|\.text) |
23 | 0+ l +d +\.data 0+ (|\.data) | |
24 | 0+ l +d +\.bss 0+ (|\.bss) | |
adadcc0c | 25 | 0+ l +\.data 0+ dsym0 |
e3b0b0ab | 26 | 0+10 l +\.data 0+ dsym1 |
5c799c07 | 27 | 0+ l +d +\.toc 0+ (|\.toc) |
e3b0b0ab AM |
28 | 0+10 l +\.data 0+ usym0 |
29 | 0+20 l +\.data 0+ usym1 | |
adadcc0c AM |
30 | 0+ +\*UND\* 0+ esym0 |
31 | 0+ +\*UND\* 0+ esym1 | |
32 | ||
33 | ||
34 | Disassembly of section \.text: | |
35 | ||
36 | 0+ <\.text>: | |
ab1f5dd1 | 37 | .*: (e0 83 00 00|00 00 83 e0) lq r4,0\(r3\) |
e3b0b0ab | 38 | .*: R_PPC64_ADDR16_LO_DS \.data |
ab1f5dd1 | 39 | .*: (e0 83 00 .0|.0 00 83 e0) lq r4,.*\(r3\) |
e3b0b0ab | 40 | .*: R_PPC64_ADDR16_LO_DS \.data\+0x10 |
ab1f5dd1 | 41 | .*: (e0 83 00 .0|.0 00 83 e0) lq r4,.*\(r3\) |
e3b0b0ab | 42 | .*: R_PPC64_ADDR16_LO_DS \.data\+0x10 |
ab1f5dd1 | 43 | .*: (e0 83 00 .0|.0 00 83 e0) lq r4,.*\(r3\) |
e3b0b0ab | 44 | .*: R_PPC64_ADDR16_LO_DS \.data\+0x20 |
ab1f5dd1 | 45 | .*: (e0 83 00 00|00 00 83 e0) lq r4,0\(r3\) |
e3b0b0ab | 46 | .*: R_PPC64_ADDR16_LO_DS esym0 |
ab1f5dd1 | 47 | .*: (e0 83 00 00|00 00 83 e0) lq r4,0\(r3\) |
e3b0b0ab | 48 | .*: R_PPC64_ADDR16_LO_DS esym1 |
ab1f5dd1 | 49 | .*: (e0 82 00 00|00 00 82 e0) lq r4,0\(r2\) |
e3b0b0ab | 50 | .*: R_PPC64_TOC16_DS \.toc |
ab1f5dd1 | 51 | .*: (e0 82 00 .0|.0 00 82 e0) lq r4,.*\(r2\) |
e3b0b0ab | 52 | .*: R_PPC64_TOC16_DS \.toc\+0x10 |
ab1f5dd1 | 53 | .*: (e0 80 00 00|00 00 80 e0) lq r4,0\(0\) |
e3b0b0ab | 54 | .*: R_PPC64_ADDR16_LO_DS \.text |
ab1f5dd1 | 55 | .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\) |
e3b0b0ab | 56 | .*: R_PPC64_GOT16_DS dsym0 |
ab1f5dd1 | 57 | .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\) |
e3b0b0ab | 58 | .*: R_PPC64_GOT16_LO_DS dsym0 |
ab1f5dd1 | 59 | .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\) |
334d91b9 | 60 | .*: R_PPC64_PLT16_LO_DS dsym0 |
ab1f5dd1 | 61 | .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\) |
e3b0b0ab | 62 | .*: R_PPC64_SECTOFF_DS \.data\+0x10 |
ab1f5dd1 | 63 | .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\) |
e3b0b0ab | 64 | .*: R_PPC64_SECTOFF_LO_DS \.data\+0x10 |
ab1f5dd1 AM |
65 | .*: (e0 c4 00 20|20 00 c4 e0) lq r6,32\(r4\) |
66 | .*: (f8 c7 00 02|02 00 c7 f8) stq r6,0\(r7\) | |
67 | .*: (f8 c7 00 12|12 00 c7 f8) stq r6,16\(r7\) | |
68 | .*: (f8 c7 ff f2|f2 ff c7 f8) stq r6,-16\(r7\) | |
69 | .*: (f8 c7 80 02|02 80 c7 f8) stq r6,-32768\(r7\) | |
70 | .*: (f8 c7 7f f2|f2 7f c7 f8) stq r6,32752\(r7\) | |
71 | .*: (00 00 02 00|00 02 00 00) attn | |
72 | .*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 | |
73 | .*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3 | |
74 | .*: (7c 68 11 20|20 11 68 7c) mtcrf 129,r3 | |
75 | .*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3 | |
76 | .*: (7c 70 21 20|20 21 70 7c) mtocrf 2,r3 | |
77 | .*: (7c 70 41 20|20 41 70 7c) mtocrf 4,r3 | |
78 | .*: (7c 70 81 20|20 81 70 7c) mtocrf 8,r3 | |
79 | .*: (7c 71 01 20|20 01 71 7c) mtocrf 16,r3 | |
80 | .*: (7c 72 01 20|20 01 72 7c) mtocrf 32,r3 | |
81 | .*: (7c 74 01 20|20 01 74 7c) mtocrf 64,r3 | |
82 | .*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3 | |
83 | .*: (7c 60 00 26|26 00 60 7c) mfcr r3 | |
84 | .*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1 | |
85 | .*: (7c 70 20 26|26 20 70 7c) mfocrf r3,2 | |
86 | .*: (7c 70 40 26|26 40 70 7c) mfocrf r3,4 | |
87 | .*: (7c 70 80 26|26 80 70 7c) mfocrf r3,8 | |
88 | .*: (7c 71 00 26|26 00 71 7c) mfocrf r3,16 | |
89 | .*: (7c 72 00 26|26 00 72 7c) mfocrf r3,32 | |
90 | .*: (7c 74 00 26|26 00 74 7c) mfocrf r3,64 | |
91 | .*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128 | |
92 | .*: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2 | |
93 | .*: (7c 23 27 ec|ec 27 23 7c) dcbzl r3,r4 | |
94 | .*: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6 | |
95 | .*: (e0 40 00 10|10 00 40 e0) lq r2,16\(0\) | |
96 | .*: (e0 05 00 10|10 00 05 e0) lq r0,16\(r5\) | |
97 | .*: (e0 45 00 10|10 00 45 e0) lq r2,16\(r5\) | |
98 | .*: (f8 40 00 12|12 00 40 f8) stq r2,16\(0\) | |
99 | .*: (f8 05 00 12|12 00 05 f8) stq r0,16\(r5\) | |
100 | .*: (f8 45 00 12|12 00 45 f8) stq r2,16\(r5\) | |
4bc0608a | 101 | .*: (7c 00 03 e4|e4 03 00 7c) slbia |
dc302c00 PB |
102 | .*: (7c 00 04 ac|ac 04 00 7c) hwsync |
103 | .*: (7c 00 04 ac|ac 04 00 7c) hwsync | |
104 | .*: (7c 00 04 ac|ac 04 00 7c) hwsync | |
105 | .*: (7c 20 04 ac|ac 04 20 7c) lwsync | |
106 | .*: (7c 20 04 ac|ac 04 20 7c) lwsync | |
107 | .*: (7c 40 04 ac|ac 04 40 7c) ptesync | |
108 | .*: (7c 40 04 ac|ac 04 40 7c) ptesync | |
026122a6 PB |
109 | .*: (7e 80 30 28|28 30 80 7e) lwarx r20,0,r6 |
110 | .*: (7e 81 30 28|28 30 81 7e) lwarx r20,r1,r6 | |
111 | .*: (7e a0 38 a8|a8 38 a0 7e) ldarx r21,0,r7 | |
112 | .*: (7e a1 38 a8|a8 38 a1 7e) ldarx r21,r1,r7 | |
113 | .*: (7e c0 41 2d|2d 41 c0 7e) stwcx\. r22,0,r8 | |
114 | .*: (7e c1 41 2d|2d 41 c1 7e) stwcx\. r22,r1,r8 | |
115 | .*: (7e e0 49 ad|ad 49 e0 7e) stdcx\. r23,0,r9 | |
116 | .*: (7e e1 49 ad|ad 49 e1 7e) stdcx\. r23,r1,r9 | |
117 | #pass |