projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| d2e6c9a3 AF |
1 | # VLE Instructions for Improving Interrupt Handler Efficiency (e200z760RM.pdf) |
| 2 | # Original Engineering Bullet (EB696.pdf) contains two writings of load instructions | |
| 3 | # and has no ones for MCSRRs. | |
| 4 | ||
| 5 | # e_lmvgprw, e_stmvgprw - load/store multiple volatile GPRs (r0, r3:r12) | |
| 6 | # e_lmvsprw, e_stmvsprw - load/store multiple volatile SPRs (CR, LR, CTR, and XER) | |
| 7 | # e_lmvsrrw, e_stmvsrrw - load/store multiple volatile SRRs (SRR0, SRR1) | |
| 8 | # e_lmvcsrrw, e_stmvcsrrw - load/store multiple volatile CSRRs (CSRR0, CSRR1) | |
| 9 | # e_lmvdsrrw, e_stmvdsrrw - load/store multiple volatile DSRRs (DSRR0, DSRR1) | |
| 10 | # e_lmvmcsrrw, e_stmvmcsrrw - load/store multiple volatile MCSRRs (MCSRR0, MCSRR1) | |
| 11 | ||
| 12 | .text | |
| 13 | prolog: | |
| 14 | e_stmvgprw 0x00 (r1) | |
| 15 | e_stmvsprw 0x04 (r2) | |
| 16 | e_stmvsrrw 0x08 (r3) | |
| 17 | e_stmvcsrrw 0x0c (r4) | |
| 18 | e_stmvdsrrw 0x10 (r5) | |
| 19 | e_stmvmcsrrw 0x14 (r6) | |
| 20 | ||
| 21 | epilog: | |
| 22 | e_lmvgprw 0x18 (r7) | |
| 23 | e_lmvsprw 0x1c (r8) | |
| 24 | e_lmvsrrw 0x20 (r9) | |
| 25 | e_lmvcsrrw 0x24 (r10) | |
| 26 | e_lmvdsrrw 0x28 (r11) | |
| 27 | e_lmvmcsrrw 0x2c (r12) | |
| 28 | ||
| 29 | epilog_alt: | |
| 30 | e_ldmvgprw 0x30 (r13) | |
| 31 | e_ldmvsprw 0x34 (r14) | |
| 32 | e_ldmvsrrw 0x38 (r15) | |
| 33 | e_ldmvcsrrw 0x3c (r16) | |
| 34 | e_ldmvdsrrw 0x40 (r17) |