Commit | Line | Data |
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ee1ee5b5 NC |
1 | /* |
2 | * test relax | |
3 | * bittst.c <-> bittst! : register number must be in 0-15 | |
4 | ||
5 | * Author: ligang | |
6 | */ | |
7 | ||
8 | /* This macro transform 32b instruction to 16b. */ | |
9 | .macro tran3216 insn32, insn16 | |
10 | ||
11 | \insn32 r0, 2 #32b -> 16b | |
12 | \insn16 r0, 2 | |
13 | ||
14 | \insn32 r15, 4 #32b -> 16b | |
15 | \insn16 r15, 4 | |
16 | ||
17 | \insn32 r15, 1 #32b -> 16b | |
18 | \insn16 r15, 1 | |
19 | ||
20 | \insn16 r15, 3 | |
21 | \insn32 r15, 3 #32b -> 16b | |
22 | ||
23 | \insn32 r8, 2 #32b -> 16b | |
24 | \insn32 r8, 2 #32b -> 16b | |
25 | ||
26 | \insn32 r15, 1 #No transform | |
27 | \insn32 r26, 4 | |
28 | ||
29 | .endm | |
30 | ||
31 | /* This macro transform 16b instruction to 32b. */ | |
32 | .macro tran1632 insn32, insn16 | |
33 | .align 4 | |
34 | ||
35 | \insn16 r0, 2 #16b -> 32b | |
36 | \insn32 r20, 2 | |
37 | ||
38 | \insn16 r15, 4 #16b -> 32b | |
39 | \insn32 r25, 4 | |
40 | ||
41 | \insn16 r15, 1 #16b -> 32b | |
42 | \insn32 r25, 1 | |
43 | ||
44 | \insn16 r8, 1 #No transform | |
45 | \insn16 r8, 1 #No transform | |
46 | ||
47 | \insn16 r6, 4 #No transform | |
48 | \insn32 r6, 4 #32b -> 16b | |
49 | ||
50 | \insn32 r7, 3 #32b -> 16b | |
51 | \insn16 r7, 3 #No transform | |
52 | ||
53 | .endm | |
54 | ||
55 | .text | |
56 | ||
57 | tran3216 "bittst.c", "bittst!" | |
58 | tran1632 "bittst.c", "bittst!" | |
59 |