Commit | Line | Data |
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ee1ee5b5 NC |
1 | /* |
2 | * test relax | |
3 | * ldi <-> ldiu! : for ldiu! : register number must be in 0-15, simm16: [0-255] | |
4 | * (1)ldi rD, simm16 : rD = simm16 | |
5 | * (2)ldiu! rD, imm8 : rD = ZE(imm8) | |
6 | ||
7 | * Author: ligang | |
8 | */ | |
9 | ||
10 | /* This macro transform 32b instruction to 16b. */ | |
11 | .macro tran3216 insn32, insn16 | |
12 | .align 4 | |
13 | ||
14 | \insn32 r2, 0 #32b -> 16b | |
15 | \insn16 r2, 0 | |
16 | ||
17 | \insn32 r3, 255 #32b -> 16b | |
18 | \insn16 r3, 255 | |
19 | ||
20 | \insn32 r4, 9 #32b -> 16b | |
21 | \insn32 r4, 9 #32b -> 16b | |
22 | ||
23 | \insn16 r3, 255 | |
24 | \insn32 r3, 255 #32b -> 16b | |
25 | ||
26 | \insn32 r8, 3 #No transform | |
27 | \insn32 r25, 3 #No transform | |
28 | ||
29 | ||
30 | .endm | |
31 | ||
32 | /* This macro transform 16b instruction to 32b. */ | |
33 | .macro tran1632 insn32, insn16 | |
34 | .align 4 | |
35 | ||
36 | \insn16 r2, 0 #16b -> 32b | |
37 | \insn32 r25, 0 | |
38 | ||
39 | \insn16 r3, 255 #16b -> 32b | |
40 | \insn32 r23, 1 | |
41 | ||
42 | \insn16 r15, 255 #No transform | |
43 | \insn32 r15, 255 | |
44 | ||
45 | \insn16 r8, 3 #No transform | |
46 | \insn16 r8, 3 #No transform | |
47 | ||
48 | .endm | |
49 | ||
50 | .text | |
51 | ||
52 | tran3216 "ldi", "ldiu!" | |
53 | tran1632 "ldi", "ldiu!" |