Commit | Line | Data |
---|---|---|
c3b7224a NC |
1 | /* |
2 | * tests for load/store instruction relaxation | |
3 | * | |
4 | * Author: libin | |
5 | */ | |
6 | ||
7 | .include "relaxation_macro.h" | |
8 | ||
9 | .macro _ls_op_pattern insn | |
10 | .balign 2 | |
11 | insn_32 "\insn r0, [r0,0]" | |
12 | insn_32 "\insn r15, [r0,0]" | |
13 | insn_32 "\insn r0, [r7,0]" | |
14 | insn_32 "\insn r15, [r7,0]" | |
15 | /* NOTE: offset MUST be word aligned */ | |
16 | insn_32 "\insn r0, [r0,124]" | |
17 | insn_32 "\insn r15, [r0,124]" | |
18 | insn_32 "\insn r0, [r7,124]" | |
19 | insn_32 "\insn r15, [r7,124]" | |
20 | ||
21 | tran_16_32 "\insn! r0,[r0,124]", "\insn r0,[r0,124]" | |
22 | ||
23 | /* shouldn't alter */ | |
24 | insn_32 "\insn r16, [r0, 0]" | |
25 | insn_32 "\insn r0, [r8, 124]" | |
26 | insn_32 "\insn r16, [r8, 124]" | |
27 | insn_32 "\insn r0, [r7, -1]" | |
28 | insn_32 "\insn r0, [r7, 128]" | |
29 | .endm | |
30 | ||
31 | .text | |
32 | /* lw/sw rD,[rA,SImm15] -> lw!/sw! rD,[rA,Imm5] */ | |
33 | _ls_op_pattern "lw" | |
34 | _ls_op_pattern "sw" | |
35 | ||
36 | /* ldi rD,SImm16 -> ldiu! rD,Imm6 */ | |
37 | .balign 2 | |
38 | insn_32 "ldi r0, 0" | |
39 | insn_32 "ldi r15, 0" | |
40 | insn_32 "ldi r0, 31" | |
41 | insn_32 "ldi r15, 31" | |
42 | ||
43 | tran_16_32 "ldiu! r0, 0", "ldi r0, 0" | |
44 | ||
45 | /* shouldn't alter */ | |
46 | insn_32 "ldi r16, 0" | |
47 | insn_32 "ldi r0, -1" | |
48 | insn_32 "ldi r0, 32" | |
49 | insn_32 "ldi r16, 32" | |
50 | ||
51 | /* | |
52 | * lw rD,[rA]+,SImm12 -> pop! rD | |
53 | * | |
54 | * r0: stack pointer(sp) | |
55 | */ | |
56 | insn_32 "lw r2, [r0]+, 4" | |
57 | insn_32 "lw r15, [r0]+, 4" | |
58 | ||
59 | /* shouldn't alter */ | |
60 | insn_32 "lw r16, [r0]+, 4" | |
61 | insn_32 "lw r4, [r2]+, 4" | |
62 | insn_32 "lw r4, [r0]+, -4" | |
63 | ||
64 | /* sw rD,[rA,SImm12]+ -> push! rD */ | |
65 | insn_32 "sw r2, [r0, -4]+" | |
66 | insn_32 "sw r15, [r0, -4]+" | |
67 | ||
68 | /* shouldn't alter */ | |
69 | insn_32 "sw r16, [r0, -4]+" | |
70 | insn_32 "sw r4, [r2, -4]+" | |
71 | insn_32 "sw r4, [r0, 4]+" |