[deliverable/binutils-gdb.git] / gas / testsuite / gas / score / logical_32.s

/*
 * tests for logical instruction relaxation
 *
 * Author: libin
 */

.include "relaxation_macro.h"

.macro _logical_op_pattern insn insn1
  insn_32 "\insn r0, r0, r15"

  tran_16_32 "\insn! r0, r15", "\insn r0, r0, r15"

  /* shouldn't alter */
  .set r1
  insn_32 "\insn1  r0,  r0,  r15"
  insn_32 "\insn   r0,  r0,  r16"
  insn_32 "\insn   r16, r16, r0"
  insn_32 "\insn   r16, r16, r17"
  insn_32 "\insn   r0,  r1,  r2"
.endm

.text
/* and/or rD,rA,rB -> and!/or! rD,rA */
_logical_op_pattern "and", "and.c"
_logical_op_pattern "or",  "or.c"
Commit	Line	Data
c3b7224a NC	1	/*
	2	* tests for logical instruction relaxation
	3	*
	4	* Author: libin
	5	*/
	6
	7	.include "relaxation_macro.h"
	8
	9	.macro _logical_op_pattern insn insn1
	10	insn_32 "\insn r0, r0, r15"
	11
	12	tran_16_32 "\insn! r0, r15", "\insn r0, r0, r15"
	13
	14	/* shouldn't alter */
	15	.set r1
	16	insn_32 "\insn1 r0, r0, r15"
	17	insn_32 "\insn r0, r0, r16"
	18	insn_32 "\insn r16, r16, r0"
	19	insn_32 "\insn r16, r16, r17"
	20	insn_32 "\insn r0, r1, r2"
	21	.endm
	22
	23	.text
	24	/* and/or rD,rA,rB -> and!/or! rD,rA */
	25	_logical_op_pattern "and", "and.c"
	26	_logical_op_pattern "or", "or.c"