Commit | Line | Data |
---|---|---|
ee1ee5b5 NC |
1 | /* |
2 | * test relax | |
3 | * pre sw <-> push! : offset == -4 | |
4 | * syntax: | |
5 | sw rD, [rA, simm12]+ : rD and rA can be 0-31 | |
6 | push! rD, [rAg0] : rAg0 must be in 0-7, rD can be 0-31 | |
7 | ||
8 | * Author: ligang | |
9 | */ | |
10 | ||
11 | /* This macro transform 32b instruction to 16b. */ | |
12 | .macro tran3216 insn32, insn16 | |
13 | .align 4 | |
14 | ||
15 | \insn32 r0, [r2, -4]+ #32b -> 16b | |
16 | \insn16 r0, [r2] | |
17 | ||
18 | \insn32 r23, [r7, -4]+ #32b -> 16b | |
19 | \insn16 r23, [r7] | |
20 | ||
21 | \insn32 r15, [r0, -4]+ #32b -> 16b | |
22 | \insn16 r15, [r0] | |
23 | ||
24 | \insn16 r15, [r7] | |
25 | \insn32 r15, [r7, -4]+ #32b -> 16b | |
26 | ||
27 | \insn32 r25, [r3, -4]+ #32b -> 16b | |
28 | \insn32 r25, [r3, -4]+ #32b -> 16b | |
29 | ||
30 | \insn32 r24, [r13, -4]+ #No transform | |
31 | \insn32 r23, [r7, -5]+ #No transform | |
32 | ||
33 | .endm | |
34 | ||
35 | /* This macro transform 16b instruction to 32b. */ | |
36 | .macro tran1632 insn32, insn16 | |
37 | .align 4 | |
38 | ||
39 | \insn16 r0, [r7] #16b -> 32b | |
40 | \insn32 r25, [r13, -4]+ | |
41 | ||
42 | \insn16 r25, [r0] #16b -> 32b | |
43 | \insn32 r18, [r23, -4]+ | |
44 | ||
45 | \insn16 r6, [r3] #No transform | |
46 | \insn16 r6, [r3] #No transform | |
47 | ||
48 | \insn16 r3, [r7] #No transform | |
49 | \insn32 r3, [r7, -4]+ | |
50 | ||
51 | .endm | |
52 | ||
53 | tran3216 "sw", "push!" | |
54 | tran1632 "sw", "push!" |