* serial.h (SERIAL_SET_TTY_STATE): Comment return value.
[deliverable/binutils-gdb.git] / gdb / a29k-tdep.c
CommitLineData
dd3b648e 1/* Target-machine dependent code for the AMD 29000
7b2bcbf5 2 Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
dd3b648e
RP
3 Contributed by Cygnus Support. Written by Jim Kingdon.
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
99a7de40
JG
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
dd3b648e
RP
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
99a7de40
JG
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
dd3b648e
RP
20
21#include "defs.h"
22#include "gdbcore.h"
dd3b648e
RP
23#include "frame.h"
24#include "value.h"
dd3b648e
RP
25#include "symtab.h"
26#include "inferior.h"
8f86a4e4 27#include "gdbcmd.h"
dd3b648e 28
946f014b
JG
29/* If all these bits in an instruction word are zero, it is a "tag word"
30 which precedes a function entry point and gives stack traceback info.
31 This used to be defined as 0xff000000, but that treated 0x00000deb as
32 a tag word, while it is really used as a breakpoint. */
33#define TAGWORD_ZERO_MASK 0xff00f800
34
7730bd5a
JG
35extern CORE_ADDR text_start; /* FIXME, kludge... */
36
8f86a4e4
JG
37/* The user-settable top of the register stack in virtual memory. We
38 won't attempt to access any stored registers above this address, if set
39 nonzero. */
40
41static CORE_ADDR rstack_high_address = UINT_MAX;
42
dd3b648e
RP
43/* Structure to hold cached info about function prologues. */
44struct prologue_info
45{
46 CORE_ADDR pc; /* First addr after fn prologue */
47 unsigned rsize, msize; /* register stack frame size, mem stack ditto */
48 unsigned mfp_used : 1; /* memory frame pointer used */
49 unsigned rsize_valid : 1; /* Validity bits for the above */
50 unsigned msize_valid : 1;
51 unsigned mfp_valid : 1;
52};
53
54/* Examine the prologue of a function which starts at PC. Return
55 the first addess past the prologue. If MSIZE is non-NULL, then
56 set *MSIZE to the memory stack frame size. If RSIZE is non-NULL,
57 then set *RSIZE to the register stack frame size (not including
58 incoming arguments and the return address & frame pointer stored
59 with them). If no prologue is found, *RSIZE is set to zero.
60 If no prologue is found, or a prologue which doesn't involve
61 allocating a memory stack frame, then set *MSIZE to zero.
62
63 Note that both msize and rsize are in bytes. This is not consistent
64 with the _User's Manual_ with respect to rsize, but it is much more
65 convenient.
66
67 If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory
68 frame pointer is being used. */
69CORE_ADDR
70examine_prologue (pc, rsize, msize, mfp_used)
71 CORE_ADDR pc;
72 unsigned *msize;
73 unsigned *rsize;
74 int *mfp_used;
75{
76 long insn;
77 CORE_ADDR p = pc;
1ab3bf1b 78 struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc);
dd3b648e
RP
79 struct prologue_info *mi = 0;
80
1ab3bf1b 81 if (msymbol != NULL)
07df4831 82 mi = (struct prologue_info *) msymbol -> info;
dd3b648e
RP
83
84 if (mi != 0)
85 {
86 int valid = 1;
87 if (rsize != NULL)
88 {
89 *rsize = mi->rsize;
90 valid &= mi->rsize_valid;
91 }
92 if (msize != NULL)
93 {
94 *msize = mi->msize;
95 valid &= mi->msize_valid;
96 }
97 if (mfp_used != NULL)
98 {
99 *mfp_used = mi->mfp_used;
100 valid &= mi->mfp_valid;
101 }
102 if (valid)
103 return mi->pc;
104 }
105
106 if (rsize != NULL)
107 *rsize = 0;
108 if (msize != NULL)
109 *msize = 0;
110 if (mfp_used != NULL)
111 *mfp_used = 0;
112
113 /* Prologue must start with subtracting a constant from gr1.
114 Normally this is sub gr1,gr1,<rsize * 4>. */
115 insn = read_memory_integer (p, 4);
116 if ((insn & 0xffffff00) != 0x25010100)
117 {
118 /* If the frame is large, instead of a single instruction it
119 might be a pair of instructions:
120 const <reg>, <rsize * 4>
121 sub gr1,gr1,<reg>
122 */
123 int reg;
124 /* Possible value for rsize. */
125 unsigned int rsize0;
126
127 if ((insn & 0xff000000) != 0x03000000)
128 {
129 p = pc;
130 goto done;
131 }
132 reg = (insn >> 8) & 0xff;
133 rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff));
134 p += 4;
135 insn = read_memory_integer (p, 4);
136 if ((insn & 0xffffff00) != 0x24010100
137 || (insn & 0xff) != reg)
138 {
139 p = pc;
140 goto done;
141 }
142 if (rsize != NULL)
143 *rsize = rsize0;
144 }
145 else
146 {
147 if (rsize != NULL)
148 *rsize = (insn & 0xff);
149 }
150 p += 4;
151
7b2bcbf5 152 /* Next instruction ought to be asgeu V_SPILL,gr1,rab.
d0b04c6a
SG
153 * We don't check the vector number to allow for kernel debugging. The
154 * kernel will use a different trap number.
7b2bcbf5
JG
155 * If this insn is missing, we just keep going; Metaware R2.3u compiler
156 * generates prologue that intermixes initializations and puts the asgeu
157 * way down.
d0b04c6a 158 */
dd3b648e 159 insn = read_memory_integer (p, 4);
7b2bcbf5 160 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
dd3b648e 161 {
7b2bcbf5 162 p += 4;
dd3b648e 163 }
dd3b648e
RP
164
165 /* Next instruction usually sets the frame pointer (lr1) by adding
166 <size * 4> from gr1. However, this can (and high C does) be
167 deferred until anytime before the first function call. So it is
d0b04c6a
SG
168 OK if we don't see anything which sets lr1.
169 To allow for alternate register sets (gcc -mkernel-registers) the msp
170 register number is a compile time constant. */
171
dd3b648e
RP
172 /* Normally this is just add lr1,gr1,<size * 4>. */
173 insn = read_memory_integer (p, 4);
174 if ((insn & 0xffffff00) == 0x15810100)
175 p += 4;
176 else
177 {
178 /* However, for large frames it can be
179 const <reg>, <size *4>
180 add lr1,gr1,<reg>
181 */
182 int reg;
183 CORE_ADDR q;
184
185 if ((insn & 0xff000000) == 0x03000000)
186 {
187 reg = (insn >> 8) & 0xff;
188 q = p + 4;
189 insn = read_memory_integer (q, 4);
190 if ((insn & 0xffffff00) == 0x14810100
191 && (insn & 0xff) == reg)
192 p = q;
193 }
194 }
195
196 /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory
197 frame pointer is in use. We just check for add lr<anything>,msp,0;
198 we don't check this rsize against the first instruction, and
199 we don't check that the trace-back tag indicates a memory frame pointer
200 is in use.
d0b04c6a
SG
201 To allow for alternate register sets (gcc -mkernel-registers) the msp
202 register number is a compile time constant.
dd3b648e
RP
203
204 The recommended instruction is actually "sll lr<whatever>,msp,0".
205 We check for that, too. Originally Jim Kingdon's code seemed
206 to be looking for a "sub" instruction here, but the mask was set
207 up to lose all the time. */
208 insn = read_memory_integer (p, 4);
d0b04c6a
SG
209 if (((insn & 0xff80ffff) == (0x15800000|(MSP_HW_REGNUM<<8))) /* add */
210 || ((insn & 0xff80ffff) == (0x81800000|(MSP_HW_REGNUM<<8)))) /* sll */
dd3b648e
RP
211 {
212 p += 4;
213 if (mfp_used != NULL)
214 *mfp_used = 1;
215 }
216
217 /* Next comes a subtraction from msp to allocate a memory frame,
218 but only if a memory frame is
219 being used. We don't check msize against the trace-back tag.
220
d0b04c6a
SG
221 To allow for alternate register sets (gcc -mkernel-registers) the msp
222 register number is a compile time constant.
223
dd3b648e
RP
224 Normally this is just
225 sub msp,msp,<msize>
226 */
227 insn = read_memory_integer (p, 4);
d0b04c6a
SG
228 if ((insn & 0xffffff00) ==
229 (0x25000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8)))
dd3b648e
RP
230 {
231 p += 4;
d0b04c6a 232 if (msize != NULL)
dd3b648e
RP
233 *msize = insn & 0xff;
234 }
235 else
236 {
237 /* For large frames, instead of a single instruction it might
238 be
239
240 const <reg>, <msize>
241 consth <reg>, <msize> ; optional
242 sub msp,msp,<reg>
243 */
244 int reg;
245 unsigned msize0;
246 CORE_ADDR q = p;
247
248 if ((insn & 0xff000000) == 0x03000000)
249 {
250 reg = (insn >> 8) & 0xff;
251 msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff);
252 q += 4;
253 insn = read_memory_integer (q, 4);
254 /* Check for consth. */
255 if ((insn & 0xff000000) == 0x02000000
256 && (insn & 0x0000ff00) == reg)
257 {
258 msize0 |= (insn << 8) & 0xff000000;
259 msize0 |= (insn << 16) & 0x00ff0000;
260 q += 4;
261 insn = read_memory_integer (q, 4);
262 }
263 /* Check for sub msp,msp,<reg>. */
d0b04c6a
SG
264 if ((insn & 0xffffff00) ==
265 (0x24000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8))
dd3b648e
RP
266 && (insn & 0xff) == reg)
267 {
268 p = q + 4;
269 if (msize != NULL)
270 *msize = msize0;
271 }
272 }
273 }
274
7b2bcbf5
JG
275 /* Next instruction might be asgeu V_SPILL,gr1,rab.
276 * We don't check the vector number to allow for kernel debugging. The
277 * kernel will use a different trap number.
278 * Metaware R2.3u compiler
279 * generates prologue that intermixes initializations and puts the asgeu
280 * way down after everything else.
281 */
282 insn = read_memory_integer (p, 4);
283 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
284 {
285 p += 4;
286 }
287
dd3b648e 288 done:
1ab3bf1b 289 if (msymbol != NULL)
dd3b648e
RP
290 {
291 if (mi == 0)
292 {
293 /* Add a new cache entry. */
294 mi = (struct prologue_info *)xmalloc (sizeof (struct prologue_info));
07df4831 295 msymbol -> info = (char *)mi;
dd3b648e
RP
296 mi->rsize_valid = 0;
297 mi->msize_valid = 0;
298 mi->mfp_valid = 0;
299 }
300 /* else, cache entry exists, but info is incomplete. */
301 mi->pc = p;
302 if (rsize != NULL)
303 {
304 mi->rsize = *rsize;
305 mi->rsize_valid = 1;
306 }
307 if (msize != NULL)
308 {
309 mi->msize = *msize;
310 mi->msize_valid = 1;
311 }
312 if (mfp_used != NULL)
313 {
314 mi->mfp_used = *mfp_used;
315 mi->mfp_valid = 1;
316 }
317 }
318 return p;
319}
320
321/* Advance PC across any function entry prologue instructions
322 to reach some "real" code. */
323
324CORE_ADDR
325skip_prologue (pc)
326 CORE_ADDR pc;
327{
328 return examine_prologue (pc, (unsigned *)NULL, (unsigned *)NULL,
329 (int *)NULL);
330}
d0b04c6a
SG
331/*
332 * Examine the one or two word tag at the beginning of a function.
333 * The tag word is expect to be at 'p', if it is not there, we fail
334 * by returning 0. The documentation for the tag word was taken from
335 * page 7-15 of the 29050 User's Manual. We are assuming that the
336 * m bit is in bit 22 of the tag word, which seems to be the agreed upon
337 * convention today (1/15/92).
338 * msize is return in bytes.
339 */
340static int /* 0/1 - failure/success of finding the tag word */
341examine_tag(p, is_trans, argcount, msize, mfp_used)
342 CORE_ADDR p;
343 int *is_trans;
344 int *argcount;
345 unsigned *msize;
346 int *mfp_used;
347{
348 unsigned int tag1, tag2;
349
350 tag1 = read_memory_integer (p, 4);
946f014b 351 if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */
d0b04c6a
SG
352 return 0;
353 if (tag1 & (1<<23)) /* A two word tag */
354 {
355 tag2 = read_memory_integer (p+4, 4);
356 if (msize)
357 *msize = tag2;
358 }
359 else /* A one word tag */
360 {
361 if (msize)
362 *msize = tag1 & 0x7ff;
363 }
364 if (is_trans)
7f2ffa58
JK
365 *is_trans = ((tag1 & (1<<21)) ? 1 : 0);
366 /* Note that this includes the frame pointer and the return address
367 register, so the actual number of registers of arguments is two less.
368 argcount can be zero, however, sometimes, for strange assembler
369 routines. */
d0b04c6a
SG
370 if (argcount)
371 *argcount = (tag1 >> 16) & 0x1f;
372 if (mfp_used)
373 *mfp_used = ((tag1 & (1<<22)) ? 1 : 0);
374 return(1);
375}
dd3b648e
RP
376
377/* Initialize the frame. In addition to setting "extra" frame info,
378 we also set ->frame because we use it in a nonstandard way, and ->pc
379 because we need to know it to get the other stuff. See the diagram
d7d35f00 380 of stacks and the frame cache in tm-a29k.h for more detail. */
dd3b648e
RP
381static void
382init_frame_info (innermost_frame, fci)
383 int innermost_frame;
384 struct frame_info *fci;
385{
386 CORE_ADDR p;
387 long insn;
388 unsigned rsize;
389 unsigned msize;
d0b04c6a 390 int mfp_used, trans;
dd3b648e
RP
391 struct symbol *func;
392
393 p = fci->pc;
394
395 if (innermost_frame)
396 fci->frame = read_register (GR1_REGNUM);
397 else
23a8e291 398 fci->frame = fci->next->frame + fci->next->rsize;
dd3b648e
RP
399
400#if CALL_DUMMY_LOCATION == ON_STACK
401 This wont work;
402#else
403 if (PC_IN_CALL_DUMMY (p, 0, 0))
404#endif
405 {
406 fci->rsize = DUMMY_FRAME_RSIZE;
407 /* This doesn't matter since we never try to get locals or args
408 from a dummy frame. */
409 fci->msize = 0;
410 /* Dummy frames always use a memory frame pointer. */
411 fci->saved_msp =
412 read_register_stack_integer (fci->frame + DUMMY_FRAME_RSIZE - 4, 4);
d0b04c6a 413 fci->flags |= (TRANSPARENT|MFP_USED);
dd3b648e
RP
414 return;
415 }
416
417 func = find_pc_function (p);
418 if (func != NULL)
419 p = BLOCK_START (SYMBOL_BLOCK_VALUE (func));
420 else
421 {
422 /* Search backward to find the trace-back tag. However,
423 do not trace back beyond the start of the text segment
424 (just as a sanity check to avoid going into never-never land). */
63dcc380 425#if 1
dd3b648e 426 while (p >= text_start
946f014b 427 && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0)
dd3b648e 428 p -= 4;
63dcc380
JK
429#else /* 0 */
430 char pat[4] = {0, 0, 0, 0};
431 char mask[4];
432 char insn_raw[4];
433 store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK);
434 /* Enable this once target_search is enabled and tested. */
435 target_search (4, pat, mask, p, -4, text_start, p+1, &p, &insn_raw);
436 insn = extract_unsigned_integer (insn_raw, 4);
437#endif /* 0 */
438
dd3b648e
RP
439 if (p < text_start)
440 {
441 /* Couldn't find the trace-back tag.
442 Something strange is going on. */
443 fci->saved_msp = 0;
444 fci->rsize = 0;
445 fci->msize = 0;
d0b04c6a 446 fci->flags = TRANSPARENT;
dd3b648e
RP
447 return;
448 }
449 else
450 /* Advance to the first word of the function, i.e. the word
451 after the trace-back tag. */
452 p += 4;
453 }
eb5b74ca 454
d0b04c6a 455 /* We've found the start of the function.
eb5b74ca
JG
456 Try looking for a tag word that indicates whether there is a
457 memory frame pointer and what the memory stack allocation is.
458 If one doesn't exist, try using a more exhaustive search of
459 the prologue. */
460
461 if (examine_tag(p-4,&trans,(int *)NULL,&msize,&mfp_used)) /* Found good tag */
d0b04c6a
SG
462 examine_prologue (p, &rsize, 0, 0);
463 else /* No tag try prologue */
464 examine_prologue (p, &rsize, &msize, &mfp_used);
465
dd3b648e
RP
466 fci->rsize = rsize;
467 fci->msize = msize;
d0b04c6a
SG
468 fci->flags = 0;
469 if (mfp_used)
470 fci->flags |= MFP_USED;
471 if (trans)
472 fci->flags |= TRANSPARENT;
dd3b648e
RP
473 if (innermost_frame)
474 {
475 fci->saved_msp = read_register (MSP_REGNUM) + msize;
476 }
477 else
478 {
479 if (mfp_used)
d0b04c6a
SG
480 fci->saved_msp =
481 read_register_stack_integer (fci->frame + rsize - 4, 4);
dd3b648e 482 else
d0b04c6a 483 fci->saved_msp = fci->next->saved_msp + msize;
dd3b648e
RP
484 }
485}
486
487void
488init_extra_frame_info (fci)
489 struct frame_info *fci;
490{
491 if (fci->next == 0)
492 /* Assume innermost frame. May produce strange results for "info frame"
493 but there isn't any way to tell the difference. */
494 init_frame_info (1, fci);
17f7e032
JG
495 else {
496 /* We're in get_prev_frame_info.
497 Take care of everything in init_frame_pc. */
498 ;
499 }
dd3b648e
RP
500}
501
502void
503init_frame_pc (fromleaf, fci)
504 int fromleaf;
505 struct frame_info *fci;
506{
507 fci->pc = (fromleaf ? SAVED_PC_AFTER_CALL (fci->next) :
508 fci->next ? FRAME_SAVED_PC (fci->next) : read_pc ());
d0b04c6a 509 init_frame_info (fromleaf, fci);
dd3b648e
RP
510}
511\f
512/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
513 offsets being relative to the memory stack pointer (high C) or
514 saved_msp (gcc). */
515
516CORE_ADDR
517frame_locals_address (fi)
518 struct frame_info *fi;
519{
d0b04c6a 520 if (fi->flags & MFP_USED)
dd3b648e
RP
521 return fi->saved_msp;
522 else
523 return fi->saved_msp - fi->msize;
524}
525\f
526/* Routines for reading the register stack. The caller gets to treat
527 the register stack as a uniform stack in memory, from address $gr1
528 straight through $rfb and beyond. */
529
530/* Analogous to read_memory except the length is understood to be 4.
531 Also, myaddr can be NULL (meaning don't bother to read), and
532 if actual_mem_addr is non-NULL, store there the address that it
533 was fetched from (or if from a register the offset within
534 registers). Set *LVAL to lval_memory or lval_register, depending
4d50f90a
JK
535 on where it came from. The contents written into MYADDR are in
536 target format. */
dd3b648e
RP
537void
538read_register_stack (memaddr, myaddr, actual_mem_addr, lval)
539 CORE_ADDR memaddr;
540 char *myaddr;
541 CORE_ADDR *actual_mem_addr;
542 enum lval_type *lval;
543{
544 long rfb = read_register (RFB_REGNUM);
545 long rsp = read_register (RSP_REGNUM);
d0b04c6a 546
d0b04c6a 547 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 548 if (memaddr >= rstack_high_address)
d0b04c6a 549 {
4d50f90a 550 /* a bogus value */
85494909 551 static char val[] = {~0, ~0, ~0, ~0};
d0b04c6a
SG
552 /* It's in a local register, but off the end of the stack. */
553 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
554 if (myaddr != NULL)
4d50f90a
JK
555 {
556 /* Provide bogusness */
557 memcpy (myaddr, val, 4);
558 }
559 supply_register(regnum, val); /* More bogusness */
d0b04c6a
SG
560 if (lval != NULL)
561 *lval = lval_register;
562 if (actual_mem_addr != NULL)
563 *actual_mem_addr = REGISTER_BYTE (regnum);
564 }
946f014b
JG
565 /* If it's in the part of the register stack that's in real registers,
566 get the value from the registers. If it's anywhere else in memory
567 (e.g. in another thread's saved stack), skip this part and get
568 it from real live memory. */
569 else if (memaddr < rfb && memaddr >= rsp)
dd3b648e
RP
570 {
571 /* It's in a register. */
572 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
946f014b 573 if (regnum > LR0_REGNUM + 127)
dd3b648e
RP
574 error ("Attempt to read register stack out of range.");
575 if (myaddr != NULL)
576 read_register_gen (regnum, myaddr);
577 if (lval != NULL)
578 *lval = lval_register;
579 if (actual_mem_addr != NULL)
580 *actual_mem_addr = REGISTER_BYTE (regnum);
581 }
582 else
583 {
584 /* It's in the memory portion of the register stack. */
d0b04c6a 585 if (myaddr != NULL)
4d50f90a 586 read_memory (memaddr, myaddr, 4);
dd3b648e
RP
587 if (lval != NULL)
588 *lval = lval_memory;
589 if (actual_mem_addr != NULL)
17f7e032 590 *actual_mem_addr = memaddr;
dd3b648e
RP
591 }
592}
593
594/* Analogous to read_memory_integer
595 except the length is understood to be 4. */
596long
597read_register_stack_integer (memaddr, len)
598 CORE_ADDR memaddr;
599 int len;
600{
34df79fc
JK
601 char buf[4];
602 read_register_stack (memaddr, buf, NULL, NULL);
603 return extract_signed_integer (buf, 4);
dd3b648e
RP
604}
605
606/* Copy 4 bytes from GDB memory at MYADDR into inferior memory
607 at MEMADDR and put the actual address written into in
608 *ACTUAL_MEM_ADDR. */
609static void
610write_register_stack (memaddr, myaddr, actual_mem_addr)
611 CORE_ADDR memaddr;
612 char *myaddr;
613 CORE_ADDR *actual_mem_addr;
614{
615 long rfb = read_register (RFB_REGNUM);
616 long rsp = read_register (RSP_REGNUM);
d0b04c6a 617 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 618 if (memaddr >= rstack_high_address)
d0b04c6a
SG
619 {
620 /* It's in a register, but off the end of the stack. */
621 if (actual_mem_addr != NULL)
b9163d1a 622 *actual_mem_addr = 0;
d0b04c6a 623 }
8f86a4e4 624 else if (memaddr < rfb)
dd3b648e
RP
625 {
626 /* It's in a register. */
627 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
628 if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127)
629 error ("Attempt to read register stack out of range.");
630 if (myaddr != NULL)
631 write_register (regnum, *(long *)myaddr);
632 if (actual_mem_addr != NULL)
b9163d1a 633 *actual_mem_addr = 0;
dd3b648e
RP
634 }
635 else
636 {
637 /* It's in the memory portion of the register stack. */
638 if (myaddr != NULL)
639 write_memory (memaddr, myaddr, 4);
640 if (actual_mem_addr != NULL)
17f7e032 641 *actual_mem_addr = memaddr;
dd3b648e
RP
642 }
643}
644\f
645/* Find register number REGNUM relative to FRAME and put its
646 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
647 was optimized out (and thus can't be fetched). If the variable
648 was fetched from memory, set *ADDRP to where it was fetched from,
649 otherwise it was fetched from a register.
650
651 The argument RAW_BUFFER must point to aligned memory. */
652void
653get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lvalp)
654 char *raw_buffer;
655 int *optimized;
656 CORE_ADDR *addrp;
657 FRAME frame;
658 int regnum;
659 enum lval_type *lvalp;
660{
d0b04c6a 661 struct frame_info *fi;
dd3b648e
RP
662 CORE_ADDR addr;
663 enum lval_type lval;
664
d0b04c6a
SG
665 if (frame == 0)
666 return;
667
668 fi = get_frame_info (frame);
669
dd3b648e
RP
670 /* Once something has a register number, it doesn't get optimized out. */
671 if (optimized != NULL)
672 *optimized = 0;
673 if (regnum == RSP_REGNUM)
674 {
675 if (raw_buffer != NULL)
4d50f90a 676 {
968dca8d 677 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), fi->frame);
4d50f90a 678 }
dd3b648e
RP
679 if (lvalp != NULL)
680 *lvalp = not_lval;
681 return;
682 }
683 else if (regnum == PC_REGNUM)
684 {
685 if (raw_buffer != NULL)
4d50f90a 686 {
968dca8d 687 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), fi->pc);
4d50f90a 688 }
dd3b648e
RP
689
690 /* Not sure we have to do this. */
691 if (lvalp != NULL)
692 *lvalp = not_lval;
693
694 return;
695 }
696 else if (regnum == MSP_REGNUM)
697 {
698 if (raw_buffer != NULL)
699 {
700 if (fi->next != NULL)
4d50f90a 701 {
968dca8d 702 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
34df79fc 703 fi->next->saved_msp);
4d50f90a 704 }
dd3b648e 705 else
4d50f90a 706 read_register_gen (MSP_REGNUM, raw_buffer);
dd3b648e
RP
707 }
708 /* The value may have been computed, not fetched. */
709 if (lvalp != NULL)
710 *lvalp = not_lval;
711 return;
712 }
713 else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128)
714 {
715 /* These registers are not saved over procedure calls,
716 so just print out the current values. */
717 if (raw_buffer != NULL)
4d50f90a 718 read_register_gen (regnum, raw_buffer);
dd3b648e
RP
719 if (lvalp != NULL)
720 *lvalp = lval_register;
721 if (addrp != NULL)
722 *addrp = REGISTER_BYTE (regnum);
723 return;
724 }
725
726 addr = fi->frame + (regnum - LR0_REGNUM) * 4;
727 if (raw_buffer != NULL)
728 read_register_stack (addr, raw_buffer, &addr, &lval);
729 if (lvalp != NULL)
730 *lvalp = lval;
731 if (addrp != NULL)
732 *addrp = addr;
733}
734\f
d0b04c6a 735
dd3b648e
RP
736/* Discard from the stack the innermost frame,
737 restoring all saved registers. */
738
739void
740pop_frame ()
741{
742 FRAME frame = get_current_frame ();
743 struct frame_info *fi = get_frame_info (frame);
744 CORE_ADDR rfb = read_register (RFB_REGNUM);
745 CORE_ADDR gr1 = fi->frame + fi->rsize;
746 CORE_ADDR lr1;
eb5b74ca
JG
747 CORE_ADDR original_lr0;
748 int must_fix_lr0 = 0;
dd3b648e
RP
749 int i;
750
751 /* If popping a dummy frame, need to restore registers. */
752 if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM),
753 read_register (SP_REGNUM),
754 FRAME_FP (fi)))
755 {
d0b04c6a 756 int lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 757 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
758 write_register (SR_REGNUM (i + 128),read_register (lrnum++));
759 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
760 write_register (SR_REGNUM(i+160), read_register (lrnum++));
6093e5b0 761 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 762 write_register (RETURN_REGNUM + i, read_register (lrnum++));
eb5b74ca 763 /* Restore the PCs and prepare to restore LR0. */
d0b04c6a 764 write_register(PC_REGNUM, read_register (lrnum++));
eb5b74ca
JG
765 write_register(NPC_REGNUM, read_register (lrnum++));
766 write_register(PC2_REGNUM, read_register (lrnum++));
767 original_lr0 = read_register (lrnum++);
768 must_fix_lr0 = 1;
dd3b648e
RP
769 }
770
771 /* Restore the memory stack pointer. */
772 write_register (MSP_REGNUM, fi->saved_msp);
773 /* Restore the register stack pointer. */
774 write_register (GR1_REGNUM, gr1);
eb5b74ca
JG
775
776 /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */
777 if (must_fix_lr0)
778 write_register (LR0_REGNUM, original_lr0);
779
dd3b648e
RP
780 /* Check whether we need to fill registers. */
781 lr1 = read_register (LR0_REGNUM + 1);
782 if (lr1 > rfb)
783 {
784 /* Fill. */
785 int num_bytes = lr1 - rfb;
786 int i;
787 long word;
788 write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes);
789 write_register (RFB_REGNUM, lr1);
790 for (i = 0; i < num_bytes; i += 4)
791 {
792 /* Note: word is in host byte order. */
793 word = read_memory_integer (rfb + i, 4);
946f014b 794 write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word);
dd3b648e
RP
795 }
796 }
dd3b648e
RP
797 flush_cached_frames ();
798 set_current_frame (create_new_frame (0, read_pc()));
799}
800
801/* Push an empty stack frame, to record the current PC, etc. */
802
803void
804push_dummy_frame ()
805{
806 long w;
807 CORE_ADDR rab, gr1;
808 CORE_ADDR msp = read_register (MSP_REGNUM);
eb5b74ca
JG
809 int lrnum, i;
810 CORE_ADDR original_lr0;
811
812 /* Read original lr0 before changing gr1. This order isn't really needed
813 since GDB happens to have a snapshot of all the regs and doesn't toss
814 it when gr1 is changed. But it's The Right Thing To Do. */
815 original_lr0 = read_register (LR0_REGNUM);
dd3b648e 816
d0b04c6a 817 /* Allocate the new frame. */
dd3b648e
RP
818 gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE;
819 write_register (GR1_REGNUM, gr1);
820
821 rab = read_register (RAB_REGNUM);
822 if (gr1 < rab)
823 {
824 /* We need to spill registers. */
825 int num_bytes = rab - gr1;
826 CORE_ADDR rfb = read_register (RFB_REGNUM);
827 int i;
828 long word;
829
830 write_register (RFB_REGNUM, rfb - num_bytes);
831 write_register (RAB_REGNUM, gr1);
832 for (i = 0; i < num_bytes; i += 4)
833 {
834 /* Note: word is in target byte order. */
b9163d1a
SG
835 read_register_gen (LR0_REGNUM + i / 4, (char *) &word);
836 write_memory (rfb - num_bytes + i, (char *) &word, 4);
dd3b648e
RP
837 }
838 }
839
840 /* There are no arguments in to the dummy frame, so we don't need
841 more than rsize plus the return address and lr1. */
842 write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4);
843
844 /* Set the memory frame pointer. */
845 write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp);
846
847 /* Allocate arg_slop. */
848 write_register (MSP_REGNUM, msp - 16 * 4);
849
850 /* Save registers. */
d0b04c6a 851 lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 852 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
853 write_register (lrnum++, read_register (SR_REGNUM (i + 128)));
854 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
855 write_register (lrnum++, read_register (SR_REGNUM (i + 160)));
6093e5b0 856 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 857 write_register (lrnum++, read_register (RETURN_REGNUM + i));
eb5b74ca 858 /* Save the PCs and LR0. */
d0b04c6a 859 write_register (lrnum++, read_register (PC_REGNUM));
eb5b74ca
JG
860 write_register (lrnum++, read_register (NPC_REGNUM));
861 write_register (lrnum++, read_register (PC2_REGNUM));
ae682b80
JK
862
863 /* Why are we saving LR0? What would clobber it? (the dummy frame should
864 be below it on the register stack, no?). */
eb5b74ca 865 write_register (lrnum++, original_lr0);
d0b04c6a
SG
866}
867
eb5b74ca
JG
868
869
870/*
871 This routine takes three arguments and makes the cached frames look
872 as if these arguments defined a frame on the cache. This allows the
873 rest of `info frame' to extract the important arguments without much
874 difficulty. Since an individual frame on the 29K is determined by
875 three values (FP, PC, and MSP), we really need all three to do a
876 good job. */
877
878FRAME
879setup_arbitrary_frame (argc, argv)
880 int argc;
881 FRAME_ADDR *argv;
882{
883 FRAME fid;
884
885 if (argc != 3)
886 error ("AMD 29k frame specifications require three arguments: rsp pc msp");
887
888 fid = create_new_frame (argv[0], argv[1]);
889
890 if (!fid)
891 fatal ("internal: create_new_frame returned invalid frame id");
892
893 /* Creating a new frame munges the `frame' value from the current
894 GR1, so we restore it again here. FIXME, untangle all this
895 29K frame stuff... */
896 fid->frame = argv[0];
897
898 /* Our MSP is in argv[2]. It'd be intelligent if we could just
899 save this value in the FRAME. But the way it's set up (FIXME),
900 we must save our caller's MSP. We compute that by adding our
901 memory stack frame size to our MSP. */
902 fid->saved_msp = argv[2] + fid->msize;
903
904 return fid;
905}
906
907
908
ca0622e7
JK
909enum a29k_processor_types processor_type = a29k_unknown;
910
911void
912a29k_get_processor_type ()
913{
914 unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM);
915
916 /* Most of these don't have freeze mode. */
917 processor_type = a29k_no_freeze_mode;
918
919 switch ((cfg_reg >> 28) & 0xf)
920 {
921 case 0:
199b2450 922 fprintf_filtered (gdb_stderr, "Remote debugging an Am29000");
ca0622e7
JK
923 break;
924 case 1:
199b2450 925 fprintf_filtered (gdb_stderr, "Remote debugging an Am29005");
ca0622e7
JK
926 break;
927 case 2:
199b2450 928 fprintf_filtered (gdb_stderr, "Remote debugging an Am29050");
ca0622e7
JK
929 processor_type = a29k_freeze_mode;
930 break;
931 case 3:
199b2450 932 fprintf_filtered (gdb_stderr, "Remote debugging an Am29035");
ca0622e7
JK
933 break;
934 case 4:
199b2450 935 fprintf_filtered (gdb_stderr, "Remote debugging an Am29030");
ca0622e7
JK
936 break;
937 case 5:
199b2450 938 fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*");
ca0622e7
JK
939 break;
940 case 6:
199b2450 941 fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*");
ca0622e7
JK
942 break;
943 case 7:
199b2450 944 fprintf_filtered (gdb_stderr, "Remote debugging an Am29040");
ca0622e7
JK
945 break;
946 default:
199b2450 947 fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n");
ca0622e7
JK
948 /* Don't bother to print the revision. */
949 return;
950 }
199b2450 951 fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f));
ca0622e7 952}
946f014b 953
d0b04c6a
SG
954void
955_initialize_29k()
956{
34517ebc
JG
957 extern CORE_ADDR text_end;
958
8f86a4e4
JG
959 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
960 add_show_from_set
961 (add_set_cmd ("rstack_high_address", class_support, var_uinteger,
962 (char *)&rstack_high_address,
963 "Set top address in memory of the register stack.\n\
964Attempts to access registers saved above this address will be ignored\n\
965or will produce the value -1.", &setlist),
966 &showlist);
34517ebc
JG
967
968 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
969 add_show_from_set
970 (add_set_cmd ("call_scratch_address", class_support, var_uinteger,
971 (char *)&text_end,
19327ea5
JG
972"Set address in memory where small amounts of RAM can be used\n\
973when making function calls into the inferior.", &setlist),
34517ebc 974 &showlist);
8f86a4e4 975}
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