* hppa-tdep.c (push_dummy_frame): Refine code to determine what
[deliverable/binutils-gdb.git] / gdb / a29k-tdep.c
CommitLineData
dd3b648e 1/* Target-machine dependent code for the AMD 29000
7b2bcbf5 2 Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
dd3b648e
RP
3 Contributed by Cygnus Support. Written by Jim Kingdon.
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
99a7de40
JG
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
dd3b648e
RP
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
99a7de40
JG
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
dd3b648e
RP
20
21#include "defs.h"
22#include "gdbcore.h"
dd3b648e
RP
23#include "frame.h"
24#include "value.h"
dd3b648e
RP
25#include "symtab.h"
26#include "inferior.h"
8f86a4e4 27#include "gdbcmd.h"
dd3b648e 28
946f014b
JG
29/* If all these bits in an instruction word are zero, it is a "tag word"
30 which precedes a function entry point and gives stack traceback info.
31 This used to be defined as 0xff000000, but that treated 0x00000deb as
32 a tag word, while it is really used as a breakpoint. */
33#define TAGWORD_ZERO_MASK 0xff00f800
34
7730bd5a
JG
35extern CORE_ADDR text_start; /* FIXME, kludge... */
36
8f86a4e4
JG
37/* The user-settable top of the register stack in virtual memory. We
38 won't attempt to access any stored registers above this address, if set
39 nonzero. */
40
41static CORE_ADDR rstack_high_address = UINT_MAX;
42
dd3b648e 43/* Structure to hold cached info about function prologues. */
669caa9c 44
dd3b648e
RP
45struct prologue_info
46{
47 CORE_ADDR pc; /* First addr after fn prologue */
48 unsigned rsize, msize; /* register stack frame size, mem stack ditto */
49 unsigned mfp_used : 1; /* memory frame pointer used */
50 unsigned rsize_valid : 1; /* Validity bits for the above */
51 unsigned msize_valid : 1;
52 unsigned mfp_valid : 1;
53};
54
55/* Examine the prologue of a function which starts at PC. Return
56 the first addess past the prologue. If MSIZE is non-NULL, then
57 set *MSIZE to the memory stack frame size. If RSIZE is non-NULL,
58 then set *RSIZE to the register stack frame size (not including
59 incoming arguments and the return address & frame pointer stored
60 with them). If no prologue is found, *RSIZE is set to zero.
61 If no prologue is found, or a prologue which doesn't involve
62 allocating a memory stack frame, then set *MSIZE to zero.
63
64 Note that both msize and rsize are in bytes. This is not consistent
65 with the _User's Manual_ with respect to rsize, but it is much more
66 convenient.
67
68 If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory
69 frame pointer is being used. */
669caa9c 70
dd3b648e
RP
71CORE_ADDR
72examine_prologue (pc, rsize, msize, mfp_used)
73 CORE_ADDR pc;
74 unsigned *msize;
75 unsigned *rsize;
76 int *mfp_used;
77{
78 long insn;
79 CORE_ADDR p = pc;
1ab3bf1b 80 struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc);
dd3b648e
RP
81 struct prologue_info *mi = 0;
82
1ab3bf1b 83 if (msymbol != NULL)
07df4831 84 mi = (struct prologue_info *) msymbol -> info;
dd3b648e
RP
85
86 if (mi != 0)
87 {
88 int valid = 1;
89 if (rsize != NULL)
90 {
91 *rsize = mi->rsize;
92 valid &= mi->rsize_valid;
93 }
94 if (msize != NULL)
95 {
96 *msize = mi->msize;
97 valid &= mi->msize_valid;
98 }
99 if (mfp_used != NULL)
100 {
101 *mfp_used = mi->mfp_used;
102 valid &= mi->mfp_valid;
103 }
104 if (valid)
105 return mi->pc;
106 }
107
108 if (rsize != NULL)
109 *rsize = 0;
110 if (msize != NULL)
111 *msize = 0;
112 if (mfp_used != NULL)
113 *mfp_used = 0;
114
115 /* Prologue must start with subtracting a constant from gr1.
116 Normally this is sub gr1,gr1,<rsize * 4>. */
117 insn = read_memory_integer (p, 4);
118 if ((insn & 0xffffff00) != 0x25010100)
119 {
120 /* If the frame is large, instead of a single instruction it
121 might be a pair of instructions:
122 const <reg>, <rsize * 4>
123 sub gr1,gr1,<reg>
124 */
125 int reg;
126 /* Possible value for rsize. */
127 unsigned int rsize0;
128
129 if ((insn & 0xff000000) != 0x03000000)
130 {
131 p = pc;
132 goto done;
133 }
134 reg = (insn >> 8) & 0xff;
135 rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff));
136 p += 4;
137 insn = read_memory_integer (p, 4);
138 if ((insn & 0xffffff00) != 0x24010100
139 || (insn & 0xff) != reg)
140 {
141 p = pc;
142 goto done;
143 }
144 if (rsize != NULL)
145 *rsize = rsize0;
146 }
147 else
148 {
149 if (rsize != NULL)
150 *rsize = (insn & 0xff);
151 }
152 p += 4;
153
7b2bcbf5 154 /* Next instruction ought to be asgeu V_SPILL,gr1,rab.
d0b04c6a
SG
155 * We don't check the vector number to allow for kernel debugging. The
156 * kernel will use a different trap number.
7b2bcbf5
JG
157 * If this insn is missing, we just keep going; Metaware R2.3u compiler
158 * generates prologue that intermixes initializations and puts the asgeu
159 * way down.
d0b04c6a 160 */
dd3b648e 161 insn = read_memory_integer (p, 4);
7b2bcbf5 162 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
dd3b648e 163 {
7b2bcbf5 164 p += 4;
dd3b648e 165 }
dd3b648e
RP
166
167 /* Next instruction usually sets the frame pointer (lr1) by adding
168 <size * 4> from gr1. However, this can (and high C does) be
169 deferred until anytime before the first function call. So it is
d0b04c6a
SG
170 OK if we don't see anything which sets lr1.
171 To allow for alternate register sets (gcc -mkernel-registers) the msp
172 register number is a compile time constant. */
173
dd3b648e
RP
174 /* Normally this is just add lr1,gr1,<size * 4>. */
175 insn = read_memory_integer (p, 4);
176 if ((insn & 0xffffff00) == 0x15810100)
177 p += 4;
178 else
179 {
180 /* However, for large frames it can be
181 const <reg>, <size *4>
182 add lr1,gr1,<reg>
183 */
184 int reg;
185 CORE_ADDR q;
186
187 if ((insn & 0xff000000) == 0x03000000)
188 {
189 reg = (insn >> 8) & 0xff;
190 q = p + 4;
191 insn = read_memory_integer (q, 4);
192 if ((insn & 0xffffff00) == 0x14810100
193 && (insn & 0xff) == reg)
194 p = q;
195 }
196 }
197
198 /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory
199 frame pointer is in use. We just check for add lr<anything>,msp,0;
200 we don't check this rsize against the first instruction, and
201 we don't check that the trace-back tag indicates a memory frame pointer
202 is in use.
d0b04c6a
SG
203 To allow for alternate register sets (gcc -mkernel-registers) the msp
204 register number is a compile time constant.
dd3b648e
RP
205
206 The recommended instruction is actually "sll lr<whatever>,msp,0".
207 We check for that, too. Originally Jim Kingdon's code seemed
208 to be looking for a "sub" instruction here, but the mask was set
209 up to lose all the time. */
210 insn = read_memory_integer (p, 4);
d0b04c6a
SG
211 if (((insn & 0xff80ffff) == (0x15800000|(MSP_HW_REGNUM<<8))) /* add */
212 || ((insn & 0xff80ffff) == (0x81800000|(MSP_HW_REGNUM<<8)))) /* sll */
dd3b648e
RP
213 {
214 p += 4;
215 if (mfp_used != NULL)
216 *mfp_used = 1;
217 }
218
219 /* Next comes a subtraction from msp to allocate a memory frame,
220 but only if a memory frame is
221 being used. We don't check msize against the trace-back tag.
222
d0b04c6a
SG
223 To allow for alternate register sets (gcc -mkernel-registers) the msp
224 register number is a compile time constant.
225
dd3b648e
RP
226 Normally this is just
227 sub msp,msp,<msize>
228 */
229 insn = read_memory_integer (p, 4);
d0b04c6a
SG
230 if ((insn & 0xffffff00) ==
231 (0x25000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8)))
dd3b648e
RP
232 {
233 p += 4;
d0b04c6a 234 if (msize != NULL)
dd3b648e
RP
235 *msize = insn & 0xff;
236 }
237 else
238 {
239 /* For large frames, instead of a single instruction it might
240 be
241
242 const <reg>, <msize>
243 consth <reg>, <msize> ; optional
244 sub msp,msp,<reg>
245 */
246 int reg;
247 unsigned msize0;
248 CORE_ADDR q = p;
249
250 if ((insn & 0xff000000) == 0x03000000)
251 {
252 reg = (insn >> 8) & 0xff;
253 msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff);
254 q += 4;
255 insn = read_memory_integer (q, 4);
256 /* Check for consth. */
257 if ((insn & 0xff000000) == 0x02000000
258 && (insn & 0x0000ff00) == reg)
259 {
260 msize0 |= (insn << 8) & 0xff000000;
261 msize0 |= (insn << 16) & 0x00ff0000;
262 q += 4;
263 insn = read_memory_integer (q, 4);
264 }
265 /* Check for sub msp,msp,<reg>. */
d0b04c6a
SG
266 if ((insn & 0xffffff00) ==
267 (0x24000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8))
dd3b648e
RP
268 && (insn & 0xff) == reg)
269 {
270 p = q + 4;
271 if (msize != NULL)
272 *msize = msize0;
273 }
274 }
275 }
276
7b2bcbf5
JG
277 /* Next instruction might be asgeu V_SPILL,gr1,rab.
278 * We don't check the vector number to allow for kernel debugging. The
279 * kernel will use a different trap number.
280 * Metaware R2.3u compiler
281 * generates prologue that intermixes initializations and puts the asgeu
282 * way down after everything else.
283 */
284 insn = read_memory_integer (p, 4);
285 if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM))
286 {
287 p += 4;
288 }
289
dd3b648e 290 done:
1ab3bf1b 291 if (msymbol != NULL)
dd3b648e
RP
292 {
293 if (mi == 0)
294 {
295 /* Add a new cache entry. */
296 mi = (struct prologue_info *)xmalloc (sizeof (struct prologue_info));
07df4831 297 msymbol -> info = (char *)mi;
dd3b648e
RP
298 mi->rsize_valid = 0;
299 mi->msize_valid = 0;
300 mi->mfp_valid = 0;
301 }
302 /* else, cache entry exists, but info is incomplete. */
303 mi->pc = p;
304 if (rsize != NULL)
305 {
306 mi->rsize = *rsize;
307 mi->rsize_valid = 1;
308 }
309 if (msize != NULL)
310 {
311 mi->msize = *msize;
312 mi->msize_valid = 1;
313 }
314 if (mfp_used != NULL)
315 {
316 mi->mfp_used = *mfp_used;
317 mi->mfp_valid = 1;
318 }
319 }
320 return p;
321}
322
323/* Advance PC across any function entry prologue instructions
324 to reach some "real" code. */
325
326CORE_ADDR
327skip_prologue (pc)
328 CORE_ADDR pc;
329{
669caa9c 330 return examine_prologue (pc, NULL, NULL, NULL);
dd3b648e 331}
669caa9c 332
d0b04c6a
SG
333/*
334 * Examine the one or two word tag at the beginning of a function.
335 * The tag word is expect to be at 'p', if it is not there, we fail
336 * by returning 0. The documentation for the tag word was taken from
337 * page 7-15 of the 29050 User's Manual. We are assuming that the
338 * m bit is in bit 22 of the tag word, which seems to be the agreed upon
339 * convention today (1/15/92).
340 * msize is return in bytes.
341 */
669caa9c 342
d0b04c6a 343static int /* 0/1 - failure/success of finding the tag word */
669caa9c 344examine_tag (p, is_trans, argcount, msize, mfp_used)
d0b04c6a
SG
345 CORE_ADDR p;
346 int *is_trans;
669caa9c 347 int *argcount;
d0b04c6a
SG
348 unsigned *msize;
349 int *mfp_used;
350{
351 unsigned int tag1, tag2;
352
353 tag1 = read_memory_integer (p, 4);
946f014b 354 if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */
d0b04c6a
SG
355 return 0;
356 if (tag1 & (1<<23)) /* A two word tag */
357 {
48855ed5 358 tag2 = read_memory_integer (p-4, 4);
d0b04c6a 359 if (msize)
48855ed5 360 *msize = tag2 * 2;
d0b04c6a
SG
361 }
362 else /* A one word tag */
363 {
364 if (msize)
365 *msize = tag1 & 0x7ff;
366 }
367 if (is_trans)
7f2ffa58
JK
368 *is_trans = ((tag1 & (1<<21)) ? 1 : 0);
369 /* Note that this includes the frame pointer and the return address
370 register, so the actual number of registers of arguments is two less.
371 argcount can be zero, however, sometimes, for strange assembler
372 routines. */
d0b04c6a
SG
373 if (argcount)
374 *argcount = (tag1 >> 16) & 0x1f;
375 if (mfp_used)
376 *mfp_used = ((tag1 & (1<<22)) ? 1 : 0);
669caa9c 377 return 1;
d0b04c6a 378}
dd3b648e
RP
379
380/* Initialize the frame. In addition to setting "extra" frame info,
381 we also set ->frame because we use it in a nonstandard way, and ->pc
382 because we need to know it to get the other stuff. See the diagram
d7d35f00 383 of stacks and the frame cache in tm-a29k.h for more detail. */
669caa9c 384
dd3b648e 385static void
669caa9c 386init_frame_info (innermost_frame, frame)
dd3b648e 387 int innermost_frame;
669caa9c 388 struct frame_info *frame;
dd3b648e
RP
389{
390 CORE_ADDR p;
391 long insn;
392 unsigned rsize;
393 unsigned msize;
d0b04c6a 394 int mfp_used, trans;
dd3b648e
RP
395 struct symbol *func;
396
669caa9c 397 p = frame->pc;
dd3b648e
RP
398
399 if (innermost_frame)
669caa9c 400 frame->frame = read_register (GR1_REGNUM);
dd3b648e 401 else
669caa9c 402 frame->frame = frame->next->frame + frame->next->rsize;
dd3b648e
RP
403
404#if CALL_DUMMY_LOCATION == ON_STACK
405 This wont work;
406#else
407 if (PC_IN_CALL_DUMMY (p, 0, 0))
408#endif
409 {
669caa9c 410 frame->rsize = DUMMY_FRAME_RSIZE;
dd3b648e
RP
411 /* This doesn't matter since we never try to get locals or args
412 from a dummy frame. */
669caa9c 413 frame->msize = 0;
dd3b648e 414 /* Dummy frames always use a memory frame pointer. */
669caa9c
SS
415 frame->saved_msp =
416 read_register_stack_integer (frame->frame + DUMMY_FRAME_RSIZE - 4, 4);
417 frame->flags |= (TRANSPARENT|MFP_USED);
dd3b648e
RP
418 return;
419 }
420
421 func = find_pc_function (p);
422 if (func != NULL)
423 p = BLOCK_START (SYMBOL_BLOCK_VALUE (func));
424 else
425 {
426 /* Search backward to find the trace-back tag. However,
427 do not trace back beyond the start of the text segment
428 (just as a sanity check to avoid going into never-never land). */
63dcc380 429#if 1
dd3b648e 430 while (p >= text_start
946f014b 431 && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0)
dd3b648e 432 p -= 4;
63dcc380
JK
433#else /* 0 */
434 char pat[4] = {0, 0, 0, 0};
435 char mask[4];
436 char insn_raw[4];
437 store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK);
438 /* Enable this once target_search is enabled and tested. */
439 target_search (4, pat, mask, p, -4, text_start, p+1, &p, &insn_raw);
440 insn = extract_unsigned_integer (insn_raw, 4);
441#endif /* 0 */
442
dd3b648e
RP
443 if (p < text_start)
444 {
445 /* Couldn't find the trace-back tag.
446 Something strange is going on. */
669caa9c
SS
447 frame->saved_msp = 0;
448 frame->rsize = 0;
449 frame->msize = 0;
450 frame->flags = TRANSPARENT;
dd3b648e
RP
451 return;
452 }
453 else
454 /* Advance to the first word of the function, i.e. the word
455 after the trace-back tag. */
456 p += 4;
457 }
eb5b74ca 458
d0b04c6a 459 /* We've found the start of the function.
eb5b74ca
JG
460 Try looking for a tag word that indicates whether there is a
461 memory frame pointer and what the memory stack allocation is.
462 If one doesn't exist, try using a more exhaustive search of
463 the prologue. */
464
465 if (examine_tag(p-4,&trans,(int *)NULL,&msize,&mfp_used)) /* Found good tag */
d0b04c6a
SG
466 examine_prologue (p, &rsize, 0, 0);
467 else /* No tag try prologue */
468 examine_prologue (p, &rsize, &msize, &mfp_used);
469
669caa9c
SS
470 frame->rsize = rsize;
471 frame->msize = msize;
472 frame->flags = 0;
d0b04c6a 473 if (mfp_used)
669caa9c 474 frame->flags |= MFP_USED;
d0b04c6a 475 if (trans)
669caa9c 476 frame->flags |= TRANSPARENT;
dd3b648e
RP
477 if (innermost_frame)
478 {
669caa9c 479 frame->saved_msp = read_register (MSP_REGNUM) + msize;
dd3b648e
RP
480 }
481 else
482 {
483 if (mfp_used)
669caa9c
SS
484 frame->saved_msp =
485 read_register_stack_integer (frame->frame + rsize - 4, 4);
dd3b648e 486 else
669caa9c 487 frame->saved_msp = frame->next->saved_msp + msize;
dd3b648e
RP
488 }
489}
490
491void
669caa9c
SS
492init_extra_frame_info (frame)
493 struct frame_info *frame;
dd3b648e 494{
669caa9c 495 if (frame->next == 0)
dd3b648e
RP
496 /* Assume innermost frame. May produce strange results for "info frame"
497 but there isn't any way to tell the difference. */
669caa9c 498 init_frame_info (1, frame);
17f7e032
JG
499 else {
500 /* We're in get_prev_frame_info.
501 Take care of everything in init_frame_pc. */
502 ;
503 }
dd3b648e
RP
504}
505
506void
669caa9c 507init_frame_pc (fromleaf, frame)
dd3b648e 508 int fromleaf;
669caa9c 509 struct frame_info *frame;
dd3b648e 510{
669caa9c
SS
511 frame->pc = (fromleaf ? SAVED_PC_AFTER_CALL (frame->next) :
512 frame->next ? FRAME_SAVED_PC (frame->next) : read_pc ());
513 init_frame_info (fromleaf, frame);
dd3b648e
RP
514}
515\f
516/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
517 offsets being relative to the memory stack pointer (high C) or
518 saved_msp (gcc). */
519
520CORE_ADDR
521frame_locals_address (fi)
522 struct frame_info *fi;
523{
d0b04c6a 524 if (fi->flags & MFP_USED)
dd3b648e
RP
525 return fi->saved_msp;
526 else
527 return fi->saved_msp - fi->msize;
528}
529\f
530/* Routines for reading the register stack. The caller gets to treat
531 the register stack as a uniform stack in memory, from address $gr1
532 straight through $rfb and beyond. */
533
534/* Analogous to read_memory except the length is understood to be 4.
535 Also, myaddr can be NULL (meaning don't bother to read), and
536 if actual_mem_addr is non-NULL, store there the address that it
537 was fetched from (or if from a register the offset within
538 registers). Set *LVAL to lval_memory or lval_register, depending
4d50f90a
JK
539 on where it came from. The contents written into MYADDR are in
540 target format. */
dd3b648e
RP
541void
542read_register_stack (memaddr, myaddr, actual_mem_addr, lval)
543 CORE_ADDR memaddr;
544 char *myaddr;
545 CORE_ADDR *actual_mem_addr;
546 enum lval_type *lval;
547{
548 long rfb = read_register (RFB_REGNUM);
549 long rsp = read_register (RSP_REGNUM);
d0b04c6a 550
d0b04c6a 551 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 552 if (memaddr >= rstack_high_address)
d0b04c6a 553 {
4d50f90a 554 /* a bogus value */
85494909 555 static char val[] = {~0, ~0, ~0, ~0};
d0b04c6a
SG
556 /* It's in a local register, but off the end of the stack. */
557 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
558 if (myaddr != NULL)
4d50f90a
JK
559 {
560 /* Provide bogusness */
561 memcpy (myaddr, val, 4);
562 }
563 supply_register(regnum, val); /* More bogusness */
d0b04c6a
SG
564 if (lval != NULL)
565 *lval = lval_register;
566 if (actual_mem_addr != NULL)
567 *actual_mem_addr = REGISTER_BYTE (regnum);
568 }
946f014b
JG
569 /* If it's in the part of the register stack that's in real registers,
570 get the value from the registers. If it's anywhere else in memory
571 (e.g. in another thread's saved stack), skip this part and get
572 it from real live memory. */
573 else if (memaddr < rfb && memaddr >= rsp)
dd3b648e
RP
574 {
575 /* It's in a register. */
576 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
946f014b 577 if (regnum > LR0_REGNUM + 127)
dd3b648e
RP
578 error ("Attempt to read register stack out of range.");
579 if (myaddr != NULL)
580 read_register_gen (regnum, myaddr);
581 if (lval != NULL)
582 *lval = lval_register;
583 if (actual_mem_addr != NULL)
584 *actual_mem_addr = REGISTER_BYTE (regnum);
585 }
586 else
587 {
588 /* It's in the memory portion of the register stack. */
d0b04c6a 589 if (myaddr != NULL)
4d50f90a 590 read_memory (memaddr, myaddr, 4);
dd3b648e
RP
591 if (lval != NULL)
592 *lval = lval_memory;
593 if (actual_mem_addr != NULL)
17f7e032 594 *actual_mem_addr = memaddr;
dd3b648e
RP
595 }
596}
597
598/* Analogous to read_memory_integer
599 except the length is understood to be 4. */
600long
601read_register_stack_integer (memaddr, len)
602 CORE_ADDR memaddr;
603 int len;
604{
34df79fc
JK
605 char buf[4];
606 read_register_stack (memaddr, buf, NULL, NULL);
607 return extract_signed_integer (buf, 4);
dd3b648e
RP
608}
609
610/* Copy 4 bytes from GDB memory at MYADDR into inferior memory
611 at MEMADDR and put the actual address written into in
612 *ACTUAL_MEM_ADDR. */
613static void
614write_register_stack (memaddr, myaddr, actual_mem_addr)
615 CORE_ADDR memaddr;
616 char *myaddr;
617 CORE_ADDR *actual_mem_addr;
618{
619 long rfb = read_register (RFB_REGNUM);
620 long rsp = read_register (RSP_REGNUM);
d0b04c6a 621 /* If we don't do this 'info register' stops in the middle. */
8f86a4e4 622 if (memaddr >= rstack_high_address)
d0b04c6a
SG
623 {
624 /* It's in a register, but off the end of the stack. */
625 if (actual_mem_addr != NULL)
b9163d1a 626 *actual_mem_addr = 0;
d0b04c6a 627 }
8f86a4e4 628 else if (memaddr < rfb)
dd3b648e
RP
629 {
630 /* It's in a register. */
631 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
632 if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127)
633 error ("Attempt to read register stack out of range.");
634 if (myaddr != NULL)
635 write_register (regnum, *(long *)myaddr);
636 if (actual_mem_addr != NULL)
b9163d1a 637 *actual_mem_addr = 0;
dd3b648e
RP
638 }
639 else
640 {
641 /* It's in the memory portion of the register stack. */
642 if (myaddr != NULL)
643 write_memory (memaddr, myaddr, 4);
644 if (actual_mem_addr != NULL)
17f7e032 645 *actual_mem_addr = memaddr;
dd3b648e
RP
646 }
647}
648\f
649/* Find register number REGNUM relative to FRAME and put its
650 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
651 was optimized out (and thus can't be fetched). If the variable
652 was fetched from memory, set *ADDRP to where it was fetched from,
653 otherwise it was fetched from a register.
654
655 The argument RAW_BUFFER must point to aligned memory. */
669caa9c 656
dd3b648e
RP
657void
658get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lvalp)
659 char *raw_buffer;
660 int *optimized;
661 CORE_ADDR *addrp;
669caa9c 662 struct frame_info *frame;
dd3b648e
RP
663 int regnum;
664 enum lval_type *lvalp;
665{
d0b04c6a 666 struct frame_info *fi;
dd3b648e
RP
667 CORE_ADDR addr;
668 enum lval_type lval;
669
888a18ee
JK
670 if (!target_has_registers)
671 error ("No registers.");
672
673 /* Probably now redundant with the target_has_registers check. */
d0b04c6a
SG
674 if (frame == 0)
675 return;
676
dd3b648e
RP
677 /* Once something has a register number, it doesn't get optimized out. */
678 if (optimized != NULL)
679 *optimized = 0;
680 if (regnum == RSP_REGNUM)
681 {
682 if (raw_buffer != NULL)
4d50f90a 683 {
669caa9c 684 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
4d50f90a 685 }
dd3b648e
RP
686 if (lvalp != NULL)
687 *lvalp = not_lval;
688 return;
689 }
690 else if (regnum == PC_REGNUM)
691 {
692 if (raw_buffer != NULL)
4d50f90a 693 {
669caa9c 694 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc);
4d50f90a 695 }
dd3b648e
RP
696
697 /* Not sure we have to do this. */
698 if (lvalp != NULL)
699 *lvalp = not_lval;
700
701 return;
702 }
703 else if (regnum == MSP_REGNUM)
704 {
705 if (raw_buffer != NULL)
706 {
669caa9c 707 if (frame->next != NULL)
4d50f90a 708 {
968dca8d 709 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
669caa9c 710 frame->next->saved_msp);
4d50f90a 711 }
dd3b648e 712 else
4d50f90a 713 read_register_gen (MSP_REGNUM, raw_buffer);
dd3b648e
RP
714 }
715 /* The value may have been computed, not fetched. */
716 if (lvalp != NULL)
717 *lvalp = not_lval;
718 return;
719 }
720 else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128)
721 {
722 /* These registers are not saved over procedure calls,
723 so just print out the current values. */
724 if (raw_buffer != NULL)
4d50f90a 725 read_register_gen (regnum, raw_buffer);
dd3b648e
RP
726 if (lvalp != NULL)
727 *lvalp = lval_register;
728 if (addrp != NULL)
729 *addrp = REGISTER_BYTE (regnum);
730 return;
731 }
732
669caa9c 733 addr = frame->frame + (regnum - LR0_REGNUM) * 4;
dd3b648e
RP
734 if (raw_buffer != NULL)
735 read_register_stack (addr, raw_buffer, &addr, &lval);
736 if (lvalp != NULL)
737 *lvalp = lval;
738 if (addrp != NULL)
739 *addrp = addr;
740}
741\f
d0b04c6a 742
dd3b648e
RP
743/* Discard from the stack the innermost frame,
744 restoring all saved registers. */
745
746void
747pop_frame ()
748{
669caa9c
SS
749 struct frame_info *frame = get_current_frame ();
750 CORE_ADDR rfb = read_register (RFB_REGNUM);
dd3b648e
RP
751 CORE_ADDR gr1 = fi->frame + fi->rsize;
752 CORE_ADDR lr1;
eb5b74ca
JG
753 CORE_ADDR original_lr0;
754 int must_fix_lr0 = 0;
dd3b648e
RP
755 int i;
756
757 /* If popping a dummy frame, need to restore registers. */
758 if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM),
759 read_register (SP_REGNUM),
669caa9c 760 FRAME_FP (frame)))
dd3b648e 761 {
d0b04c6a 762 int lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 763 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
764 write_register (SR_REGNUM (i + 128),read_register (lrnum++));
765 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
766 write_register (SR_REGNUM(i+160), read_register (lrnum++));
6093e5b0 767 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 768 write_register (RETURN_REGNUM + i, read_register (lrnum++));
eb5b74ca 769 /* Restore the PCs and prepare to restore LR0. */
d0b04c6a 770 write_register(PC_REGNUM, read_register (lrnum++));
eb5b74ca
JG
771 write_register(NPC_REGNUM, read_register (lrnum++));
772 write_register(PC2_REGNUM, read_register (lrnum++));
773 original_lr0 = read_register (lrnum++);
774 must_fix_lr0 = 1;
dd3b648e
RP
775 }
776
777 /* Restore the memory stack pointer. */
669caa9c 778 write_register (MSP_REGNUM, frame->saved_msp);
dd3b648e
RP
779 /* Restore the register stack pointer. */
780 write_register (GR1_REGNUM, gr1);
eb5b74ca
JG
781
782 /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */
783 if (must_fix_lr0)
784 write_register (LR0_REGNUM, original_lr0);
785
dd3b648e
RP
786 /* Check whether we need to fill registers. */
787 lr1 = read_register (LR0_REGNUM + 1);
788 if (lr1 > rfb)
789 {
790 /* Fill. */
791 int num_bytes = lr1 - rfb;
792 int i;
669caa9c
SS
793 long word;
794
dd3b648e
RP
795 write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes);
796 write_register (RFB_REGNUM, lr1);
797 for (i = 0; i < num_bytes; i += 4)
798 {
799 /* Note: word is in host byte order. */
800 word = read_memory_integer (rfb + i, 4);
946f014b 801 write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word);
dd3b648e
RP
802 }
803 }
dd3b648e 804 flush_cached_frames ();
dd3b648e
RP
805}
806
807/* Push an empty stack frame, to record the current PC, etc. */
808
809void
810push_dummy_frame ()
811{
812 long w;
813 CORE_ADDR rab, gr1;
814 CORE_ADDR msp = read_register (MSP_REGNUM);
eb5b74ca
JG
815 int lrnum, i;
816 CORE_ADDR original_lr0;
817
818 /* Read original lr0 before changing gr1. This order isn't really needed
819 since GDB happens to have a snapshot of all the regs and doesn't toss
820 it when gr1 is changed. But it's The Right Thing To Do. */
821 original_lr0 = read_register (LR0_REGNUM);
dd3b648e 822
d0b04c6a 823 /* Allocate the new frame. */
dd3b648e
RP
824 gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE;
825 write_register (GR1_REGNUM, gr1);
826
827 rab = read_register (RAB_REGNUM);
828 if (gr1 < rab)
829 {
830 /* We need to spill registers. */
831 int num_bytes = rab - gr1;
832 CORE_ADDR rfb = read_register (RFB_REGNUM);
833 int i;
834 long word;
835
836 write_register (RFB_REGNUM, rfb - num_bytes);
837 write_register (RAB_REGNUM, gr1);
838 for (i = 0; i < num_bytes; i += 4)
839 {
840 /* Note: word is in target byte order. */
b9163d1a
SG
841 read_register_gen (LR0_REGNUM + i / 4, (char *) &word);
842 write_memory (rfb - num_bytes + i, (char *) &word, 4);
dd3b648e
RP
843 }
844 }
845
846 /* There are no arguments in to the dummy frame, so we don't need
847 more than rsize plus the return address and lr1. */
848 write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4);
849
850 /* Set the memory frame pointer. */
851 write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp);
852
853 /* Allocate arg_slop. */
854 write_register (MSP_REGNUM, msp - 16 * 4);
855
856 /* Save registers. */
d0b04c6a 857 lrnum = LR0_REGNUM + DUMMY_ARG/4;
dd3b648e 858 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
d0b04c6a
SG
859 write_register (lrnum++, read_register (SR_REGNUM (i + 128)));
860 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
861 write_register (lrnum++, read_register (SR_REGNUM (i + 160)));
6093e5b0 862 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
d0b04c6a 863 write_register (lrnum++, read_register (RETURN_REGNUM + i));
eb5b74ca 864 /* Save the PCs and LR0. */
d0b04c6a 865 write_register (lrnum++, read_register (PC_REGNUM));
eb5b74ca
JG
866 write_register (lrnum++, read_register (NPC_REGNUM));
867 write_register (lrnum++, read_register (PC2_REGNUM));
ae682b80
JK
868
869 /* Why are we saving LR0? What would clobber it? (the dummy frame should
870 be below it on the register stack, no?). */
eb5b74ca 871 write_register (lrnum++, original_lr0);
d0b04c6a
SG
872}
873
eb5b74ca
JG
874
875
876/*
877 This routine takes three arguments and makes the cached frames look
878 as if these arguments defined a frame on the cache. This allows the
879 rest of `info frame' to extract the important arguments without much
880 difficulty. Since an individual frame on the 29K is determined by
881 three values (FP, PC, and MSP), we really need all three to do a
882 good job. */
883
669caa9c 884struct frame_info *
eb5b74ca
JG
885setup_arbitrary_frame (argc, argv)
886 int argc;
669caa9c 887 CORE_ADDR *argv;
eb5b74ca 888{
669caa9c 889 struct frame_info *frame;
eb5b74ca
JG
890
891 if (argc != 3)
892 error ("AMD 29k frame specifications require three arguments: rsp pc msp");
893
669caa9c 894 frame = create_new_frame (argv[0], argv[1]);
eb5b74ca 895
669caa9c 896 if (!frame)
eb5b74ca
JG
897 fatal ("internal: create_new_frame returned invalid frame id");
898
899 /* Creating a new frame munges the `frame' value from the current
900 GR1, so we restore it again here. FIXME, untangle all this
901 29K frame stuff... */
669caa9c 902 frame->frame = argv[0];
eb5b74ca
JG
903
904 /* Our MSP is in argv[2]. It'd be intelligent if we could just
905 save this value in the FRAME. But the way it's set up (FIXME),
906 we must save our caller's MSP. We compute that by adding our
907 memory stack frame size to our MSP. */
669caa9c 908 frame->saved_msp = argv[2] + frame->msize;
eb5b74ca 909
669caa9c 910 return frame;
eb5b74ca
JG
911}
912
ca0622e7
JK
913enum a29k_processor_types processor_type = a29k_unknown;
914
915void
916a29k_get_processor_type ()
917{
918 unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM);
919
920 /* Most of these don't have freeze mode. */
921 processor_type = a29k_no_freeze_mode;
922
923 switch ((cfg_reg >> 28) & 0xf)
924 {
925 case 0:
199b2450 926 fprintf_filtered (gdb_stderr, "Remote debugging an Am29000");
ca0622e7
JK
927 break;
928 case 1:
199b2450 929 fprintf_filtered (gdb_stderr, "Remote debugging an Am29005");
ca0622e7
JK
930 break;
931 case 2:
199b2450 932 fprintf_filtered (gdb_stderr, "Remote debugging an Am29050");
ca0622e7
JK
933 processor_type = a29k_freeze_mode;
934 break;
935 case 3:
199b2450 936 fprintf_filtered (gdb_stderr, "Remote debugging an Am29035");
ca0622e7
JK
937 break;
938 case 4:
199b2450 939 fprintf_filtered (gdb_stderr, "Remote debugging an Am29030");
ca0622e7
JK
940 break;
941 case 5:
199b2450 942 fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*");
ca0622e7
JK
943 break;
944 case 6:
199b2450 945 fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*");
ca0622e7
JK
946 break;
947 case 7:
199b2450 948 fprintf_filtered (gdb_stderr, "Remote debugging an Am29040");
ca0622e7
JK
949 break;
950 default:
199b2450 951 fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n");
ca0622e7
JK
952 /* Don't bother to print the revision. */
953 return;
954 }
199b2450 955 fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f));
ca0622e7 956}
946f014b 957
d0b04c6a
SG
958void
959_initialize_29k()
960{
34517ebc
JG
961 extern CORE_ADDR text_end;
962
8f86a4e4
JG
963 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
964 add_show_from_set
965 (add_set_cmd ("rstack_high_address", class_support, var_uinteger,
966 (char *)&rstack_high_address,
967 "Set top address in memory of the register stack.\n\
968Attempts to access registers saved above this address will be ignored\n\
969or will produce the value -1.", &setlist),
970 &showlist);
34517ebc
JG
971
972 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
973 add_show_from_set
974 (add_set_cmd ("call_scratch_address", class_support, var_uinteger,
975 (char *)&text_end,
19327ea5
JG
976"Set address in memory where small amounts of RAM can be used\n\
977when making function calls into the inferior.", &setlist),
34517ebc 978 &showlist);
8f86a4e4 979}
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