Fix whitespace problem in my most recent entry.
[deliverable/binutils-gdb.git] / gdb / a29k-tdep.c
CommitLineData
c906108c 1/* Target-machine dependent code for the AMD 29000
8e65ff28 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 2001
c906108c
SS
3 Free Software Foundation, Inc.
4 Contributed by Cygnus Support. Written by Jim Kingdon.
5
c5aa993b 6 This file is part of GDB.
c906108c 7
c5aa993b
JM
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
c906108c 12
c5aa993b
JM
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c906108c 17
c5aa993b
JM
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
c906108c
SS
22
23#include "defs.h"
24#include "gdbcore.h"
25#include "frame.h"
26#include "value.h"
27#include "symtab.h"
28#include "inferior.h"
29#include "gdbcmd.h"
4e052eda 30#include "regcache.h"
c906108c
SS
31
32/* If all these bits in an instruction word are zero, it is a "tag word"
33 which precedes a function entry point and gives stack traceback info.
34 This used to be defined as 0xff000000, but that treated 0x00000deb as
35 a tag word, while it is really used as a breakpoint. */
36#define TAGWORD_ZERO_MASK 0xff00f800
37
38extern CORE_ADDR text_start; /* FIXME, kludge... */
39
40/* The user-settable top of the register stack in virtual memory. We
41 won't attempt to access any stored registers above this address, if set
42 nonzero. */
43
44static CORE_ADDR rstack_high_address = UINT_MAX;
45
46
47/* Should call_function allocate stack space for a struct return? */
48/* On the a29k objects over 16 words require the caller to allocate space. */
49int
fba45db2 50a29k_use_struct_convention (int gcc_p, struct type *type)
c906108c
SS
51{
52 return (TYPE_LENGTH (type) > 16 * 4);
53}
54
55
56/* Structure to hold cached info about function prologues. */
57
58struct prologue_info
59{
60 CORE_ADDR pc; /* First addr after fn prologue */
61 unsigned rsize, msize; /* register stack frame size, mem stack ditto */
c5aa993b
JM
62 unsigned mfp_used:1; /* memory frame pointer used */
63 unsigned rsize_valid:1; /* Validity bits for the above */
64 unsigned msize_valid:1;
65 unsigned mfp_valid:1;
c906108c
SS
66};
67
68/* Examine the prologue of a function which starts at PC. Return
69 the first addess past the prologue. If MSIZE is non-NULL, then
70 set *MSIZE to the memory stack frame size. If RSIZE is non-NULL,
71 then set *RSIZE to the register stack frame size (not including
72 incoming arguments and the return address & frame pointer stored
73 with them). If no prologue is found, *RSIZE is set to zero.
74 If no prologue is found, or a prologue which doesn't involve
75 allocating a memory stack frame, then set *MSIZE to zero.
76
77 Note that both msize and rsize are in bytes. This is not consistent
78 with the _User's Manual_ with respect to rsize, but it is much more
79 convenient.
80
81 If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory
82 frame pointer is being used. */
83
84CORE_ADDR
fba45db2 85examine_prologue (CORE_ADDR pc, unsigned *rsize, unsigned *msize, int *mfp_used)
c906108c
SS
86{
87 long insn;
88 CORE_ADDR p = pc;
89 struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc);
90 struct prologue_info *mi = 0;
91
92 if (msymbol != NULL)
c5aa993b 93 mi = (struct prologue_info *) msymbol->info;
c906108c
SS
94
95 if (mi != 0)
96 {
97 int valid = 1;
98 if (rsize != NULL)
99 {
100 *rsize = mi->rsize;
101 valid &= mi->rsize_valid;
102 }
103 if (msize != NULL)
104 {
105 *msize = mi->msize;
106 valid &= mi->msize_valid;
107 }
108 if (mfp_used != NULL)
109 {
110 *mfp_used = mi->mfp_used;
111 valid &= mi->mfp_valid;
112 }
113 if (valid)
114 return mi->pc;
115 }
116
117 if (rsize != NULL)
118 *rsize = 0;
119 if (msize != NULL)
120 *msize = 0;
121 if (mfp_used != NULL)
122 *mfp_used = 0;
c5aa993b 123
c906108c
SS
124 /* Prologue must start with subtracting a constant from gr1.
125 Normally this is sub gr1,gr1,<rsize * 4>. */
126 insn = read_memory_integer (p, 4);
127 if ((insn & 0xffffff00) != 0x25010100)
128 {
129 /* If the frame is large, instead of a single instruction it
c5aa993b
JM
130 might be a pair of instructions:
131 const <reg>, <rsize * 4>
132 sub gr1,gr1,<reg>
133 */
c906108c
SS
134 int reg;
135 /* Possible value for rsize. */
136 unsigned int rsize0;
c5aa993b 137
c906108c
SS
138 if ((insn & 0xff000000) != 0x03000000)
139 {
140 p = pc;
141 goto done;
142 }
143 reg = (insn >> 8) & 0xff;
144 rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff));
145 p += 4;
146 insn = read_memory_integer (p, 4);
147 if ((insn & 0xffffff00) != 0x24010100
148 || (insn & 0xff) != reg)
149 {
150 p = pc;
151 goto done;
152 }
153 if (rsize != NULL)
154 *rsize = rsize0;
155 }
156 else
157 {
158 if (rsize != NULL)
159 *rsize = (insn & 0xff);
160 }
161 p += 4;
162
163 /* Next instruction ought to be asgeu V_SPILL,gr1,rab.
164 * We don't check the vector number to allow for kernel debugging. The
165 * kernel will use a different trap number.
166 * If this insn is missing, we just keep going; Metaware R2.3u compiler
167 * generates prologue that intermixes initializations and puts the asgeu
168 * way down.
169 */
170 insn = read_memory_integer (p, 4);
c5aa993b 171 if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM))
c906108c
SS
172 {
173 p += 4;
174 }
175
176 /* Next instruction usually sets the frame pointer (lr1) by adding
177 <size * 4> from gr1. However, this can (and high C does) be
178 deferred until anytime before the first function call. So it is
179 OK if we don't see anything which sets lr1.
180 To allow for alternate register sets (gcc -mkernel-registers) the msp
181 register number is a compile time constant. */
182
183 /* Normally this is just add lr1,gr1,<size * 4>. */
184 insn = read_memory_integer (p, 4);
185 if ((insn & 0xffffff00) == 0x15810100)
186 p += 4;
187 else
188 {
189 /* However, for large frames it can be
c5aa993b
JM
190 const <reg>, <size *4>
191 add lr1,gr1,<reg>
192 */
c906108c
SS
193 int reg;
194 CORE_ADDR q;
195
196 if ((insn & 0xff000000) == 0x03000000)
197 {
198 reg = (insn >> 8) & 0xff;
199 q = p + 4;
200 insn = read_memory_integer (q, 4);
201 if ((insn & 0xffffff00) == 0x14810100
202 && (insn & 0xff) == reg)
203 p = q;
204 }
205 }
206
207 /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory
208 frame pointer is in use. We just check for add lr<anything>,msp,0;
209 we don't check this rsize against the first instruction, and
210 we don't check that the trace-back tag indicates a memory frame pointer
211 is in use.
212 To allow for alternate register sets (gcc -mkernel-registers) the msp
213 register number is a compile time constant.
214
215 The recommended instruction is actually "sll lr<whatever>,msp,0".
216 We check for that, too. Originally Jim Kingdon's code seemed
217 to be looking for a "sub" instruction here, but the mask was set
218 up to lose all the time. */
219 insn = read_memory_integer (p, 4);
c5aa993b
JM
220 if (((insn & 0xff80ffff) == (0x15800000 | (MSP_HW_REGNUM << 8))) /* add */
221 || ((insn & 0xff80ffff) == (0x81800000 | (MSP_HW_REGNUM << 8)))) /* sll */
c906108c
SS
222 {
223 p += 4;
224 if (mfp_used != NULL)
225 *mfp_used = 1;
226 }
227
228 /* Next comes a subtraction from msp to allocate a memory frame,
229 but only if a memory frame is
230 being used. We don't check msize against the trace-back tag.
231
232 To allow for alternate register sets (gcc -mkernel-registers) the msp
233 register number is a compile time constant.
234
235 Normally this is just
236 sub msp,msp,<msize>
c5aa993b 237 */
c906108c 238 insn = read_memory_integer (p, 4);
c5aa993b
JM
239 if ((insn & 0xffffff00) ==
240 (0x25000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8)))
c906108c
SS
241 {
242 p += 4;
c5aa993b 243 if (msize != NULL)
c906108c
SS
244 *msize = insn & 0xff;
245 }
246 else
247 {
248 /* For large frames, instead of a single instruction it might
c5aa993b 249 be
c906108c 250
c5aa993b
JM
251 const <reg>, <msize>
252 consth <reg>, <msize> ; optional
253 sub msp,msp,<reg>
254 */
c906108c
SS
255 int reg;
256 unsigned msize0;
257 CORE_ADDR q = p;
258
259 if ((insn & 0xff000000) == 0x03000000)
260 {
261 reg = (insn >> 8) & 0xff;
262 msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff);
263 q += 4;
264 insn = read_memory_integer (q, 4);
265 /* Check for consth. */
266 if ((insn & 0xff000000) == 0x02000000
267 && (insn & 0x0000ff00) == reg)
268 {
269 msize0 |= (insn << 8) & 0xff000000;
270 msize0 |= (insn << 16) & 0x00ff0000;
271 q += 4;
272 insn = read_memory_integer (q, 4);
273 }
274 /* Check for sub msp,msp,<reg>. */
c5aa993b
JM
275 if ((insn & 0xffffff00) ==
276 (0x24000000 | (MSP_HW_REGNUM << 16) | (MSP_HW_REGNUM << 8))
c906108c
SS
277 && (insn & 0xff) == reg)
278 {
279 p = q + 4;
280 if (msize != NULL)
281 *msize = msize0;
282 }
283 }
284 }
285
286 /* Next instruction might be asgeu V_SPILL,gr1,rab.
287 * We don't check the vector number to allow for kernel debugging. The
288 * kernel will use a different trap number.
289 * Metaware R2.3u compiler
290 * generates prologue that intermixes initializations and puts the asgeu
291 * way down after everything else.
292 */
293 insn = read_memory_integer (p, 4);
c5aa993b 294 if ((insn & 0xff00ffff) == (0x5e000100 | RAB_HW_REGNUM))
c906108c
SS
295 {
296 p += 4;
297 }
298
c5aa993b 299done:
c906108c
SS
300 if (msymbol != NULL)
301 {
302 if (mi == 0)
303 {
304 /* Add a new cache entry. */
c5aa993b
JM
305 mi = (struct prologue_info *) xmalloc (sizeof (struct prologue_info));
306 msymbol->info = (char *) mi;
c906108c
SS
307 mi->rsize_valid = 0;
308 mi->msize_valid = 0;
309 mi->mfp_valid = 0;
310 }
311 /* else, cache entry exists, but info is incomplete. */
312 mi->pc = p;
313 if (rsize != NULL)
314 {
315 mi->rsize = *rsize;
316 mi->rsize_valid = 1;
317 }
318 if (msize != NULL)
319 {
320 mi->msize = *msize;
321 mi->msize_valid = 1;
322 }
323 if (mfp_used != NULL)
324 {
325 mi->mfp_used = *mfp_used;
326 mi->mfp_valid = 1;
327 }
328 }
329 return p;
330}
331
332/* Advance PC across any function entry prologue instructions
333 to reach some "real" code. */
334
335CORE_ADDR
fba45db2 336a29k_skip_prologue (CORE_ADDR pc)
c906108c
SS
337{
338 return examine_prologue (pc, NULL, NULL, NULL);
339}
340
341/*
342 * Examine the one or two word tag at the beginning of a function.
343 * The tag word is expect to be at 'p', if it is not there, we fail
344 * by returning 0. The documentation for the tag word was taken from
345 * page 7-15 of the 29050 User's Manual. We are assuming that the
346 * m bit is in bit 22 of the tag word, which seems to be the agreed upon
347 * convention today (1/15/92).
348 * msize is return in bytes.
349 */
350
c5aa993b 351static int /* 0/1 - failure/success of finding the tag word */
fba45db2
KB
352examine_tag (CORE_ADDR p, int *is_trans, int *argcount, unsigned *msize,
353 int *mfp_used)
c906108c
SS
354{
355 unsigned int tag1, tag2;
356
357 tag1 = read_memory_integer (p, 4);
358 if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */
359 return 0;
c5aa993b 360 if (tag1 & (1 << 23)) /* A two word tag */
c906108c 361 {
c5aa993b
JM
362 tag2 = read_memory_integer (p - 4, 4);
363 if (msize)
364 *msize = tag2 * 2;
c906108c 365 }
c5aa993b
JM
366 else
367 /* A one word tag */
c906108c 368 {
c5aa993b
JM
369 if (msize)
370 *msize = tag1 & 0x7ff;
c906108c
SS
371 }
372 if (is_trans)
c5aa993b 373 *is_trans = ((tag1 & (1 << 21)) ? 1 : 0);
c906108c
SS
374 /* Note that this includes the frame pointer and the return address
375 register, so the actual number of registers of arguments is two less.
376 argcount can be zero, however, sometimes, for strange assembler
377 routines. */
378 if (argcount)
379 *argcount = (tag1 >> 16) & 0x1f;
380 if (mfp_used)
c5aa993b 381 *mfp_used = ((tag1 & (1 << 22)) ? 1 : 0);
c906108c
SS
382 return 1;
383}
384
385/* Initialize the frame. In addition to setting "extra" frame info,
386 we also set ->frame because we use it in a nonstandard way, and ->pc
387 because we need to know it to get the other stuff. See the diagram
388 of stacks and the frame cache in tm-a29k.h for more detail. */
389
390static void
fba45db2 391init_frame_info (int innermost_frame, struct frame_info *frame)
c906108c
SS
392{
393 CORE_ADDR p;
394 long insn;
395 unsigned rsize;
396 unsigned msize;
397 int mfp_used, trans;
398 struct symbol *func;
399
400 p = frame->pc;
401
402 if (innermost_frame)
403 frame->frame = read_register (GR1_REGNUM);
404 else
405 frame->frame = frame->next->frame + frame->next->rsize;
c5aa993b
JM
406
407#if 0 /* CALL_DUMMY_LOCATION == ON_STACK */
c906108c
SS
408 This wont work;
409#else
410 if (PC_IN_CALL_DUMMY (p, 0, 0))
411#endif
412 {
413 frame->rsize = DUMMY_FRAME_RSIZE;
414 /* This doesn't matter since we never try to get locals or args
c5aa993b 415 from a dummy frame. */
c906108c
SS
416 frame->msize = 0;
417 /* Dummy frames always use a memory frame pointer. */
c5aa993b 418 frame->saved_msp =
c906108c 419 read_register_stack_integer (frame->frame + DUMMY_FRAME_RSIZE - 4, 4);
c5aa993b 420 frame->flags |= (TRANSPARENT_FRAME | MFP_USED);
c906108c
SS
421 return;
422 }
c5aa993b 423
c906108c
SS
424 func = find_pc_function (p);
425 if (func != NULL)
426 p = BLOCK_START (SYMBOL_BLOCK_VALUE (func));
427 else
428 {
429 /* Search backward to find the trace-back tag. However,
c5aa993b
JM
430 do not trace back beyond the start of the text segment
431 (just as a sanity check to avoid going into never-never land). */
c906108c
SS
432#if 1
433 while (p >= text_start
c5aa993b 434 && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0)
c906108c
SS
435 p -= 4;
436#else /* 0 */
c5aa993b
JM
437 char pat[4] =
438 {0, 0, 0, 0};
c906108c
SS
439 char mask[4];
440 char insn_raw[4];
441 store_unsigned_integer (mask, 4, TAGWORD_ZERO_MASK);
442 /* Enable this once target_search is enabled and tested. */
c5aa993b 443 target_search (4, pat, mask, p, -4, text_start, p + 1, &p, &insn_raw);
c906108c
SS
444 insn = extract_unsigned_integer (insn_raw, 4);
445#endif /* 0 */
446
447 if (p < text_start)
448 {
449 /* Couldn't find the trace-back tag.
450 Something strange is going on. */
451 frame->saved_msp = 0;
452 frame->rsize = 0;
453 frame->msize = 0;
454 frame->flags = TRANSPARENT_FRAME;
455 return;
456 }
457 else
458 /* Advance to the first word of the function, i.e. the word
459 after the trace-back tag. */
460 p += 4;
461 }
462
463 /* We've found the start of the function.
464 Try looking for a tag word that indicates whether there is a
465 memory frame pointer and what the memory stack allocation is.
466 If one doesn't exist, try using a more exhaustive search of
467 the prologue. */
468
c5aa993b
JM
469 if (examine_tag (p - 4, &trans, (int *) NULL, &msize, &mfp_used)) /* Found good tag */
470 examine_prologue (p, &rsize, 0, 0);
471 else /* No tag try prologue */
472 examine_prologue (p, &rsize, &msize, &mfp_used);
c906108c
SS
473
474 frame->rsize = rsize;
475 frame->msize = msize;
476 frame->flags = 0;
477 if (mfp_used)
c5aa993b 478 frame->flags |= MFP_USED;
c906108c 479 if (trans)
c5aa993b 480 frame->flags |= TRANSPARENT_FRAME;
c906108c
SS
481 if (innermost_frame)
482 {
483 frame->saved_msp = read_register (MSP_REGNUM) + msize;
484 }
485 else
486 {
487 if (mfp_used)
c5aa993b
JM
488 frame->saved_msp =
489 read_register_stack_integer (frame->frame + rsize - 4, 4);
c906108c 490 else
c5aa993b 491 frame->saved_msp = frame->next->saved_msp + msize;
c906108c
SS
492 }
493}
494
495void
fba45db2 496init_extra_frame_info (struct frame_info *frame)
c906108c
SS
497{
498 if (frame->next == 0)
499 /* Assume innermost frame. May produce strange results for "info frame"
500 but there isn't any way to tell the difference. */
501 init_frame_info (1, frame);
c5aa993b
JM
502 else
503 {
7a292a7a 504 /* We're in get_prev_frame.
c906108c
SS
505 Take care of everything in init_frame_pc. */
506 ;
507 }
508}
509
510void
fba45db2 511init_frame_pc (int fromleaf, struct frame_info *frame)
c906108c
SS
512{
513 frame->pc = (fromleaf ? SAVED_PC_AFTER_CALL (frame->next) :
c5aa993b 514 frame->next ? FRAME_SAVED_PC (frame->next) : read_pc ());
c906108c
SS
515 init_frame_info (fromleaf, frame);
516}
517\f
518/* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their
519 offsets being relative to the memory stack pointer (high C) or
520 saved_msp (gcc). */
521
522CORE_ADDR
fba45db2 523frame_locals_address (struct frame_info *fi)
c906108c 524{
c5aa993b 525 if (fi->flags & MFP_USED)
c906108c
SS
526 return fi->saved_msp;
527 else
528 return fi->saved_msp - fi->msize;
529}
530\f
531/* Routines for reading the register stack. The caller gets to treat
532 the register stack as a uniform stack in memory, from address $gr1
533 straight through $rfb and beyond. */
534
535/* Analogous to read_memory except the length is understood to be 4.
536 Also, myaddr can be NULL (meaning don't bother to read), and
537 if actual_mem_addr is non-NULL, store there the address that it
538 was fetched from (or if from a register the offset within
539 registers). Set *LVAL to lval_memory or lval_register, depending
540 on where it came from. The contents written into MYADDR are in
541 target format. */
542void
fba45db2
KB
543read_register_stack (CORE_ADDR memaddr, char *myaddr,
544 CORE_ADDR *actual_mem_addr, enum lval_type *lval)
c906108c
SS
545{
546 long rfb = read_register (RFB_REGNUM);
547 long rsp = read_register (RSP_REGNUM);
548
549 /* If we don't do this 'info register' stops in the middle. */
c5aa993b 550 if (memaddr >= rstack_high_address)
c906108c
SS
551 {
552 /* a bogus value */
c5aa993b
JM
553 static char val[] =
554 {~0, ~0, ~0, ~0};
c906108c
SS
555 /* It's in a local register, but off the end of the stack. */
556 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
557 if (myaddr != NULL)
558 {
559 /* Provide bogusness */
560 memcpy (myaddr, val, 4);
561 }
c5aa993b 562 supply_register (regnum, val); /* More bogusness */
c906108c
SS
563 if (lval != NULL)
564 *lval = lval_register;
565 if (actual_mem_addr != NULL)
566 *actual_mem_addr = REGISTER_BYTE (regnum);
567 }
568 /* If it's in the part of the register stack that's in real registers,
569 get the value from the registers. If it's anywhere else in memory
570 (e.g. in another thread's saved stack), skip this part and get
571 it from real live memory. */
572 else if (memaddr < rfb && memaddr >= rsp)
573 {
574 /* It's in a register. */
575 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
576 if (regnum > LR0_REGNUM + 127)
577 error ("Attempt to read register stack out of range.");
578 if (myaddr != NULL)
579 read_register_gen (regnum, myaddr);
580 if (lval != NULL)
581 *lval = lval_register;
582 if (actual_mem_addr != NULL)
583 *actual_mem_addr = REGISTER_BYTE (regnum);
584 }
585 else
586 {
587 /* It's in the memory portion of the register stack. */
c5aa993b 588 if (myaddr != NULL)
c906108c
SS
589 read_memory (memaddr, myaddr, 4);
590 if (lval != NULL)
591 *lval = lval_memory;
592 if (actual_mem_addr != NULL)
593 *actual_mem_addr = memaddr;
594 }
595}
596
597/* Analogous to read_memory_integer
598 except the length is understood to be 4. */
599long
fba45db2 600read_register_stack_integer (CORE_ADDR memaddr, int len)
c906108c
SS
601{
602 char buf[4];
603 read_register_stack (memaddr, buf, NULL, NULL);
604 return extract_signed_integer (buf, 4);
605}
606
607/* Copy 4 bytes from GDB memory at MYADDR into inferior memory
608 at MEMADDR and put the actual address written into in
609 *ACTUAL_MEM_ADDR. */
610static void
fba45db2
KB
611write_register_stack (CORE_ADDR memaddr, char *myaddr,
612 CORE_ADDR *actual_mem_addr)
c906108c
SS
613{
614 long rfb = read_register (RFB_REGNUM);
615 long rsp = read_register (RSP_REGNUM);
616 /* If we don't do this 'info register' stops in the middle. */
c5aa993b 617 if (memaddr >= rstack_high_address)
c906108c
SS
618 {
619 /* It's in a register, but off the end of the stack. */
620 if (actual_mem_addr != NULL)
c5aa993b 621 *actual_mem_addr = 0;
c906108c
SS
622 }
623 else if (memaddr < rfb)
624 {
625 /* It's in a register. */
626 int regnum = (memaddr - rsp) / 4 + LR0_REGNUM;
627 if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127)
628 error ("Attempt to read register stack out of range.");
629 if (myaddr != NULL)
c5aa993b 630 write_register (regnum, *(long *) myaddr);
c906108c
SS
631 if (actual_mem_addr != NULL)
632 *actual_mem_addr = 0;
633 }
634 else
635 {
636 /* It's in the memory portion of the register stack. */
637 if (myaddr != NULL)
638 write_memory (memaddr, myaddr, 4);
639 if (actual_mem_addr != NULL)
640 *actual_mem_addr = memaddr;
641 }
642}
643\f
644/* Find register number REGNUM relative to FRAME and put its
645 (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable
646 was optimized out (and thus can't be fetched). If the variable
647 was fetched from memory, set *ADDRP to where it was fetched from,
648 otherwise it was fetched from a register.
649
650 The argument RAW_BUFFER must point to aligned memory. */
651
652void
fba45db2
KB
653a29k_get_saved_register (char *raw_buffer, int *optimized, CORE_ADDR *addrp,
654 struct frame_info *frame, int regnum,
655 enum lval_type *lvalp)
c906108c
SS
656{
657 struct frame_info *fi;
658 CORE_ADDR addr;
659 enum lval_type lval;
660
661 if (!target_has_registers)
662 error ("No registers.");
663
664 /* Probably now redundant with the target_has_registers check. */
665 if (frame == 0)
666 return;
667
668 /* Once something has a register number, it doesn't get optimized out. */
669 if (optimized != NULL)
670 *optimized = 0;
671 if (regnum == RSP_REGNUM)
672 {
673 if (raw_buffer != NULL)
674 {
675 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->frame);
676 }
677 if (lvalp != NULL)
678 *lvalp = not_lval;
679 return;
680 }
681 else if (regnum == PC_REGNUM && frame->next != NULL)
682 {
683 if (raw_buffer != NULL)
684 {
685 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), frame->pc);
686 }
687
688 /* Not sure we have to do this. */
689 if (lvalp != NULL)
690 *lvalp = not_lval;
691
692 return;
693 }
694 else if (regnum == MSP_REGNUM)
695 {
696 if (raw_buffer != NULL)
697 {
698 if (frame->next != NULL)
699 {
700 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
701 frame->next->saved_msp);
702 }
703 else
704 read_register_gen (MSP_REGNUM, raw_buffer);
705 }
706 /* The value may have been computed, not fetched. */
707 if (lvalp != NULL)
708 *lvalp = not_lval;
709 return;
710 }
711 else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128)
712 {
713 /* These registers are not saved over procedure calls,
c5aa993b 714 so just print out the current values. */
c906108c
SS
715 if (raw_buffer != NULL)
716 read_register_gen (regnum, raw_buffer);
717 if (lvalp != NULL)
718 *lvalp = lval_register;
719 if (addrp != NULL)
720 *addrp = REGISTER_BYTE (regnum);
721 return;
722 }
c5aa993b 723
c906108c
SS
724 addr = frame->frame + (regnum - LR0_REGNUM) * 4;
725 if (raw_buffer != NULL)
726 read_register_stack (addr, raw_buffer, &addr, &lval);
727 if (lvalp != NULL)
728 *lvalp = lval;
729 if (addrp != NULL)
730 *addrp = addr;
731}
732\f
733
734/* Discard from the stack the innermost frame,
735 restoring all saved registers. */
736
737void
fba45db2 738pop_frame (void)
c906108c
SS
739{
740 struct frame_info *frame = get_current_frame ();
c5aa993b 741 CORE_ADDR rfb = read_register (RFB_REGNUM);
c906108c 742 CORE_ADDR gr1 = frame->frame + frame->rsize;
c5aa993b 743 CORE_ADDR lr1;
c906108c
SS
744 CORE_ADDR original_lr0;
745 int must_fix_lr0 = 0;
746 int i;
747
748 /* If popping a dummy frame, need to restore registers. */
749 if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM),
750 read_register (SP_REGNUM),
751 FRAME_FP (frame)))
752 {
c5aa993b 753 int lrnum = LR0_REGNUM + DUMMY_ARG / 4;
c906108c 754 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
c5aa993b 755 write_register (SR_REGNUM (i + 128), read_register (lrnum++));
c906108c 756 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
c5aa993b 757 write_register (SR_REGNUM (i + 160), read_register (lrnum++));
c906108c
SS
758 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
759 write_register (RETURN_REGNUM + i, read_register (lrnum++));
760 /* Restore the PCs and prepare to restore LR0. */
c5aa993b
JM
761 write_register (PC_REGNUM, read_register (lrnum++));
762 write_register (NPC_REGNUM, read_register (lrnum++));
763 write_register (PC2_REGNUM, read_register (lrnum++));
c906108c
SS
764 original_lr0 = read_register (lrnum++);
765 must_fix_lr0 = 1;
766 }
767
768 /* Restore the memory stack pointer. */
769 write_register (MSP_REGNUM, frame->saved_msp);
c5aa993b 770 /* Restore the register stack pointer. */
c906108c
SS
771 write_register (GR1_REGNUM, gr1);
772
773 /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */
c5aa993b 774 if (must_fix_lr0)
c906108c
SS
775 write_register (LR0_REGNUM, original_lr0);
776
c5aa993b
JM
777 /* Check whether we need to fill registers. */
778 lr1 = read_register (LR0_REGNUM + 1);
779 if (lr1 > rfb)
780 {
781 /* Fill. */
c906108c 782 int num_bytes = lr1 - rfb;
c5aa993b 783 int i;
c906108c 784 long word;
c5aa993b
JM
785
786 write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes);
787 write_register (RFB_REGNUM, lr1);
788 for (i = 0; i < num_bytes; i += 4)
789 {
c906108c 790 /* Note: word is in host byte order. */
c5aa993b
JM
791 word = read_memory_integer (rfb + i, 4);
792 write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word);
793 }
c906108c 794 }
c5aa993b 795 flush_cached_frames ();
c906108c
SS
796}
797
798/* Push an empty stack frame, to record the current PC, etc. */
799
c5aa993b 800void
fba45db2 801push_dummy_frame (void)
c906108c
SS
802{
803 long w;
804 CORE_ADDR rab, gr1;
805 CORE_ADDR msp = read_register (MSP_REGNUM);
806 int lrnum, i;
807 CORE_ADDR original_lr0;
c5aa993b 808
c906108c
SS
809 /* Read original lr0 before changing gr1. This order isn't really needed
810 since GDB happens to have a snapshot of all the regs and doesn't toss
811 it when gr1 is changed. But it's The Right Thing To Do. */
812 original_lr0 = read_register (LR0_REGNUM);
813
c5aa993b 814 /* Allocate the new frame. */
c906108c
SS
815 gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE;
816 write_register (GR1_REGNUM, gr1);
817
818#ifdef VXWORKS_TARGET
819 /* We force re-reading all registers to get the new local registers set
820 after gr1 has been modified. This fix is due to the lack of single
821 register read/write operation in the RPC interface between VxGDB and
822 VxWorks. This really must be changed ! */
823
824 vx_read_register (-1);
825
826#endif /* VXWORK_TARGET */
827
828 rab = read_register (RAB_REGNUM);
829 if (gr1 < rab)
830 {
831 /* We need to spill registers. */
832 int num_bytes = rab - gr1;
833 CORE_ADDR rfb = read_register (RFB_REGNUM);
834 int i;
835 long word;
836
837 write_register (RFB_REGNUM, rfb - num_bytes);
838 write_register (RAB_REGNUM, gr1);
839 for (i = 0; i < num_bytes; i += 4)
840 {
841 /* Note: word is in target byte order. */
842 read_register_gen (LR0_REGNUM + i / 4, (char *) &word);
843 write_memory (rfb - num_bytes + i, (char *) &word, 4);
844 }
845 }
846
847 /* There are no arguments in to the dummy frame, so we don't need
848 more than rsize plus the return address and lr1. */
849 write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4);
850
851 /* Set the memory frame pointer. */
852 write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp);
853
854 /* Allocate arg_slop. */
855 write_register (MSP_REGNUM, msp - 16 * 4);
856
857 /* Save registers. */
c5aa993b 858 lrnum = LR0_REGNUM + DUMMY_ARG / 4;
c906108c
SS
859 for (i = 0; i < DUMMY_SAVE_SR128; ++i)
860 write_register (lrnum++, read_register (SR_REGNUM (i + 128)));
861 for (i = 0; i < DUMMY_SAVE_SR160; ++i)
862 write_register (lrnum++, read_register (SR_REGNUM (i + 160)));
863 for (i = 0; i < DUMMY_SAVE_GREGS; ++i)
864 write_register (lrnum++, read_register (RETURN_REGNUM + i));
865 /* Save the PCs and LR0. */
866 write_register (lrnum++, read_register (PC_REGNUM));
867 write_register (lrnum++, read_register (NPC_REGNUM));
868 write_register (lrnum++, read_register (PC2_REGNUM));
869
870 /* Why are we saving LR0? What would clobber it? (the dummy frame should
871 be below it on the register stack, no?). */
872 write_register (lrnum++, original_lr0);
873}
874
875
876
877/*
878 This routine takes three arguments and makes the cached frames look
879 as if these arguments defined a frame on the cache. This allows the
880 rest of `info frame' to extract the important arguments without much
881 difficulty. Since an individual frame on the 29K is determined by
882 three values (FP, PC, and MSP), we really need all three to do a
883 good job. */
884
885struct frame_info *
fba45db2 886setup_arbitrary_frame (int argc, CORE_ADDR *argv)
c906108c
SS
887{
888 struct frame_info *frame;
889
890 if (argc != 3)
891 error ("AMD 29k frame specifications require three arguments: rsp pc msp");
892
893 frame = create_new_frame (argv[0], argv[1]);
894
895 if (!frame)
8e65ff28
AC
896 internal_error (__FILE__, __LINE__,
897 "create_new_frame returned invalid frame id");
c5aa993b 898
c906108c
SS
899 /* Creating a new frame munges the `frame' value from the current
900 GR1, so we restore it again here. FIXME, untangle all this
901 29K frame stuff... */
902 frame->frame = argv[0];
903
904 /* Our MSP is in argv[2]. It'd be intelligent if we could just
905 save this value in the FRAME. But the way it's set up (FIXME),
906 we must save our caller's MSP. We compute that by adding our
907 memory stack frame size to our MSP. */
908 frame->saved_msp = argv[2] + frame->msize;
909
910 return frame;
911}
912
913int
fba45db2 914gdb_print_insn_a29k (bfd_vma memaddr, disassemble_info *info)
c906108c
SS
915{
916 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
917 return print_insn_big_a29k (memaddr, info);
918 else
919 return print_insn_little_a29k (memaddr, info);
920}
921
922enum a29k_processor_types processor_type = a29k_unknown;
923
924void
fba45db2 925a29k_get_processor_type (void)
c906108c
SS
926{
927 unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM);
928
929 /* Most of these don't have freeze mode. */
930 processor_type = a29k_no_freeze_mode;
931
932 switch ((cfg_reg >> 28) & 0xf)
933 {
934 case 0:
935 fprintf_filtered (gdb_stderr, "Remote debugging an Am29000");
936 break;
937 case 1:
938 fprintf_filtered (gdb_stderr, "Remote debugging an Am29005");
939 break;
940 case 2:
941 fprintf_filtered (gdb_stderr, "Remote debugging an Am29050");
942 processor_type = a29k_freeze_mode;
943 break;
944 case 3:
945 fprintf_filtered (gdb_stderr, "Remote debugging an Am29035");
946 break;
947 case 4:
948 fprintf_filtered (gdb_stderr, "Remote debugging an Am29030");
949 break;
950 case 5:
951 fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*");
952 break;
953 case 6:
954 fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*");
955 break;
956 case 7:
957 fprintf_filtered (gdb_stderr, "Remote debugging an Am29040");
958 break;
959 default:
960 fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n");
961 /* Don't bother to print the revision. */
962 return;
963 }
964 fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f));
965}
966
967#ifdef GET_LONGJMP_TARGET
968/* Figure out where the longjmp will land. We expect that we have just entered
c5aa993b 969 longjmp and haven't yet setup the stack frame, so the args are still in the
c906108c
SS
970 output regs. lr2 (LR2_REGNUM) points at the jmp_buf structure from which we
971 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
972 This routine returns true on success */
973
974int
fba45db2 975get_longjmp_target (CORE_ADDR *pc)
c906108c
SS
976{
977 CORE_ADDR jb_addr;
c5aa993b 978 char buf[sizeof (CORE_ADDR)];
c906108c 979
c5aa993b 980 jb_addr = read_register (LR2_REGNUM);
c906108c 981
c5aa993b
JM
982 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, (char *) buf,
983 sizeof (CORE_ADDR)))
c906108c
SS
984 return 0;
985
c5aa993b 986 *pc = extract_address ((PTR) buf, sizeof (CORE_ADDR));
c906108c
SS
987 return 1;
988}
989#endif /* GET_LONGJMP_TARGET */
990
991void
fba45db2 992_initialize_a29k_tdep (void)
c906108c
SS
993{
994 extern CORE_ADDR text_end;
995
996 tm_print_insn = gdb_print_insn_a29k;
997
998 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
999 add_show_from_set
1000 (add_set_cmd ("rstack_high_address", class_support, var_uinteger,
c5aa993b 1001 (char *) &rstack_high_address,
c906108c
SS
1002 "Set top address in memory of the register stack.\n\
1003Attempts to access registers saved above this address will be ignored\n\
1004or will produce the value -1.", &setlist),
1005 &showlist);
1006
1007 /* FIXME, there should be a way to make a CORE_ADDR variable settable. */
1008 add_show_from_set
1009 (add_set_cmd ("call_scratch_address", class_support, var_uinteger,
c5aa993b
JM
1010 (char *) &text_end,
1011 "Set address in memory where small amounts of RAM can be used\n\
c906108c
SS
1012when making function calls into the inferior.", &setlist),
1013 &showlist);
1014}
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