Commit | Line | Data |
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dd3b648e | 1 | /* Target-machine dependent code for the AMD 29000 |
7b2bcbf5 | 2 | Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc. |
dd3b648e RP |
3 | Contributed by Cygnus Support. Written by Jim Kingdon. |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
99a7de40 JG |
9 | the Free Software Foundation; either version 2 of the License, or |
10 | (at your option) any later version. | |
dd3b648e RP |
11 | |
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
99a7de40 JG |
18 | along with this program; if not, write to the Free Software |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
dd3b648e RP |
20 | |
21 | #include "defs.h" | |
22 | #include "gdbcore.h" | |
dd3b648e RP |
23 | #include "frame.h" |
24 | #include "value.h" | |
dd3b648e RP |
25 | #include "symtab.h" |
26 | #include "inferior.h" | |
8f86a4e4 | 27 | #include "gdbcmd.h" |
dd3b648e | 28 | |
946f014b JG |
29 | /* If all these bits in an instruction word are zero, it is a "tag word" |
30 | which precedes a function entry point and gives stack traceback info. | |
31 | This used to be defined as 0xff000000, but that treated 0x00000deb as | |
32 | a tag word, while it is really used as a breakpoint. */ | |
33 | #define TAGWORD_ZERO_MASK 0xff00f800 | |
34 | ||
7730bd5a JG |
35 | extern CORE_ADDR text_start; /* FIXME, kludge... */ |
36 | ||
8f86a4e4 JG |
37 | /* The user-settable top of the register stack in virtual memory. We |
38 | won't attempt to access any stored registers above this address, if set | |
39 | nonzero. */ | |
40 | ||
41 | static CORE_ADDR rstack_high_address = UINT_MAX; | |
42 | ||
dd3b648e RP |
43 | /* Structure to hold cached info about function prologues. */ |
44 | struct prologue_info | |
45 | { | |
46 | CORE_ADDR pc; /* First addr after fn prologue */ | |
47 | unsigned rsize, msize; /* register stack frame size, mem stack ditto */ | |
48 | unsigned mfp_used : 1; /* memory frame pointer used */ | |
49 | unsigned rsize_valid : 1; /* Validity bits for the above */ | |
50 | unsigned msize_valid : 1; | |
51 | unsigned mfp_valid : 1; | |
52 | }; | |
53 | ||
54 | /* Examine the prologue of a function which starts at PC. Return | |
55 | the first addess past the prologue. If MSIZE is non-NULL, then | |
56 | set *MSIZE to the memory stack frame size. If RSIZE is non-NULL, | |
57 | then set *RSIZE to the register stack frame size (not including | |
58 | incoming arguments and the return address & frame pointer stored | |
59 | with them). If no prologue is found, *RSIZE is set to zero. | |
60 | If no prologue is found, or a prologue which doesn't involve | |
61 | allocating a memory stack frame, then set *MSIZE to zero. | |
62 | ||
63 | Note that both msize and rsize are in bytes. This is not consistent | |
64 | with the _User's Manual_ with respect to rsize, but it is much more | |
65 | convenient. | |
66 | ||
67 | If MFP_USED is non-NULL, *MFP_USED is set to nonzero if a memory | |
68 | frame pointer is being used. */ | |
69 | CORE_ADDR | |
70 | examine_prologue (pc, rsize, msize, mfp_used) | |
71 | CORE_ADDR pc; | |
72 | unsigned *msize; | |
73 | unsigned *rsize; | |
74 | int *mfp_used; | |
75 | { | |
76 | long insn; | |
77 | CORE_ADDR p = pc; | |
1ab3bf1b | 78 | struct minimal_symbol *msymbol = lookup_minimal_symbol_by_pc (pc); |
dd3b648e RP |
79 | struct prologue_info *mi = 0; |
80 | ||
1ab3bf1b | 81 | if (msymbol != NULL) |
07df4831 | 82 | mi = (struct prologue_info *) msymbol -> info; |
dd3b648e RP |
83 | |
84 | if (mi != 0) | |
85 | { | |
86 | int valid = 1; | |
87 | if (rsize != NULL) | |
88 | { | |
89 | *rsize = mi->rsize; | |
90 | valid &= mi->rsize_valid; | |
91 | } | |
92 | if (msize != NULL) | |
93 | { | |
94 | *msize = mi->msize; | |
95 | valid &= mi->msize_valid; | |
96 | } | |
97 | if (mfp_used != NULL) | |
98 | { | |
99 | *mfp_used = mi->mfp_used; | |
100 | valid &= mi->mfp_valid; | |
101 | } | |
102 | if (valid) | |
103 | return mi->pc; | |
104 | } | |
105 | ||
106 | if (rsize != NULL) | |
107 | *rsize = 0; | |
108 | if (msize != NULL) | |
109 | *msize = 0; | |
110 | if (mfp_used != NULL) | |
111 | *mfp_used = 0; | |
112 | ||
113 | /* Prologue must start with subtracting a constant from gr1. | |
114 | Normally this is sub gr1,gr1,<rsize * 4>. */ | |
115 | insn = read_memory_integer (p, 4); | |
116 | if ((insn & 0xffffff00) != 0x25010100) | |
117 | { | |
118 | /* If the frame is large, instead of a single instruction it | |
119 | might be a pair of instructions: | |
120 | const <reg>, <rsize * 4> | |
121 | sub gr1,gr1,<reg> | |
122 | */ | |
123 | int reg; | |
124 | /* Possible value for rsize. */ | |
125 | unsigned int rsize0; | |
126 | ||
127 | if ((insn & 0xff000000) != 0x03000000) | |
128 | { | |
129 | p = pc; | |
130 | goto done; | |
131 | } | |
132 | reg = (insn >> 8) & 0xff; | |
133 | rsize0 = (((insn >> 8) & 0xff00) | (insn & 0xff)); | |
134 | p += 4; | |
135 | insn = read_memory_integer (p, 4); | |
136 | if ((insn & 0xffffff00) != 0x24010100 | |
137 | || (insn & 0xff) != reg) | |
138 | { | |
139 | p = pc; | |
140 | goto done; | |
141 | } | |
142 | if (rsize != NULL) | |
143 | *rsize = rsize0; | |
144 | } | |
145 | else | |
146 | { | |
147 | if (rsize != NULL) | |
148 | *rsize = (insn & 0xff); | |
149 | } | |
150 | p += 4; | |
151 | ||
7b2bcbf5 | 152 | /* Next instruction ought to be asgeu V_SPILL,gr1,rab. |
d0b04c6a SG |
153 | * We don't check the vector number to allow for kernel debugging. The |
154 | * kernel will use a different trap number. | |
7b2bcbf5 JG |
155 | * If this insn is missing, we just keep going; Metaware R2.3u compiler |
156 | * generates prologue that intermixes initializations and puts the asgeu | |
157 | * way down. | |
d0b04c6a | 158 | */ |
dd3b648e | 159 | insn = read_memory_integer (p, 4); |
7b2bcbf5 | 160 | if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM)) |
dd3b648e | 161 | { |
7b2bcbf5 | 162 | p += 4; |
dd3b648e | 163 | } |
dd3b648e RP |
164 | |
165 | /* Next instruction usually sets the frame pointer (lr1) by adding | |
166 | <size * 4> from gr1. However, this can (and high C does) be | |
167 | deferred until anytime before the first function call. So it is | |
d0b04c6a SG |
168 | OK if we don't see anything which sets lr1. |
169 | To allow for alternate register sets (gcc -mkernel-registers) the msp | |
170 | register number is a compile time constant. */ | |
171 | ||
dd3b648e RP |
172 | /* Normally this is just add lr1,gr1,<size * 4>. */ |
173 | insn = read_memory_integer (p, 4); | |
174 | if ((insn & 0xffffff00) == 0x15810100) | |
175 | p += 4; | |
176 | else | |
177 | { | |
178 | /* However, for large frames it can be | |
179 | const <reg>, <size *4> | |
180 | add lr1,gr1,<reg> | |
181 | */ | |
182 | int reg; | |
183 | CORE_ADDR q; | |
184 | ||
185 | if ((insn & 0xff000000) == 0x03000000) | |
186 | { | |
187 | reg = (insn >> 8) & 0xff; | |
188 | q = p + 4; | |
189 | insn = read_memory_integer (q, 4); | |
190 | if ((insn & 0xffffff00) == 0x14810100 | |
191 | && (insn & 0xff) == reg) | |
192 | p = q; | |
193 | } | |
194 | } | |
195 | ||
196 | /* Next comes "add lr{<rsize-1>},msp,0", but only if a memory | |
197 | frame pointer is in use. We just check for add lr<anything>,msp,0; | |
198 | we don't check this rsize against the first instruction, and | |
199 | we don't check that the trace-back tag indicates a memory frame pointer | |
200 | is in use. | |
d0b04c6a SG |
201 | To allow for alternate register sets (gcc -mkernel-registers) the msp |
202 | register number is a compile time constant. | |
dd3b648e RP |
203 | |
204 | The recommended instruction is actually "sll lr<whatever>,msp,0". | |
205 | We check for that, too. Originally Jim Kingdon's code seemed | |
206 | to be looking for a "sub" instruction here, but the mask was set | |
207 | up to lose all the time. */ | |
208 | insn = read_memory_integer (p, 4); | |
d0b04c6a SG |
209 | if (((insn & 0xff80ffff) == (0x15800000|(MSP_HW_REGNUM<<8))) /* add */ |
210 | || ((insn & 0xff80ffff) == (0x81800000|(MSP_HW_REGNUM<<8)))) /* sll */ | |
dd3b648e RP |
211 | { |
212 | p += 4; | |
213 | if (mfp_used != NULL) | |
214 | *mfp_used = 1; | |
215 | } | |
216 | ||
217 | /* Next comes a subtraction from msp to allocate a memory frame, | |
218 | but only if a memory frame is | |
219 | being used. We don't check msize against the trace-back tag. | |
220 | ||
d0b04c6a SG |
221 | To allow for alternate register sets (gcc -mkernel-registers) the msp |
222 | register number is a compile time constant. | |
223 | ||
dd3b648e RP |
224 | Normally this is just |
225 | sub msp,msp,<msize> | |
226 | */ | |
227 | insn = read_memory_integer (p, 4); | |
d0b04c6a SG |
228 | if ((insn & 0xffffff00) == |
229 | (0x25000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8))) | |
dd3b648e RP |
230 | { |
231 | p += 4; | |
d0b04c6a | 232 | if (msize != NULL) |
dd3b648e RP |
233 | *msize = insn & 0xff; |
234 | } | |
235 | else | |
236 | { | |
237 | /* For large frames, instead of a single instruction it might | |
238 | be | |
239 | ||
240 | const <reg>, <msize> | |
241 | consth <reg>, <msize> ; optional | |
242 | sub msp,msp,<reg> | |
243 | */ | |
244 | int reg; | |
245 | unsigned msize0; | |
246 | CORE_ADDR q = p; | |
247 | ||
248 | if ((insn & 0xff000000) == 0x03000000) | |
249 | { | |
250 | reg = (insn >> 8) & 0xff; | |
251 | msize0 = ((insn >> 8) & 0xff00) | (insn & 0xff); | |
252 | q += 4; | |
253 | insn = read_memory_integer (q, 4); | |
254 | /* Check for consth. */ | |
255 | if ((insn & 0xff000000) == 0x02000000 | |
256 | && (insn & 0x0000ff00) == reg) | |
257 | { | |
258 | msize0 |= (insn << 8) & 0xff000000; | |
259 | msize0 |= (insn << 16) & 0x00ff0000; | |
260 | q += 4; | |
261 | insn = read_memory_integer (q, 4); | |
262 | } | |
263 | /* Check for sub msp,msp,<reg>. */ | |
d0b04c6a SG |
264 | if ((insn & 0xffffff00) == |
265 | (0x24000000|(MSP_HW_REGNUM<<16)|(MSP_HW_REGNUM<<8)) | |
dd3b648e RP |
266 | && (insn & 0xff) == reg) |
267 | { | |
268 | p = q + 4; | |
269 | if (msize != NULL) | |
270 | *msize = msize0; | |
271 | } | |
272 | } | |
273 | } | |
274 | ||
7b2bcbf5 JG |
275 | /* Next instruction might be asgeu V_SPILL,gr1,rab. |
276 | * We don't check the vector number to allow for kernel debugging. The | |
277 | * kernel will use a different trap number. | |
278 | * Metaware R2.3u compiler | |
279 | * generates prologue that intermixes initializations and puts the asgeu | |
280 | * way down after everything else. | |
281 | */ | |
282 | insn = read_memory_integer (p, 4); | |
283 | if ((insn & 0xff00ffff) == (0x5e000100|RAB_HW_REGNUM)) | |
284 | { | |
285 | p += 4; | |
286 | } | |
287 | ||
dd3b648e | 288 | done: |
1ab3bf1b | 289 | if (msymbol != NULL) |
dd3b648e RP |
290 | { |
291 | if (mi == 0) | |
292 | { | |
293 | /* Add a new cache entry. */ | |
294 | mi = (struct prologue_info *)xmalloc (sizeof (struct prologue_info)); | |
07df4831 | 295 | msymbol -> info = (char *)mi; |
dd3b648e RP |
296 | mi->rsize_valid = 0; |
297 | mi->msize_valid = 0; | |
298 | mi->mfp_valid = 0; | |
299 | } | |
300 | /* else, cache entry exists, but info is incomplete. */ | |
301 | mi->pc = p; | |
302 | if (rsize != NULL) | |
303 | { | |
304 | mi->rsize = *rsize; | |
305 | mi->rsize_valid = 1; | |
306 | } | |
307 | if (msize != NULL) | |
308 | { | |
309 | mi->msize = *msize; | |
310 | mi->msize_valid = 1; | |
311 | } | |
312 | if (mfp_used != NULL) | |
313 | { | |
314 | mi->mfp_used = *mfp_used; | |
315 | mi->mfp_valid = 1; | |
316 | } | |
317 | } | |
318 | return p; | |
319 | } | |
320 | ||
321 | /* Advance PC across any function entry prologue instructions | |
322 | to reach some "real" code. */ | |
323 | ||
324 | CORE_ADDR | |
325 | skip_prologue (pc) | |
326 | CORE_ADDR pc; | |
327 | { | |
328 | return examine_prologue (pc, (unsigned *)NULL, (unsigned *)NULL, | |
329 | (int *)NULL); | |
330 | } | |
d0b04c6a SG |
331 | /* |
332 | * Examine the one or two word tag at the beginning of a function. | |
333 | * The tag word is expect to be at 'p', if it is not there, we fail | |
334 | * by returning 0. The documentation for the tag word was taken from | |
335 | * page 7-15 of the 29050 User's Manual. We are assuming that the | |
336 | * m bit is in bit 22 of the tag word, which seems to be the agreed upon | |
337 | * convention today (1/15/92). | |
338 | * msize is return in bytes. | |
339 | */ | |
340 | static int /* 0/1 - failure/success of finding the tag word */ | |
341 | examine_tag(p, is_trans, argcount, msize, mfp_used) | |
342 | CORE_ADDR p; | |
343 | int *is_trans; | |
344 | int *argcount; | |
345 | unsigned *msize; | |
346 | int *mfp_used; | |
347 | { | |
348 | unsigned int tag1, tag2; | |
349 | ||
350 | tag1 = read_memory_integer (p, 4); | |
946f014b | 351 | if ((tag1 & TAGWORD_ZERO_MASK) != 0) /* Not a tag word */ |
d0b04c6a SG |
352 | return 0; |
353 | if (tag1 & (1<<23)) /* A two word tag */ | |
354 | { | |
355 | tag2 = read_memory_integer (p+4, 4); | |
356 | if (msize) | |
357 | *msize = tag2; | |
358 | } | |
359 | else /* A one word tag */ | |
360 | { | |
361 | if (msize) | |
362 | *msize = tag1 & 0x7ff; | |
363 | } | |
364 | if (is_trans) | |
365 | *is_trans = ((tag1 & (1<<21)) ? 1 : 0); | |
366 | if (argcount) | |
367 | *argcount = (tag1 >> 16) & 0x1f; | |
368 | if (mfp_used) | |
369 | *mfp_used = ((tag1 & (1<<22)) ? 1 : 0); | |
370 | return(1); | |
371 | } | |
dd3b648e RP |
372 | |
373 | /* Initialize the frame. In addition to setting "extra" frame info, | |
374 | we also set ->frame because we use it in a nonstandard way, and ->pc | |
375 | because we need to know it to get the other stuff. See the diagram | |
d7d35f00 | 376 | of stacks and the frame cache in tm-a29k.h for more detail. */ |
dd3b648e RP |
377 | static void |
378 | init_frame_info (innermost_frame, fci) | |
379 | int innermost_frame; | |
380 | struct frame_info *fci; | |
381 | { | |
382 | CORE_ADDR p; | |
383 | long insn; | |
384 | unsigned rsize; | |
385 | unsigned msize; | |
d0b04c6a | 386 | int mfp_used, trans; |
dd3b648e RP |
387 | struct symbol *func; |
388 | ||
389 | p = fci->pc; | |
390 | ||
391 | if (innermost_frame) | |
392 | fci->frame = read_register (GR1_REGNUM); | |
393 | else | |
23a8e291 | 394 | fci->frame = fci->next->frame + fci->next->rsize; |
dd3b648e RP |
395 | |
396 | #if CALL_DUMMY_LOCATION == ON_STACK | |
397 | This wont work; | |
398 | #else | |
399 | if (PC_IN_CALL_DUMMY (p, 0, 0)) | |
400 | #endif | |
401 | { | |
402 | fci->rsize = DUMMY_FRAME_RSIZE; | |
403 | /* This doesn't matter since we never try to get locals or args | |
404 | from a dummy frame. */ | |
405 | fci->msize = 0; | |
406 | /* Dummy frames always use a memory frame pointer. */ | |
407 | fci->saved_msp = | |
408 | read_register_stack_integer (fci->frame + DUMMY_FRAME_RSIZE - 4, 4); | |
d0b04c6a | 409 | fci->flags |= (TRANSPARENT|MFP_USED); |
dd3b648e RP |
410 | return; |
411 | } | |
412 | ||
413 | func = find_pc_function (p); | |
414 | if (func != NULL) | |
415 | p = BLOCK_START (SYMBOL_BLOCK_VALUE (func)); | |
416 | else | |
417 | { | |
418 | /* Search backward to find the trace-back tag. However, | |
419 | do not trace back beyond the start of the text segment | |
420 | (just as a sanity check to avoid going into never-never land). */ | |
421 | while (p >= text_start | |
946f014b | 422 | && ((insn = read_memory_integer (p, 4)) & TAGWORD_ZERO_MASK) != 0) |
dd3b648e RP |
423 | p -= 4; |
424 | ||
425 | if (p < text_start) | |
426 | { | |
427 | /* Couldn't find the trace-back tag. | |
428 | Something strange is going on. */ | |
429 | fci->saved_msp = 0; | |
430 | fci->rsize = 0; | |
431 | fci->msize = 0; | |
d0b04c6a | 432 | fci->flags = TRANSPARENT; |
dd3b648e RP |
433 | return; |
434 | } | |
435 | else | |
436 | /* Advance to the first word of the function, i.e. the word | |
437 | after the trace-back tag. */ | |
438 | p += 4; | |
439 | } | |
eb5b74ca | 440 | |
d0b04c6a | 441 | /* We've found the start of the function. |
eb5b74ca JG |
442 | Try looking for a tag word that indicates whether there is a |
443 | memory frame pointer and what the memory stack allocation is. | |
444 | If one doesn't exist, try using a more exhaustive search of | |
445 | the prologue. */ | |
446 | ||
447 | if (examine_tag(p-4,&trans,(int *)NULL,&msize,&mfp_used)) /* Found good tag */ | |
d0b04c6a SG |
448 | examine_prologue (p, &rsize, 0, 0); |
449 | else /* No tag try prologue */ | |
450 | examine_prologue (p, &rsize, &msize, &mfp_used); | |
451 | ||
dd3b648e RP |
452 | fci->rsize = rsize; |
453 | fci->msize = msize; | |
d0b04c6a SG |
454 | fci->flags = 0; |
455 | if (mfp_used) | |
456 | fci->flags |= MFP_USED; | |
457 | if (trans) | |
458 | fci->flags |= TRANSPARENT; | |
dd3b648e RP |
459 | if (innermost_frame) |
460 | { | |
461 | fci->saved_msp = read_register (MSP_REGNUM) + msize; | |
462 | } | |
463 | else | |
464 | { | |
465 | if (mfp_used) | |
d0b04c6a SG |
466 | fci->saved_msp = |
467 | read_register_stack_integer (fci->frame + rsize - 4, 4); | |
dd3b648e | 468 | else |
d0b04c6a | 469 | fci->saved_msp = fci->next->saved_msp + msize; |
dd3b648e RP |
470 | } |
471 | } | |
472 | ||
473 | void | |
474 | init_extra_frame_info (fci) | |
475 | struct frame_info *fci; | |
476 | { | |
477 | if (fci->next == 0) | |
478 | /* Assume innermost frame. May produce strange results for "info frame" | |
479 | but there isn't any way to tell the difference. */ | |
480 | init_frame_info (1, fci); | |
17f7e032 JG |
481 | else { |
482 | /* We're in get_prev_frame_info. | |
483 | Take care of everything in init_frame_pc. */ | |
484 | ; | |
485 | } | |
dd3b648e RP |
486 | } |
487 | ||
488 | void | |
489 | init_frame_pc (fromleaf, fci) | |
490 | int fromleaf; | |
491 | struct frame_info *fci; | |
492 | { | |
493 | fci->pc = (fromleaf ? SAVED_PC_AFTER_CALL (fci->next) : | |
494 | fci->next ? FRAME_SAVED_PC (fci->next) : read_pc ()); | |
d0b04c6a | 495 | init_frame_info (fromleaf, fci); |
dd3b648e RP |
496 | } |
497 | \f | |
498 | /* Local variables (i.e. LOC_LOCAL) are on the memory stack, with their | |
499 | offsets being relative to the memory stack pointer (high C) or | |
500 | saved_msp (gcc). */ | |
501 | ||
502 | CORE_ADDR | |
503 | frame_locals_address (fi) | |
504 | struct frame_info *fi; | |
505 | { | |
d0b04c6a | 506 | if (fi->flags & MFP_USED) |
dd3b648e RP |
507 | return fi->saved_msp; |
508 | else | |
509 | return fi->saved_msp - fi->msize; | |
510 | } | |
511 | \f | |
512 | /* Routines for reading the register stack. The caller gets to treat | |
513 | the register stack as a uniform stack in memory, from address $gr1 | |
514 | straight through $rfb and beyond. */ | |
515 | ||
516 | /* Analogous to read_memory except the length is understood to be 4. | |
517 | Also, myaddr can be NULL (meaning don't bother to read), and | |
518 | if actual_mem_addr is non-NULL, store there the address that it | |
519 | was fetched from (or if from a register the offset within | |
520 | registers). Set *LVAL to lval_memory or lval_register, depending | |
4d50f90a JK |
521 | on where it came from. The contents written into MYADDR are in |
522 | target format. */ | |
dd3b648e RP |
523 | void |
524 | read_register_stack (memaddr, myaddr, actual_mem_addr, lval) | |
525 | CORE_ADDR memaddr; | |
526 | char *myaddr; | |
527 | CORE_ADDR *actual_mem_addr; | |
528 | enum lval_type *lval; | |
529 | { | |
530 | long rfb = read_register (RFB_REGNUM); | |
531 | long rsp = read_register (RSP_REGNUM); | |
d0b04c6a | 532 | |
d0b04c6a | 533 | /* If we don't do this 'info register' stops in the middle. */ |
8f86a4e4 | 534 | if (memaddr >= rstack_high_address) |
d0b04c6a | 535 | { |
4d50f90a | 536 | /* a bogus value */ |
85494909 | 537 | static char val[] = {~0, ~0, ~0, ~0}; |
d0b04c6a SG |
538 | /* It's in a local register, but off the end of the stack. */ |
539 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
540 | if (myaddr != NULL) | |
4d50f90a JK |
541 | { |
542 | /* Provide bogusness */ | |
543 | memcpy (myaddr, val, 4); | |
544 | } | |
545 | supply_register(regnum, val); /* More bogusness */ | |
d0b04c6a SG |
546 | if (lval != NULL) |
547 | *lval = lval_register; | |
548 | if (actual_mem_addr != NULL) | |
549 | *actual_mem_addr = REGISTER_BYTE (regnum); | |
550 | } | |
946f014b JG |
551 | /* If it's in the part of the register stack that's in real registers, |
552 | get the value from the registers. If it's anywhere else in memory | |
553 | (e.g. in another thread's saved stack), skip this part and get | |
554 | it from real live memory. */ | |
555 | else if (memaddr < rfb && memaddr >= rsp) | |
dd3b648e RP |
556 | { |
557 | /* It's in a register. */ | |
558 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
946f014b | 559 | if (regnum > LR0_REGNUM + 127) |
dd3b648e RP |
560 | error ("Attempt to read register stack out of range."); |
561 | if (myaddr != NULL) | |
562 | read_register_gen (regnum, myaddr); | |
563 | if (lval != NULL) | |
564 | *lval = lval_register; | |
565 | if (actual_mem_addr != NULL) | |
566 | *actual_mem_addr = REGISTER_BYTE (regnum); | |
567 | } | |
568 | else | |
569 | { | |
570 | /* It's in the memory portion of the register stack. */ | |
d0b04c6a | 571 | if (myaddr != NULL) |
4d50f90a | 572 | read_memory (memaddr, myaddr, 4); |
dd3b648e RP |
573 | if (lval != NULL) |
574 | *lval = lval_memory; | |
575 | if (actual_mem_addr != NULL) | |
17f7e032 | 576 | *actual_mem_addr = memaddr; |
dd3b648e RP |
577 | } |
578 | } | |
579 | ||
580 | /* Analogous to read_memory_integer | |
581 | except the length is understood to be 4. */ | |
582 | long | |
583 | read_register_stack_integer (memaddr, len) | |
584 | CORE_ADDR memaddr; | |
585 | int len; | |
586 | { | |
34df79fc JK |
587 | char buf[4]; |
588 | read_register_stack (memaddr, buf, NULL, NULL); | |
589 | return extract_signed_integer (buf, 4); | |
dd3b648e RP |
590 | } |
591 | ||
592 | /* Copy 4 bytes from GDB memory at MYADDR into inferior memory | |
593 | at MEMADDR and put the actual address written into in | |
594 | *ACTUAL_MEM_ADDR. */ | |
595 | static void | |
596 | write_register_stack (memaddr, myaddr, actual_mem_addr) | |
597 | CORE_ADDR memaddr; | |
598 | char *myaddr; | |
599 | CORE_ADDR *actual_mem_addr; | |
600 | { | |
601 | long rfb = read_register (RFB_REGNUM); | |
602 | long rsp = read_register (RSP_REGNUM); | |
d0b04c6a | 603 | /* If we don't do this 'info register' stops in the middle. */ |
8f86a4e4 | 604 | if (memaddr >= rstack_high_address) |
d0b04c6a SG |
605 | { |
606 | /* It's in a register, but off the end of the stack. */ | |
607 | if (actual_mem_addr != NULL) | |
b9163d1a | 608 | *actual_mem_addr = 0; |
d0b04c6a | 609 | } |
8f86a4e4 | 610 | else if (memaddr < rfb) |
dd3b648e RP |
611 | { |
612 | /* It's in a register. */ | |
613 | int regnum = (memaddr - rsp) / 4 + LR0_REGNUM; | |
614 | if (regnum < LR0_REGNUM || regnum > LR0_REGNUM + 127) | |
615 | error ("Attempt to read register stack out of range."); | |
616 | if (myaddr != NULL) | |
617 | write_register (regnum, *(long *)myaddr); | |
618 | if (actual_mem_addr != NULL) | |
b9163d1a | 619 | *actual_mem_addr = 0; |
dd3b648e RP |
620 | } |
621 | else | |
622 | { | |
623 | /* It's in the memory portion of the register stack. */ | |
624 | if (myaddr != NULL) | |
625 | write_memory (memaddr, myaddr, 4); | |
626 | if (actual_mem_addr != NULL) | |
17f7e032 | 627 | *actual_mem_addr = memaddr; |
dd3b648e RP |
628 | } |
629 | } | |
630 | \f | |
631 | /* Find register number REGNUM relative to FRAME and put its | |
632 | (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable | |
633 | was optimized out (and thus can't be fetched). If the variable | |
634 | was fetched from memory, set *ADDRP to where it was fetched from, | |
635 | otherwise it was fetched from a register. | |
636 | ||
637 | The argument RAW_BUFFER must point to aligned memory. */ | |
638 | void | |
639 | get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lvalp) | |
640 | char *raw_buffer; | |
641 | int *optimized; | |
642 | CORE_ADDR *addrp; | |
643 | FRAME frame; | |
644 | int regnum; | |
645 | enum lval_type *lvalp; | |
646 | { | |
d0b04c6a | 647 | struct frame_info *fi; |
dd3b648e RP |
648 | CORE_ADDR addr; |
649 | enum lval_type lval; | |
650 | ||
d0b04c6a SG |
651 | if (frame == 0) |
652 | return; | |
653 | ||
654 | fi = get_frame_info (frame); | |
655 | ||
dd3b648e RP |
656 | /* Once something has a register number, it doesn't get optimized out. */ |
657 | if (optimized != NULL) | |
658 | *optimized = 0; | |
659 | if (regnum == RSP_REGNUM) | |
660 | { | |
661 | if (raw_buffer != NULL) | |
4d50f90a | 662 | { |
968dca8d | 663 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), fi->frame); |
4d50f90a | 664 | } |
dd3b648e RP |
665 | if (lvalp != NULL) |
666 | *lvalp = not_lval; | |
667 | return; | |
668 | } | |
669 | else if (regnum == PC_REGNUM) | |
670 | { | |
671 | if (raw_buffer != NULL) | |
4d50f90a | 672 | { |
968dca8d | 673 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), fi->pc); |
4d50f90a | 674 | } |
dd3b648e RP |
675 | |
676 | /* Not sure we have to do this. */ | |
677 | if (lvalp != NULL) | |
678 | *lvalp = not_lval; | |
679 | ||
680 | return; | |
681 | } | |
682 | else if (regnum == MSP_REGNUM) | |
683 | { | |
684 | if (raw_buffer != NULL) | |
685 | { | |
686 | if (fi->next != NULL) | |
4d50f90a | 687 | { |
968dca8d | 688 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), |
34df79fc | 689 | fi->next->saved_msp); |
4d50f90a | 690 | } |
dd3b648e | 691 | else |
4d50f90a | 692 | read_register_gen (MSP_REGNUM, raw_buffer); |
dd3b648e RP |
693 | } |
694 | /* The value may have been computed, not fetched. */ | |
695 | if (lvalp != NULL) | |
696 | *lvalp = not_lval; | |
697 | return; | |
698 | } | |
699 | else if (regnum < LR0_REGNUM || regnum >= LR0_REGNUM + 128) | |
700 | { | |
701 | /* These registers are not saved over procedure calls, | |
702 | so just print out the current values. */ | |
703 | if (raw_buffer != NULL) | |
4d50f90a | 704 | read_register_gen (regnum, raw_buffer); |
dd3b648e RP |
705 | if (lvalp != NULL) |
706 | *lvalp = lval_register; | |
707 | if (addrp != NULL) | |
708 | *addrp = REGISTER_BYTE (regnum); | |
709 | return; | |
710 | } | |
711 | ||
712 | addr = fi->frame + (regnum - LR0_REGNUM) * 4; | |
713 | if (raw_buffer != NULL) | |
714 | read_register_stack (addr, raw_buffer, &addr, &lval); | |
715 | if (lvalp != NULL) | |
716 | *lvalp = lval; | |
717 | if (addrp != NULL) | |
718 | *addrp = addr; | |
719 | } | |
720 | \f | |
d0b04c6a | 721 | |
dd3b648e RP |
722 | /* Discard from the stack the innermost frame, |
723 | restoring all saved registers. */ | |
724 | ||
725 | void | |
726 | pop_frame () | |
727 | { | |
728 | FRAME frame = get_current_frame (); | |
729 | struct frame_info *fi = get_frame_info (frame); | |
730 | CORE_ADDR rfb = read_register (RFB_REGNUM); | |
731 | CORE_ADDR gr1 = fi->frame + fi->rsize; | |
732 | CORE_ADDR lr1; | |
eb5b74ca JG |
733 | CORE_ADDR original_lr0; |
734 | int must_fix_lr0 = 0; | |
dd3b648e RP |
735 | int i; |
736 | ||
737 | /* If popping a dummy frame, need to restore registers. */ | |
738 | if (PC_IN_CALL_DUMMY (read_register (PC_REGNUM), | |
739 | read_register (SP_REGNUM), | |
740 | FRAME_FP (fi))) | |
741 | { | |
d0b04c6a | 742 | int lrnum = LR0_REGNUM + DUMMY_ARG/4; |
dd3b648e | 743 | for (i = 0; i < DUMMY_SAVE_SR128; ++i) |
d0b04c6a SG |
744 | write_register (SR_REGNUM (i + 128),read_register (lrnum++)); |
745 | for (i = 0; i < DUMMY_SAVE_SR160; ++i) | |
746 | write_register (SR_REGNUM(i+160), read_register (lrnum++)); | |
6093e5b0 | 747 | for (i = 0; i < DUMMY_SAVE_GREGS; ++i) |
d0b04c6a | 748 | write_register (RETURN_REGNUM + i, read_register (lrnum++)); |
eb5b74ca | 749 | /* Restore the PCs and prepare to restore LR0. */ |
d0b04c6a | 750 | write_register(PC_REGNUM, read_register (lrnum++)); |
eb5b74ca JG |
751 | write_register(NPC_REGNUM, read_register (lrnum++)); |
752 | write_register(PC2_REGNUM, read_register (lrnum++)); | |
753 | original_lr0 = read_register (lrnum++); | |
754 | must_fix_lr0 = 1; | |
dd3b648e RP |
755 | } |
756 | ||
757 | /* Restore the memory stack pointer. */ | |
758 | write_register (MSP_REGNUM, fi->saved_msp); | |
759 | /* Restore the register stack pointer. */ | |
760 | write_register (GR1_REGNUM, gr1); | |
eb5b74ca JG |
761 | |
762 | /* If we popped a dummy frame, restore lr0 now that gr1 has been restored. */ | |
763 | if (must_fix_lr0) | |
764 | write_register (LR0_REGNUM, original_lr0); | |
765 | ||
dd3b648e RP |
766 | /* Check whether we need to fill registers. */ |
767 | lr1 = read_register (LR0_REGNUM + 1); | |
768 | if (lr1 > rfb) | |
769 | { | |
770 | /* Fill. */ | |
771 | int num_bytes = lr1 - rfb; | |
772 | int i; | |
773 | long word; | |
774 | write_register (RAB_REGNUM, read_register (RAB_REGNUM) + num_bytes); | |
775 | write_register (RFB_REGNUM, lr1); | |
776 | for (i = 0; i < num_bytes; i += 4) | |
777 | { | |
778 | /* Note: word is in host byte order. */ | |
779 | word = read_memory_integer (rfb + i, 4); | |
946f014b | 780 | write_register (LR0_REGNUM + ((rfb - gr1) % 0x80) + i / 4, word); |
dd3b648e RP |
781 | } |
782 | } | |
dd3b648e RP |
783 | flush_cached_frames (); |
784 | set_current_frame (create_new_frame (0, read_pc())); | |
785 | } | |
786 | ||
787 | /* Push an empty stack frame, to record the current PC, etc. */ | |
788 | ||
789 | void | |
790 | push_dummy_frame () | |
791 | { | |
792 | long w; | |
793 | CORE_ADDR rab, gr1; | |
794 | CORE_ADDR msp = read_register (MSP_REGNUM); | |
eb5b74ca JG |
795 | int lrnum, i; |
796 | CORE_ADDR original_lr0; | |
797 | ||
798 | /* Read original lr0 before changing gr1. This order isn't really needed | |
799 | since GDB happens to have a snapshot of all the regs and doesn't toss | |
800 | it when gr1 is changed. But it's The Right Thing To Do. */ | |
801 | original_lr0 = read_register (LR0_REGNUM); | |
dd3b648e | 802 | |
d0b04c6a | 803 | /* Allocate the new frame. */ |
dd3b648e RP |
804 | gr1 = read_register (GR1_REGNUM) - DUMMY_FRAME_RSIZE; |
805 | write_register (GR1_REGNUM, gr1); | |
806 | ||
807 | rab = read_register (RAB_REGNUM); | |
808 | if (gr1 < rab) | |
809 | { | |
810 | /* We need to spill registers. */ | |
811 | int num_bytes = rab - gr1; | |
812 | CORE_ADDR rfb = read_register (RFB_REGNUM); | |
813 | int i; | |
814 | long word; | |
815 | ||
816 | write_register (RFB_REGNUM, rfb - num_bytes); | |
817 | write_register (RAB_REGNUM, gr1); | |
818 | for (i = 0; i < num_bytes; i += 4) | |
819 | { | |
820 | /* Note: word is in target byte order. */ | |
b9163d1a SG |
821 | read_register_gen (LR0_REGNUM + i / 4, (char *) &word); |
822 | write_memory (rfb - num_bytes + i, (char *) &word, 4); | |
dd3b648e RP |
823 | } |
824 | } | |
825 | ||
826 | /* There are no arguments in to the dummy frame, so we don't need | |
827 | more than rsize plus the return address and lr1. */ | |
828 | write_register (LR0_REGNUM + 1, gr1 + DUMMY_FRAME_RSIZE + 2 * 4); | |
829 | ||
830 | /* Set the memory frame pointer. */ | |
831 | write_register (LR0_REGNUM + DUMMY_FRAME_RSIZE / 4 - 1, msp); | |
832 | ||
833 | /* Allocate arg_slop. */ | |
834 | write_register (MSP_REGNUM, msp - 16 * 4); | |
835 | ||
836 | /* Save registers. */ | |
d0b04c6a | 837 | lrnum = LR0_REGNUM + DUMMY_ARG/4; |
dd3b648e | 838 | for (i = 0; i < DUMMY_SAVE_SR128; ++i) |
d0b04c6a SG |
839 | write_register (lrnum++, read_register (SR_REGNUM (i + 128))); |
840 | for (i = 0; i < DUMMY_SAVE_SR160; ++i) | |
841 | write_register (lrnum++, read_register (SR_REGNUM (i + 160))); | |
6093e5b0 | 842 | for (i = 0; i < DUMMY_SAVE_GREGS; ++i) |
d0b04c6a | 843 | write_register (lrnum++, read_register (RETURN_REGNUM + i)); |
eb5b74ca | 844 | /* Save the PCs and LR0. */ |
d0b04c6a | 845 | write_register (lrnum++, read_register (PC_REGNUM)); |
eb5b74ca JG |
846 | write_register (lrnum++, read_register (NPC_REGNUM)); |
847 | write_register (lrnum++, read_register (PC2_REGNUM)); | |
848 | write_register (lrnum++, original_lr0); | |
d0b04c6a SG |
849 | } |
850 | ||
eb5b74ca JG |
851 | |
852 | ||
853 | /* | |
854 | This routine takes three arguments and makes the cached frames look | |
855 | as if these arguments defined a frame on the cache. This allows the | |
856 | rest of `info frame' to extract the important arguments without much | |
857 | difficulty. Since an individual frame on the 29K is determined by | |
858 | three values (FP, PC, and MSP), we really need all three to do a | |
859 | good job. */ | |
860 | ||
861 | FRAME | |
862 | setup_arbitrary_frame (argc, argv) | |
863 | int argc; | |
864 | FRAME_ADDR *argv; | |
865 | { | |
866 | FRAME fid; | |
867 | ||
868 | if (argc != 3) | |
869 | error ("AMD 29k frame specifications require three arguments: rsp pc msp"); | |
870 | ||
871 | fid = create_new_frame (argv[0], argv[1]); | |
872 | ||
873 | if (!fid) | |
874 | fatal ("internal: create_new_frame returned invalid frame id"); | |
875 | ||
876 | /* Creating a new frame munges the `frame' value from the current | |
877 | GR1, so we restore it again here. FIXME, untangle all this | |
878 | 29K frame stuff... */ | |
879 | fid->frame = argv[0]; | |
880 | ||
881 | /* Our MSP is in argv[2]. It'd be intelligent if we could just | |
882 | save this value in the FRAME. But the way it's set up (FIXME), | |
883 | we must save our caller's MSP. We compute that by adding our | |
884 | memory stack frame size to our MSP. */ | |
885 | fid->saved_msp = argv[2] + fid->msize; | |
886 | ||
887 | return fid; | |
888 | } | |
889 | ||
890 | ||
891 | ||
ca0622e7 JK |
892 | enum a29k_processor_types processor_type = a29k_unknown; |
893 | ||
894 | void | |
895 | a29k_get_processor_type () | |
896 | { | |
897 | unsigned int cfg_reg = (unsigned int) read_register (CFG_REGNUM); | |
898 | ||
899 | /* Most of these don't have freeze mode. */ | |
900 | processor_type = a29k_no_freeze_mode; | |
901 | ||
902 | switch ((cfg_reg >> 28) & 0xf) | |
903 | { | |
904 | case 0: | |
199b2450 | 905 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29000"); |
ca0622e7 JK |
906 | break; |
907 | case 1: | |
199b2450 | 908 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29005"); |
ca0622e7 JK |
909 | break; |
910 | case 2: | |
199b2450 | 911 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29050"); |
ca0622e7 JK |
912 | processor_type = a29k_freeze_mode; |
913 | break; | |
914 | case 3: | |
199b2450 | 915 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29035"); |
ca0622e7 JK |
916 | break; |
917 | case 4: | |
199b2450 | 918 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29030"); |
ca0622e7 JK |
919 | break; |
920 | case 5: | |
199b2450 | 921 | fprintf_filtered (gdb_stderr, "Remote debugging an Am2920*"); |
ca0622e7 JK |
922 | break; |
923 | case 6: | |
199b2450 | 924 | fprintf_filtered (gdb_stderr, "Remote debugging an Am2924*"); |
ca0622e7 JK |
925 | break; |
926 | case 7: | |
199b2450 | 927 | fprintf_filtered (gdb_stderr, "Remote debugging an Am29040"); |
ca0622e7 JK |
928 | break; |
929 | default: | |
199b2450 | 930 | fprintf_filtered (gdb_stderr, "Remote debugging an unknown Am29k\n"); |
ca0622e7 JK |
931 | /* Don't bother to print the revision. */ |
932 | return; | |
933 | } | |
199b2450 | 934 | fprintf_filtered (gdb_stderr, " revision %c\n", 'A' + ((cfg_reg >> 24) & 0x0f)); |
ca0622e7 | 935 | } |
946f014b | 936 | |
d0b04c6a SG |
937 | void |
938 | _initialize_29k() | |
939 | { | |
34517ebc JG |
940 | extern CORE_ADDR text_end; |
941 | ||
8f86a4e4 JG |
942 | /* FIXME, there should be a way to make a CORE_ADDR variable settable. */ |
943 | add_show_from_set | |
944 | (add_set_cmd ("rstack_high_address", class_support, var_uinteger, | |
945 | (char *)&rstack_high_address, | |
946 | "Set top address in memory of the register stack.\n\ | |
947 | Attempts to access registers saved above this address will be ignored\n\ | |
948 | or will produce the value -1.", &setlist), | |
949 | &showlist); | |
34517ebc JG |
950 | |
951 | /* FIXME, there should be a way to make a CORE_ADDR variable settable. */ | |
952 | add_show_from_set | |
953 | (add_set_cmd ("call_scratch_address", class_support, var_uinteger, | |
954 | (char *)&text_end, | |
19327ea5 JG |
955 | "Set address in memory where small amounts of RAM can be used\n\ |
956 | when making function calls into the inferior.", &setlist), | |
34517ebc | 957 | &showlist); |
8f86a4e4 | 958 | } |