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9d19df75 MS |
1 | /* Native-dependent code for GNU/Linux AArch64. |
2 | ||
32d0add0 | 3 | Copyright (C) 2011-2015 Free Software Foundation, Inc. |
9d19df75 MS |
4 | Contributed by ARM Ltd. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "defs.h" | |
22 | ||
23 | #include "inferior.h" | |
24 | #include "gdbcore.h" | |
25 | #include "regcache.h" | |
26 | #include "linux-nat.h" | |
27 | #include "target-descriptions.h" | |
28 | #include "auxv.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "aarch64-tdep.h" | |
31 | #include "aarch64-linux-tdep.h" | |
607685ec | 32 | #include "aarch32-linux-nat.h" |
554717a3 | 33 | #include "nat/aarch64-linux-hw-point.h" |
607685ec YQ |
34 | |
35 | #include "elf/external.h" | |
9d19df75 MS |
36 | #include "elf/common.h" |
37 | ||
38 | #include <sys/ptrace.h> | |
39 | #include <sys/utsname.h> | |
036cd381 | 40 | #include <asm/ptrace.h> |
9d19df75 MS |
41 | |
42 | #include "gregset.h" | |
43 | ||
9d19df75 MS |
44 | /* Defines ps_err_e, struct ps_prochandle. */ |
45 | #include "gdb_proc_service.h" | |
46 | ||
47 | #ifndef TRAP_HWBKPT | |
48 | #define TRAP_HWBKPT 0x0004 | |
49 | #endif | |
50 | ||
51 | /* On GNU/Linux, threads are implemented as pseudo-processes, in which | |
52 | case we may be tracing more than one process at a time. In that | |
53 | case, inferior_ptid will contain the main process ID and the | |
54 | individual thread (process) ID. get_thread_id () is used to get | |
55 | the thread id if it's available, and the process id otherwise. */ | |
56 | ||
57 | static int | |
58 | get_thread_id (ptid_t ptid) | |
59 | { | |
dfd4cc63 | 60 | int tid = ptid_get_lwp (ptid); |
9d19df75 MS |
61 | |
62 | if (0 == tid) | |
dfd4cc63 | 63 | tid = ptid_get_pid (ptid); |
9d19df75 MS |
64 | return tid; |
65 | } | |
66 | ||
d6c44983 YZ |
67 | /* Per-process data. We don't bind this to a per-inferior registry |
68 | because of targets like x86 GNU/Linux that need to keep track of | |
69 | processes that aren't bound to any inferior (e.g., fork children, | |
70 | checkpoints). */ | |
9d19df75 | 71 | |
d6c44983 | 72 | struct aarch64_process_info |
9d19df75 | 73 | { |
d6c44983 YZ |
74 | /* Linked list. */ |
75 | struct aarch64_process_info *next; | |
9d19df75 | 76 | |
d6c44983 YZ |
77 | /* The process identifier. */ |
78 | pid_t pid; | |
9d19df75 | 79 | |
d6c44983 YZ |
80 | /* Copy of aarch64 hardware debug registers. */ |
81 | struct aarch64_debug_reg_state state; | |
82 | }; | |
83 | ||
84 | static struct aarch64_process_info *aarch64_process_list = NULL; | |
85 | ||
86 | /* Find process data for process PID. */ | |
87 | ||
88 | static struct aarch64_process_info * | |
89 | aarch64_find_process_pid (pid_t pid) | |
90 | { | |
91 | struct aarch64_process_info *proc; | |
92 | ||
93 | for (proc = aarch64_process_list; proc; proc = proc->next) | |
94 | if (proc->pid == pid) | |
95 | return proc; | |
96 | ||
97 | return NULL; | |
9d19df75 MS |
98 | } |
99 | ||
d6c44983 YZ |
100 | /* Add process data for process PID. Returns newly allocated info |
101 | object. */ | |
9d19df75 | 102 | |
d6c44983 YZ |
103 | static struct aarch64_process_info * |
104 | aarch64_add_process (pid_t pid) | |
9d19df75 | 105 | { |
d6c44983 | 106 | struct aarch64_process_info *proc; |
9d19df75 | 107 | |
d6c44983 YZ |
108 | proc = xcalloc (1, sizeof (*proc)); |
109 | proc->pid = pid; | |
9d19df75 | 110 | |
d6c44983 YZ |
111 | proc->next = aarch64_process_list; |
112 | aarch64_process_list = proc; | |
113 | ||
114 | return proc; | |
115 | } | |
116 | ||
117 | /* Get data specific info for process PID, creating it if necessary. | |
118 | Never returns NULL. */ | |
119 | ||
120 | static struct aarch64_process_info * | |
121 | aarch64_process_info_get (pid_t pid) | |
9d19df75 | 122 | { |
d6c44983 YZ |
123 | struct aarch64_process_info *proc; |
124 | ||
125 | proc = aarch64_find_process_pid (pid); | |
126 | if (proc == NULL) | |
127 | proc = aarch64_add_process (pid); | |
9d19df75 | 128 | |
d6c44983 | 129 | return proc; |
9d19df75 MS |
130 | } |
131 | ||
d6c44983 YZ |
132 | /* Called whenever GDB is no longer debugging process PID. It deletes |
133 | data structures that keep track of debug register state. */ | |
9d19df75 | 134 | |
d6c44983 YZ |
135 | static void |
136 | aarch64_forget_process (pid_t pid) | |
9d19df75 | 137 | { |
d6c44983 | 138 | struct aarch64_process_info *proc, **proc_link; |
9d19df75 | 139 | |
d6c44983 YZ |
140 | proc = aarch64_process_list; |
141 | proc_link = &aarch64_process_list; | |
142 | ||
143 | while (proc != NULL) | |
9d19df75 | 144 | { |
d6c44983 YZ |
145 | if (proc->pid == pid) |
146 | { | |
147 | *proc_link = proc->next; | |
9d19df75 | 148 | |
d6c44983 YZ |
149 | xfree (proc); |
150 | return; | |
151 | } | |
152 | ||
153 | proc_link = &proc->next; | |
154 | proc = *proc_link; | |
155 | } | |
9d19df75 MS |
156 | } |
157 | ||
d6c44983 | 158 | /* Get debug registers state for process PID. */ |
9d19df75 MS |
159 | |
160 | static struct aarch64_debug_reg_state * | |
d6c44983 | 161 | aarch64_get_debug_reg_state (pid_t pid) |
9d19df75 | 162 | { |
d6c44983 | 163 | return &aarch64_process_info_get (pid)->state; |
9d19df75 MS |
164 | } |
165 | ||
9d19df75 MS |
166 | struct aarch64_dr_update_callback_param |
167 | { | |
168 | int is_watchpoint; | |
169 | unsigned int idx; | |
170 | }; | |
171 | ||
d6c44983 | 172 | /* Callback for iterate_over_lwps. Records the |
9d19df75 MS |
173 | information about the change of one hardware breakpoint/watchpoint |
174 | setting for the thread LWP. | |
175 | The information is passed in via PTR. | |
176 | N.B. The actual updating of hardware debug registers is not | |
177 | carried out until the moment the thread is resumed. */ | |
178 | ||
179 | static int | |
180 | debug_reg_change_callback (struct lwp_info *lwp, void *ptr) | |
181 | { | |
182 | struct aarch64_dr_update_callback_param *param_p | |
183 | = (struct aarch64_dr_update_callback_param *) ptr; | |
184 | int pid = get_thread_id (lwp->ptid); | |
185 | int idx = param_p->idx; | |
186 | int is_watchpoint = param_p->is_watchpoint; | |
187 | struct arch_lwp_info *info = lwp->arch_private; | |
188 | dr_changed_t *dr_changed_ptr; | |
189 | dr_changed_t dr_changed; | |
190 | ||
191 | if (info == NULL) | |
192 | info = lwp->arch_private = XCNEW (struct arch_lwp_info); | |
193 | ||
c5e92cca | 194 | if (show_debug_regs) |
9d19df75 MS |
195 | { |
196 | fprintf_unfiltered (gdb_stdlog, | |
197 | "debug_reg_change_callback: \n\tOn entry:\n"); | |
198 | fprintf_unfiltered (gdb_stdlog, | |
1d3ffd6b MS |
199 | "\tpid%d, dr_changed_bp=0x%s, " |
200 | "dr_changed_wp=0x%s\n", | |
201 | pid, phex (info->dr_changed_bp, 8), | |
202 | phex (info->dr_changed_wp, 8)); | |
9d19df75 MS |
203 | } |
204 | ||
205 | dr_changed_ptr = is_watchpoint ? &info->dr_changed_wp | |
206 | : &info->dr_changed_bp; | |
207 | dr_changed = *dr_changed_ptr; | |
208 | ||
209 | gdb_assert (idx >= 0 | |
210 | && (idx <= (is_watchpoint ? aarch64_num_wp_regs | |
211 | : aarch64_num_bp_regs))); | |
212 | ||
213 | /* The actual update is done later just before resuming the lwp, | |
214 | we just mark that one register pair needs updating. */ | |
215 | DR_MARK_N_CHANGED (dr_changed, idx); | |
216 | *dr_changed_ptr = dr_changed; | |
217 | ||
218 | /* If the lwp isn't stopped, force it to momentarily pause, so | |
219 | we can update its debug registers. */ | |
220 | if (!lwp->stopped) | |
221 | linux_stop_lwp (lwp); | |
222 | ||
c5e92cca | 223 | if (show_debug_regs) |
9d19df75 MS |
224 | { |
225 | fprintf_unfiltered (gdb_stdlog, | |
1d3ffd6b MS |
226 | "\tOn exit:\n\tpid%d, dr_changed_bp=0x%s, " |
227 | "dr_changed_wp=0x%s\n", | |
228 | pid, phex (info->dr_changed_bp, 8), | |
229 | phex (info->dr_changed_wp, 8)); | |
9d19df75 MS |
230 | } |
231 | ||
232 | /* Continue the iteration. */ | |
233 | return 0; | |
234 | } | |
235 | ||
236 | /* Notify each thread that their IDXth breakpoint/watchpoint register | |
237 | pair needs to be updated. The message will be recorded in each | |
238 | thread's arch-specific data area, the actual updating will be done | |
239 | when the thread is resumed. */ | |
240 | ||
554717a3 | 241 | void |
9d19df75 MS |
242 | aarch64_notify_debug_reg_change (const struct aarch64_debug_reg_state *state, |
243 | int is_watchpoint, unsigned int idx) | |
244 | { | |
245 | struct aarch64_dr_update_callback_param param; | |
d6c44983 | 246 | ptid_t pid_ptid = pid_to_ptid (ptid_get_pid (inferior_ptid)); |
9d19df75 MS |
247 | |
248 | param.is_watchpoint = is_watchpoint; | |
249 | param.idx = idx; | |
250 | ||
d6c44983 | 251 | iterate_over_lwps (pid_ptid, debug_reg_change_callback, (void *) ¶m); |
9d19df75 MS |
252 | } |
253 | ||
9d19df75 MS |
254 | /* Fill GDB's register array with the general-purpose register values |
255 | from the current thread. */ | |
256 | ||
257 | static void | |
258 | fetch_gregs_from_thread (struct regcache *regcache) | |
259 | { | |
607685ec YQ |
260 | int ret, tid; |
261 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
9d19df75 MS |
262 | elf_gregset_t regs; |
263 | struct iovec iovec; | |
264 | ||
607685ec YQ |
265 | /* Make sure REGS can hold all registers contents on both aarch64 |
266 | and arm. */ | |
267 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
268 | ||
9d19df75 MS |
269 | tid = get_thread_id (inferior_ptid); |
270 | ||
271 | iovec.iov_base = ®s; | |
607685ec YQ |
272 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
273 | iovec.iov_len = 18 * 4; | |
274 | else | |
275 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
276 | |
277 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
278 | if (ret < 0) | |
279 | perror_with_name (_("Unable to fetch general registers.")); | |
280 | ||
607685ec YQ |
281 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
282 | aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1); | |
283 | else | |
284 | { | |
285 | int regno; | |
286 | ||
287 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
288 | regcache_raw_supply (regcache, regno, ®s[regno - AARCH64_X0_REGNUM]); | |
289 | } | |
9d19df75 MS |
290 | } |
291 | ||
292 | /* Store to the current thread the valid general-purpose register | |
293 | values in the GDB's register array. */ | |
294 | ||
295 | static void | |
296 | store_gregs_to_thread (const struct regcache *regcache) | |
297 | { | |
607685ec | 298 | int ret, tid; |
9d19df75 MS |
299 | elf_gregset_t regs; |
300 | struct iovec iovec; | |
607685ec | 301 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
9d19df75 | 302 | |
607685ec YQ |
303 | /* Make sure REGS can hold all registers contents on both aarch64 |
304 | and arm. */ | |
305 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
9d19df75 MS |
306 | tid = get_thread_id (inferior_ptid); |
307 | ||
308 | iovec.iov_base = ®s; | |
607685ec YQ |
309 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
310 | iovec.iov_len = 18 * 4; | |
311 | else | |
312 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
313 | |
314 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
315 | if (ret < 0) | |
316 | perror_with_name (_("Unable to fetch general registers.")); | |
317 | ||
607685ec YQ |
318 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
319 | aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1); | |
320 | else | |
321 | { | |
322 | int regno; | |
323 | ||
324 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
325 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
326 | regcache_raw_collect (regcache, regno, | |
327 | ®s[regno - AARCH64_X0_REGNUM]); | |
328 | } | |
9d19df75 MS |
329 | |
330 | ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec); | |
331 | if (ret < 0) | |
332 | perror_with_name (_("Unable to store general registers.")); | |
333 | } | |
334 | ||
335 | /* Fill GDB's register array with the fp/simd register values | |
336 | from the current thread. */ | |
337 | ||
338 | static void | |
339 | fetch_fpregs_from_thread (struct regcache *regcache) | |
340 | { | |
607685ec | 341 | int ret, tid; |
9d19df75 MS |
342 | elf_fpregset_t regs; |
343 | struct iovec iovec; | |
607685ec YQ |
344 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
345 | ||
346 | /* Make sure REGS can hold all VFP registers contents on both aarch64 | |
347 | and arm. */ | |
348 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
9d19df75 MS |
349 | |
350 | tid = get_thread_id (inferior_ptid); | |
351 | ||
352 | iovec.iov_base = ®s; | |
9d19df75 | 353 | |
607685ec YQ |
354 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
355 | { | |
356 | iovec.iov_len = VFP_REGS_SIZE; | |
357 | ||
358 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); | |
359 | if (ret < 0) | |
360 | perror_with_name (_("Unable to fetch VFP registers.")); | |
361 | ||
362 | aarch32_vfp_regcache_supply (regcache, (gdb_byte *) ®s, 32); | |
363 | } | |
364 | else | |
365 | { | |
366 | int regno; | |
367 | ||
368 | iovec.iov_len = sizeof (regs); | |
9d19df75 | 369 | |
607685ec YQ |
370 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); |
371 | if (ret < 0) | |
372 | perror_with_name (_("Unable to fetch vFP/SIMD registers.")); | |
9d19df75 | 373 | |
607685ec YQ |
374 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) |
375 | regcache_raw_supply (regcache, regno, | |
376 | ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
377 | ||
378 | regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, ®s.fpsr); | |
379 | regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, ®s.fpcr); | |
380 | } | |
9d19df75 MS |
381 | } |
382 | ||
383 | /* Store to the current thread the valid fp/simd register | |
384 | values in the GDB's register array. */ | |
385 | ||
386 | static void | |
387 | store_fpregs_to_thread (const struct regcache *regcache) | |
388 | { | |
607685ec | 389 | int ret, tid; |
9d19df75 MS |
390 | elf_fpregset_t regs; |
391 | struct iovec iovec; | |
607685ec | 392 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
9d19df75 | 393 | |
607685ec YQ |
394 | /* Make sure REGS can hold all VFP registers contents on both aarch64 |
395 | and arm. */ | |
396 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
9d19df75 MS |
397 | tid = get_thread_id (inferior_ptid); |
398 | ||
399 | iovec.iov_base = ®s; | |
9d19df75 | 400 | |
607685ec YQ |
401 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
402 | { | |
403 | iovec.iov_len = VFP_REGS_SIZE; | |
9d19df75 | 404 | |
607685ec YQ |
405 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); |
406 | if (ret < 0) | |
407 | perror_with_name (_("Unable to fetch VFP registers.")); | |
9d19df75 | 408 | |
607685ec YQ |
409 | aarch32_vfp_regcache_collect (regcache, (gdb_byte *) ®s, 32); |
410 | } | |
411 | else | |
412 | { | |
413 | int regno; | |
9d19df75 | 414 | |
607685ec YQ |
415 | iovec.iov_len = sizeof (regs); |
416 | ||
417 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); | |
418 | if (ret < 0) | |
419 | perror_with_name (_("Unable to fetch FP/SIMD registers.")); | |
420 | ||
421 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) | |
422 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
423 | regcache_raw_collect (regcache, regno, | |
424 | (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
425 | ||
426 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM)) | |
427 | regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM, | |
428 | (char *) ®s.fpsr); | |
429 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM)) | |
430 | regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM, | |
431 | (char *) ®s.fpcr); | |
432 | } | |
433 | ||
434 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) | |
435 | { | |
436 | ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec); | |
437 | if (ret < 0) | |
438 | perror_with_name (_("Unable to store VFP registers.")); | |
439 | } | |
440 | else | |
441 | { | |
442 | ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec); | |
443 | if (ret < 0) | |
444 | perror_with_name (_("Unable to store FP/SIMD registers.")); | |
445 | } | |
9d19df75 MS |
446 | } |
447 | ||
448 | /* Implement the "to_fetch_register" target_ops method. */ | |
449 | ||
450 | static void | |
451 | aarch64_linux_fetch_inferior_registers (struct target_ops *ops, | |
452 | struct regcache *regcache, | |
453 | int regno) | |
454 | { | |
455 | if (regno == -1) | |
456 | { | |
457 | fetch_gregs_from_thread (regcache); | |
458 | fetch_fpregs_from_thread (regcache); | |
459 | } | |
460 | else if (regno < AARCH64_V0_REGNUM) | |
461 | fetch_gregs_from_thread (regcache); | |
462 | else | |
463 | fetch_fpregs_from_thread (regcache); | |
464 | } | |
465 | ||
466 | /* Implement the "to_store_register" target_ops method. */ | |
467 | ||
468 | static void | |
469 | aarch64_linux_store_inferior_registers (struct target_ops *ops, | |
470 | struct regcache *regcache, | |
471 | int regno) | |
472 | { | |
473 | if (regno == -1) | |
474 | { | |
475 | store_gregs_to_thread (regcache); | |
476 | store_fpregs_to_thread (regcache); | |
477 | } | |
478 | else if (regno < AARCH64_V0_REGNUM) | |
479 | store_gregs_to_thread (regcache); | |
480 | else | |
481 | store_fpregs_to_thread (regcache); | |
482 | } | |
483 | ||
484 | /* Fill register REGNO (if it is a general-purpose register) in | |
485 | *GREGSETPS with the value in GDB's register array. If REGNO is -1, | |
486 | do this for all registers. */ | |
487 | ||
488 | void | |
489 | fill_gregset (const struct regcache *regcache, | |
490 | gdb_gregset_t *gregsetp, int regno) | |
491 | { | |
d4d793bf AA |
492 | regcache_collect_regset (&aarch64_linux_gregset, regcache, |
493 | regno, (gdb_byte *) gregsetp, | |
494 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
495 | } |
496 | ||
497 | /* Fill GDB's register array with the general-purpose register values | |
498 | in *GREGSETP. */ | |
499 | ||
500 | void | |
501 | supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | |
502 | { | |
d4d793bf AA |
503 | regcache_supply_regset (&aarch64_linux_gregset, regcache, -1, |
504 | (const gdb_byte *) gregsetp, | |
505 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
506 | } |
507 | ||
508 | /* Fill register REGNO (if it is a floating-point register) in | |
509 | *FPREGSETP with the value in GDB's register array. If REGNO is -1, | |
510 | do this for all registers. */ | |
511 | ||
512 | void | |
513 | fill_fpregset (const struct regcache *regcache, | |
514 | gdb_fpregset_t *fpregsetp, int regno) | |
515 | { | |
d4d793bf AA |
516 | regcache_collect_regset (&aarch64_linux_fpregset, regcache, |
517 | regno, (gdb_byte *) fpregsetp, | |
518 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
519 | } |
520 | ||
521 | /* Fill GDB's register array with the floating-point register values | |
522 | in *FPREGSETP. */ | |
523 | ||
524 | void | |
525 | supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | |
526 | { | |
d4d793bf AA |
527 | regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1, |
528 | (const gdb_byte *) fpregsetp, | |
529 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
530 | } |
531 | ||
532 | /* Called when resuming a thread. | |
533 | The hardware debug registers are updated when there is any change. */ | |
534 | ||
535 | static void | |
536 | aarch64_linux_prepare_to_resume (struct lwp_info *lwp) | |
537 | { | |
538 | struct arch_lwp_info *info = lwp->arch_private; | |
539 | ||
540 | /* NULL means this is the main thread still going through the shell, | |
541 | or, no watchpoint has been set yet. In that case, there's | |
542 | nothing to do. */ | |
543 | if (info == NULL) | |
544 | return; | |
545 | ||
546 | if (DR_HAS_CHANGED (info->dr_changed_bp) | |
547 | || DR_HAS_CHANGED (info->dr_changed_wp)) | |
548 | { | |
dfd4cc63 | 549 | int tid = ptid_get_lwp (lwp->ptid); |
d6c44983 YZ |
550 | struct aarch64_debug_reg_state *state |
551 | = aarch64_get_debug_reg_state (ptid_get_pid (lwp->ptid)); | |
9d19df75 | 552 | |
c5e92cca | 553 | if (show_debug_regs) |
9d19df75 MS |
554 | fprintf_unfiltered (gdb_stdlog, "prepare_to_resume thread %d\n", tid); |
555 | ||
556 | /* Watchpoints. */ | |
557 | if (DR_HAS_CHANGED (info->dr_changed_wp)) | |
558 | { | |
559 | aarch64_linux_set_debug_regs (state, tid, 1); | |
560 | DR_CLEAR_CHANGED (info->dr_changed_wp); | |
561 | } | |
562 | ||
563 | /* Breakpoints. */ | |
564 | if (DR_HAS_CHANGED (info->dr_changed_bp)) | |
565 | { | |
566 | aarch64_linux_set_debug_regs (state, tid, 0); | |
567 | DR_CLEAR_CHANGED (info->dr_changed_bp); | |
568 | } | |
569 | } | |
570 | } | |
571 | ||
572 | static void | |
573 | aarch64_linux_new_thread (struct lwp_info *lp) | |
574 | { | |
575 | struct arch_lwp_info *info = XCNEW (struct arch_lwp_info); | |
576 | ||
577 | /* Mark that all the hardware breakpoint/watchpoint register pairs | |
578 | for this thread need to be initialized. */ | |
579 | DR_MARK_ALL_CHANGED (info->dr_changed_bp, aarch64_num_bp_regs); | |
580 | DR_MARK_ALL_CHANGED (info->dr_changed_wp, aarch64_num_wp_regs); | |
581 | ||
582 | lp->arch_private = info; | |
583 | } | |
d6c44983 YZ |
584 | |
585 | /* linux_nat_new_fork hook. */ | |
586 | ||
587 | static void | |
588 | aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid) | |
589 | { | |
590 | pid_t parent_pid; | |
591 | struct aarch64_debug_reg_state *parent_state; | |
592 | struct aarch64_debug_reg_state *child_state; | |
593 | ||
594 | /* NULL means no watchpoint has ever been set in the parent. In | |
595 | that case, there's nothing to do. */ | |
596 | if (parent->arch_private == NULL) | |
597 | return; | |
598 | ||
599 | /* GDB core assumes the child inherits the watchpoints/hw | |
600 | breakpoints of the parent, and will remove them all from the | |
601 | forked off process. Copy the debug registers mirrors into the | |
602 | new process so that all breakpoints and watchpoints can be | |
603 | removed together. */ | |
604 | ||
605 | parent_pid = ptid_get_pid (parent->ptid); | |
606 | parent_state = aarch64_get_debug_reg_state (parent_pid); | |
607 | child_state = aarch64_get_debug_reg_state (child_pid); | |
608 | *child_state = *parent_state; | |
609 | } | |
9d19df75 MS |
610 | \f |
611 | ||
612 | /* Called by libthread_db. Returns a pointer to the thread local | |
613 | storage (or its descriptor). */ | |
614 | ||
615 | ps_err_e | |
616 | ps_get_thread_area (const struct ps_prochandle *ph, | |
617 | lwpid_t lwpid, int idx, void **base) | |
618 | { | |
619 | struct iovec iovec; | |
620 | uint64_t reg; | |
621 | ||
622 | iovec.iov_base = ® | |
623 | iovec.iov_len = sizeof (reg); | |
624 | ||
625 | if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0) | |
626 | return PS_ERR; | |
627 | ||
628 | /* IDX is the bias from the thread pointer to the beginning of the | |
629 | thread descriptor. It has to be subtracted due to implementation | |
630 | quirks in libthread_db. */ | |
631 | *base = (void *) (reg - idx); | |
632 | ||
633 | return PS_OK; | |
634 | } | |
635 | \f | |
636 | ||
0f4576e3 YQ |
637 | /* Get the hardware debug register capacity information from the |
638 | inferior represented by PTID. */ | |
9d19df75 MS |
639 | |
640 | static void | |
0f4576e3 | 641 | aarch64_linux_get_debug_reg_capacity (ptid_t ptid) |
9d19df75 MS |
642 | { |
643 | int tid; | |
644 | struct iovec iov; | |
645 | struct user_hwdebug_state dreg_state; | |
646 | ||
e53b6938 | 647 | tid = ptid_get_pid (ptid); |
9d19df75 MS |
648 | iov.iov_base = &dreg_state; |
649 | iov.iov_len = sizeof (dreg_state); | |
650 | ||
651 | /* Get hardware watchpoint register info. */ | |
652 | if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_WATCH, &iov) == 0 | |
653 | && AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8) | |
654 | { | |
655 | aarch64_num_wp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info); | |
656 | if (aarch64_num_wp_regs > AARCH64_HWP_MAX_NUM) | |
657 | { | |
1d3ffd6b MS |
658 | warning (_("Unexpected number of hardware watchpoint registers" |
659 | " reported by ptrace, got %d, expected %d."), | |
9d19df75 MS |
660 | aarch64_num_wp_regs, AARCH64_HWP_MAX_NUM); |
661 | aarch64_num_wp_regs = AARCH64_HWP_MAX_NUM; | |
662 | } | |
663 | } | |
664 | else | |
665 | { | |
1d3ffd6b MS |
666 | warning (_("Unable to determine the number of hardware watchpoints" |
667 | " available.")); | |
9d19df75 MS |
668 | aarch64_num_wp_regs = 0; |
669 | } | |
670 | ||
671 | /* Get hardware breakpoint register info. */ | |
672 | if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_BREAK, &iov) == 0 | |
673 | && AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8) | |
674 | { | |
675 | aarch64_num_bp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info); | |
676 | if (aarch64_num_bp_regs > AARCH64_HBP_MAX_NUM) | |
677 | { | |
1d3ffd6b MS |
678 | warning (_("Unexpected number of hardware breakpoint registers" |
679 | " reported by ptrace, got %d, expected %d."), | |
9d19df75 MS |
680 | aarch64_num_bp_regs, AARCH64_HBP_MAX_NUM); |
681 | aarch64_num_bp_regs = AARCH64_HBP_MAX_NUM; | |
682 | } | |
683 | } | |
684 | else | |
685 | { | |
1d3ffd6b MS |
686 | warning (_("Unable to determine the number of hardware breakpoints" |
687 | " available.")); | |
9d19df75 MS |
688 | aarch64_num_bp_regs = 0; |
689 | } | |
690 | } | |
691 | ||
2e97a79e TT |
692 | static void (*super_post_startup_inferior) (struct target_ops *self, |
693 | ptid_t ptid); | |
9d19df75 MS |
694 | |
695 | /* Implement the "to_post_startup_inferior" target_ops method. */ | |
696 | ||
697 | static void | |
2e97a79e TT |
698 | aarch64_linux_child_post_startup_inferior (struct target_ops *self, |
699 | ptid_t ptid) | |
9d19df75 | 700 | { |
d6c44983 | 701 | aarch64_forget_process (ptid_get_pid (ptid)); |
0f4576e3 | 702 | aarch64_linux_get_debug_reg_capacity (ptid); |
2e97a79e | 703 | super_post_startup_inferior (self, ptid); |
9d19df75 MS |
704 | } |
705 | ||
607685ec YQ |
706 | extern struct target_desc *tdesc_arm_with_vfpv3; |
707 | extern struct target_desc *tdesc_arm_with_neon; | |
708 | ||
9d19df75 MS |
709 | /* Implement the "to_read_description" target_ops method. */ |
710 | ||
711 | static const struct target_desc * | |
712 | aarch64_linux_read_description (struct target_ops *ops) | |
713 | { | |
607685ec YQ |
714 | CORE_ADDR at_phent; |
715 | ||
716 | if (target_auxv_search (ops, AT_PHENT, &at_phent) == 1) | |
717 | { | |
718 | if (at_phent == sizeof (Elf64_External_Phdr)) | |
719 | return tdesc_aarch64; | |
720 | else | |
721 | { | |
722 | CORE_ADDR arm_hwcap = 0; | |
723 | ||
724 | if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1) | |
725 | return ops->beneath->to_read_description (ops->beneath); | |
726 | ||
727 | #ifndef COMPAT_HWCAP_VFP | |
728 | #define COMPAT_HWCAP_VFP (1 << 6) | |
729 | #endif | |
730 | #ifndef COMPAT_HWCAP_NEON | |
731 | #define COMPAT_HWCAP_NEON (1 << 12) | |
732 | #endif | |
733 | #ifndef COMPAT_HWCAP_VFPv3 | |
734 | #define COMPAT_HWCAP_VFPv3 (1 << 13) | |
735 | #endif | |
736 | ||
737 | if (arm_hwcap & COMPAT_HWCAP_VFP) | |
738 | { | |
739 | char *buf; | |
740 | const struct target_desc *result = NULL; | |
741 | ||
742 | if (arm_hwcap & COMPAT_HWCAP_NEON) | |
743 | result = tdesc_arm_with_neon; | |
744 | else if (arm_hwcap & COMPAT_HWCAP_VFPv3) | |
745 | result = tdesc_arm_with_vfpv3; | |
746 | ||
747 | return result; | |
748 | } | |
749 | ||
750 | return NULL; | |
751 | } | |
752 | } | |
753 | ||
9d19df75 MS |
754 | return tdesc_aarch64; |
755 | } | |
756 | ||
9d19df75 MS |
757 | /* Returns the number of hardware watchpoints of type TYPE that we can |
758 | set. Value is positive if we can set CNT watchpoints, zero if | |
759 | setting watchpoints of type TYPE is not supported, and negative if | |
760 | CNT is more than the maximum number of watchpoints of type TYPE | |
761 | that we can support. TYPE is one of bp_hardware_watchpoint, | |
762 | bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint. | |
763 | CNT is the number of such watchpoints used so far (including this | |
764 | one). OTHERTYPE is non-zero if other types of watchpoints are | |
765 | currently enabled. | |
766 | ||
767 | We always return 1 here because we don't have enough information | |
768 | about possible overlap of addresses that they want to watch. As an | |
769 | extreme example, consider the case where all the watchpoints watch | |
770 | the same address and the same region length: then we can handle a | |
771 | virtually unlimited number of watchpoints, due to debug register | |
772 | sharing implemented via reference counts. */ | |
773 | ||
774 | static int | |
5461485a TT |
775 | aarch64_linux_can_use_hw_breakpoint (struct target_ops *self, |
776 | int type, int cnt, int othertype) | |
9d19df75 MS |
777 | { |
778 | return 1; | |
779 | } | |
780 | ||
0d5ed153 | 781 | /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address. |
9d19df75 MS |
782 | Return 0 on success, -1 on failure. */ |
783 | ||
784 | static int | |
23a26771 TT |
785 | aarch64_linux_insert_hw_breakpoint (struct target_ops *self, |
786 | struct gdbarch *gdbarch, | |
9d19df75 MS |
787 | struct bp_target_info *bp_tgt) |
788 | { | |
789 | int ret; | |
0d5ed153 | 790 | CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; |
9d19df75 | 791 | const int len = 4; |
2ecd81c2 | 792 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
793 | struct aarch64_debug_reg_state *state |
794 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 795 | |
c5e92cca | 796 | if (show_debug_regs) |
9d19df75 MS |
797 | fprintf_unfiltered |
798 | (gdb_stdlog, | |
799 | "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
800 | (unsigned long) addr, len); | |
801 | ||
c67ca4de | 802 | ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 803 | |
c5e92cca | 804 | if (show_debug_regs) |
d6c44983 | 805 | { |
d6c44983 | 806 | aarch64_show_debug_reg_state (state, |
2fd0f80d | 807 | "insert_hw_breakpoint", addr, len, type); |
d6c44983 | 808 | } |
9d19df75 MS |
809 | |
810 | return ret; | |
811 | } | |
812 | ||
813 | /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address. | |
814 | Return 0 on success, -1 on failure. */ | |
815 | ||
816 | static int | |
a64dc96c TT |
817 | aarch64_linux_remove_hw_breakpoint (struct target_ops *self, |
818 | struct gdbarch *gdbarch, | |
9d19df75 MS |
819 | struct bp_target_info *bp_tgt) |
820 | { | |
821 | int ret; | |
822 | CORE_ADDR addr = bp_tgt->placed_address; | |
823 | const int len = 4; | |
2ecd81c2 | 824 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
825 | struct aarch64_debug_reg_state *state |
826 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 827 | |
c5e92cca | 828 | if (show_debug_regs) |
9d19df75 MS |
829 | fprintf_unfiltered |
830 | (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
831 | (unsigned long) addr, len); | |
832 | ||
c67ca4de | 833 | ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 834 | |
c5e92cca | 835 | if (show_debug_regs) |
d6c44983 | 836 | { |
d6c44983 YZ |
837 | aarch64_show_debug_reg_state (state, |
838 | "remove_hw_watchpoint", addr, len, type); | |
839 | } | |
9d19df75 MS |
840 | |
841 | return ret; | |
842 | } | |
843 | ||
9d19df75 MS |
844 | /* Implement the "to_insert_watchpoint" target_ops method. |
845 | ||
846 | Insert a watchpoint to watch a memory region which starts at | |
847 | address ADDR and whose length is LEN bytes. Watch memory accesses | |
848 | of the type TYPE. Return 0 on success, -1 on failure. */ | |
849 | ||
850 | static int | |
7bb99c53 TT |
851 | aarch64_linux_insert_watchpoint (struct target_ops *self, |
852 | CORE_ADDR addr, int len, int type, | |
9d19df75 MS |
853 | struct expression *cond) |
854 | { | |
855 | int ret; | |
c67ca4de YQ |
856 | struct aarch64_debug_reg_state *state |
857 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 858 | |
c5e92cca | 859 | if (show_debug_regs) |
9d19df75 MS |
860 | fprintf_unfiltered (gdb_stdlog, |
861 | "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
862 | (unsigned long) addr, len); | |
863 | ||
864 | gdb_assert (type != hw_execute); | |
865 | ||
c67ca4de | 866 | ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 867 | |
c5e92cca | 868 | if (show_debug_regs) |
d6c44983 | 869 | { |
d6c44983 YZ |
870 | aarch64_show_debug_reg_state (state, |
871 | "insert_watchpoint", addr, len, type); | |
872 | } | |
9d19df75 MS |
873 | |
874 | return ret; | |
875 | } | |
876 | ||
877 | /* Implement the "to_remove_watchpoint" target_ops method. | |
878 | Remove a watchpoint that watched the memory region which starts at | |
879 | address ADDR, whose length is LEN bytes, and for accesses of the | |
880 | type TYPE. Return 0 on success, -1 on failure. */ | |
881 | ||
882 | static int | |
11b5219a TT |
883 | aarch64_linux_remove_watchpoint (struct target_ops *self, |
884 | CORE_ADDR addr, int len, int type, | |
9d19df75 MS |
885 | struct expression *cond) |
886 | { | |
887 | int ret; | |
c67ca4de YQ |
888 | struct aarch64_debug_reg_state *state |
889 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 890 | |
c5e92cca | 891 | if (show_debug_regs) |
9d19df75 MS |
892 | fprintf_unfiltered (gdb_stdlog, |
893 | "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
894 | (unsigned long) addr, len); | |
895 | ||
896 | gdb_assert (type != hw_execute); | |
897 | ||
c67ca4de | 898 | ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 899 | |
c5e92cca | 900 | if (show_debug_regs) |
d6c44983 | 901 | { |
d6c44983 YZ |
902 | aarch64_show_debug_reg_state (state, |
903 | "remove_watchpoint", addr, len, type); | |
904 | } | |
9d19df75 MS |
905 | |
906 | return ret; | |
907 | } | |
908 | ||
909 | /* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */ | |
910 | ||
911 | static int | |
31568a15 TT |
912 | aarch64_linux_region_ok_for_hw_watchpoint (struct target_ops *self, |
913 | CORE_ADDR addr, int len) | |
9d19df75 MS |
914 | { |
915 | CORE_ADDR aligned_addr; | |
916 | ||
917 | /* Can not set watchpoints for zero or negative lengths. */ | |
918 | if (len <= 0) | |
919 | return 0; | |
920 | ||
921 | /* Must have hardware watchpoint debug register(s). */ | |
922 | if (aarch64_num_wp_regs == 0) | |
923 | return 0; | |
924 | ||
925 | /* We support unaligned watchpoint address and arbitrary length, | |
926 | as long as the size of the whole watched area after alignment | |
927 | doesn't exceed size of the total area that all watchpoint debug | |
928 | registers can watch cooperatively. | |
929 | ||
930 | This is a very relaxed rule, but unfortunately there are | |
931 | limitations, e.g. false-positive hits, due to limited support of | |
932 | hardware debug registers in the kernel. See comment above | |
933 | aarch64_align_watchpoint for more information. */ | |
934 | ||
935 | aligned_addr = addr & ~(AARCH64_HWP_MAX_LEN_PER_REG - 1); | |
936 | if (aligned_addr + aarch64_num_wp_regs * AARCH64_HWP_MAX_LEN_PER_REG | |
937 | < addr + len) | |
938 | return 0; | |
939 | ||
940 | /* All tests passed so we are likely to be able to set the watchpoint. | |
941 | The reason that it is 'likely' rather than 'must' is because | |
942 | we don't check the current usage of the watchpoint registers, and | |
943 | there may not be enough registers available for this watchpoint. | |
944 | Ideally we should check the cached debug register state, however | |
945 | the checking is costly. */ | |
946 | return 1; | |
947 | } | |
948 | ||
949 | /* Implement the "to_stopped_data_address" target_ops method. */ | |
950 | ||
951 | static int | |
952 | aarch64_linux_stopped_data_address (struct target_ops *target, | |
953 | CORE_ADDR *addr_p) | |
954 | { | |
955 | siginfo_t siginfo; | |
956 | int i, tid; | |
957 | struct aarch64_debug_reg_state *state; | |
958 | ||
959 | if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) | |
960 | return 0; | |
961 | ||
962 | /* This must be a hardware breakpoint. */ | |
963 | if (siginfo.si_signo != SIGTRAP | |
964 | || (siginfo.si_code & 0xffff) != TRAP_HWBKPT) | |
965 | return 0; | |
966 | ||
967 | /* Check if the address matches any watched address. */ | |
d6c44983 | 968 | state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); |
9d19df75 MS |
969 | for (i = aarch64_num_wp_regs - 1; i >= 0; --i) |
970 | { | |
971 | const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]); | |
972 | const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr; | |
973 | const CORE_ADDR addr_watch = state->dr_addr_wp[i]; | |
974 | ||
975 | if (state->dr_ref_count_wp[i] | |
976 | && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i]) | |
977 | && addr_trap >= addr_watch | |
978 | && addr_trap < addr_watch + len) | |
979 | { | |
980 | *addr_p = addr_trap; | |
981 | return 1; | |
982 | } | |
983 | } | |
984 | ||
985 | return 0; | |
986 | } | |
987 | ||
988 | /* Implement the "to_stopped_by_watchpoint" target_ops method. */ | |
989 | ||
990 | static int | |
6a109b6b | 991 | aarch64_linux_stopped_by_watchpoint (struct target_ops *ops) |
9d19df75 MS |
992 | { |
993 | CORE_ADDR addr; | |
994 | ||
6a109b6b | 995 | return aarch64_linux_stopped_data_address (ops, &addr); |
9d19df75 MS |
996 | } |
997 | ||
998 | /* Implement the "to_watchpoint_addr_within_range" target_ops method. */ | |
999 | ||
1000 | static int | |
1001 | aarch64_linux_watchpoint_addr_within_range (struct target_ops *target, | |
1002 | CORE_ADDR addr, | |
1003 | CORE_ADDR start, int length) | |
1004 | { | |
1005 | return start <= addr && start + length - 1 >= addr; | |
1006 | } | |
1007 | ||
1008 | /* Define AArch64 maintenance commands. */ | |
1009 | ||
1010 | static void | |
1011 | add_show_debug_regs_command (void) | |
1012 | { | |
1013 | /* A maintenance command to enable printing the internal DRi mirror | |
1014 | variables. */ | |
1015 | add_setshow_boolean_cmd ("show-debug-regs", class_maintenance, | |
c5e92cca | 1016 | &show_debug_regs, _("\ |
9d19df75 MS |
1017 | Set whether to show variables that mirror the AArch64 debug registers."), _("\ |
1018 | Show whether to show variables that mirror the AArch64 debug registers."), _("\ | |
1019 | Use \"on\" to enable, \"off\" to disable.\n\ | |
1020 | If enabled, the debug registers values are shown when GDB inserts\n\ | |
1021 | or removes a hardware breakpoint or watchpoint, and when the inferior\n\ | |
1022 | triggers a breakpoint or watchpoint."), | |
1023 | NULL, | |
1024 | NULL, | |
1025 | &maintenance_set_cmdlist, | |
1026 | &maintenance_show_cmdlist); | |
1027 | } | |
1028 | ||
1029 | /* -Wmissing-prototypes. */ | |
1030 | void _initialize_aarch64_linux_nat (void); | |
1031 | ||
1032 | void | |
1033 | _initialize_aarch64_linux_nat (void) | |
1034 | { | |
1035 | struct target_ops *t; | |
1036 | ||
1037 | /* Fill in the generic GNU/Linux methods. */ | |
1038 | t = linux_target (); | |
1039 | ||
1040 | add_show_debug_regs_command (); | |
1041 | ||
1042 | /* Add our register access methods. */ | |
1043 | t->to_fetch_registers = aarch64_linux_fetch_inferior_registers; | |
1044 | t->to_store_registers = aarch64_linux_store_inferior_registers; | |
1045 | ||
1046 | t->to_read_description = aarch64_linux_read_description; | |
1047 | ||
1048 | t->to_can_use_hw_breakpoint = aarch64_linux_can_use_hw_breakpoint; | |
1049 | t->to_insert_hw_breakpoint = aarch64_linux_insert_hw_breakpoint; | |
1050 | t->to_remove_hw_breakpoint = aarch64_linux_remove_hw_breakpoint; | |
1051 | t->to_region_ok_for_hw_watchpoint = | |
1052 | aarch64_linux_region_ok_for_hw_watchpoint; | |
1053 | t->to_insert_watchpoint = aarch64_linux_insert_watchpoint; | |
1054 | t->to_remove_watchpoint = aarch64_linux_remove_watchpoint; | |
1055 | t->to_stopped_by_watchpoint = aarch64_linux_stopped_by_watchpoint; | |
1056 | t->to_stopped_data_address = aarch64_linux_stopped_data_address; | |
1057 | t->to_watchpoint_addr_within_range = | |
1058 | aarch64_linux_watchpoint_addr_within_range; | |
9d19df75 MS |
1059 | |
1060 | /* Override the GNU/Linux inferior startup hook. */ | |
1061 | super_post_startup_inferior = t->to_post_startup_inferior; | |
1062 | t->to_post_startup_inferior = aarch64_linux_child_post_startup_inferior; | |
1063 | ||
1064 | /* Register the target. */ | |
1065 | linux_nat_add_target (t); | |
1066 | linux_nat_set_new_thread (t, aarch64_linux_new_thread); | |
d6c44983 YZ |
1067 | linux_nat_set_new_fork (t, aarch64_linux_new_fork); |
1068 | linux_nat_set_forget_process (t, aarch64_forget_process); | |
9d19df75 MS |
1069 | linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume); |
1070 | } |