Commit | Line | Data |
---|---|---|
9d19df75 MS |
1 | /* Native-dependent code for GNU/Linux AArch64. |
2 | ||
e2882c85 | 3 | Copyright (C) 2011-2018 Free Software Foundation, Inc. |
9d19df75 MS |
4 | Contributed by ARM Ltd. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "defs.h" | |
22 | ||
23 | #include "inferior.h" | |
24 | #include "gdbcore.h" | |
25 | #include "regcache.h" | |
26 | #include "linux-nat.h" | |
27 | #include "target-descriptions.h" | |
28 | #include "auxv.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "aarch64-tdep.h" | |
31 | #include "aarch64-linux-tdep.h" | |
607685ec | 32 | #include "aarch32-linux-nat.h" |
db3cb7cb | 33 | #include "nat/aarch64-linux.h" |
554717a3 | 34 | #include "nat/aarch64-linux-hw-point.h" |
607685ec YQ |
35 | |
36 | #include "elf/external.h" | |
9d19df75 MS |
37 | #include "elf/common.h" |
38 | ||
5826e159 | 39 | #include "nat/gdb_ptrace.h" |
9d19df75 | 40 | #include <sys/utsname.h> |
036cd381 | 41 | #include <asm/ptrace.h> |
9d19df75 MS |
42 | |
43 | #include "gregset.h" | |
44 | ||
9d19df75 MS |
45 | /* Defines ps_err_e, struct ps_prochandle. */ |
46 | #include "gdb_proc_service.h" | |
47 | ||
48 | #ifndef TRAP_HWBKPT | |
49 | #define TRAP_HWBKPT 0x0004 | |
50 | #endif | |
51 | ||
f6ac5f3d PA |
52 | class aarch64_linux_nat_target final : public linux_nat_target |
53 | { | |
54 | public: | |
55 | /* Add our register access methods. */ | |
56 | void fetch_registers (struct regcache *, int) override; | |
57 | void store_registers (struct regcache *, int) override; | |
58 | ||
59 | const struct target_desc *read_description () override; | |
60 | ||
61 | /* Add our hardware breakpoint and watchpoint implementation. */ | |
62 | int can_use_hw_breakpoint (enum bptype, int, int) override; | |
63 | int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; | |
64 | int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override; | |
65 | int region_ok_for_hw_watchpoint (CORE_ADDR, int) override; | |
66 | int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, | |
67 | struct expression *) override; | |
68 | int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type, | |
69 | struct expression *) override; | |
57810aa7 PA |
70 | bool stopped_by_watchpoint () override; |
71 | bool stopped_data_address (CORE_ADDR *) override; | |
72 | bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override; | |
f6ac5f3d PA |
73 | |
74 | int can_do_single_step () override; | |
75 | ||
76 | /* Override the GNU/Linux inferior startup hook. */ | |
77 | void post_startup_inferior (ptid_t) override; | |
78 | }; | |
79 | ||
80 | static aarch64_linux_nat_target the_aarch64_linux_nat_target; | |
81 | ||
d6c44983 YZ |
82 | /* Per-process data. We don't bind this to a per-inferior registry |
83 | because of targets like x86 GNU/Linux that need to keep track of | |
84 | processes that aren't bound to any inferior (e.g., fork children, | |
85 | checkpoints). */ | |
9d19df75 | 86 | |
d6c44983 | 87 | struct aarch64_process_info |
9d19df75 | 88 | { |
d6c44983 YZ |
89 | /* Linked list. */ |
90 | struct aarch64_process_info *next; | |
9d19df75 | 91 | |
d6c44983 YZ |
92 | /* The process identifier. */ |
93 | pid_t pid; | |
9d19df75 | 94 | |
d6c44983 YZ |
95 | /* Copy of aarch64 hardware debug registers. */ |
96 | struct aarch64_debug_reg_state state; | |
97 | }; | |
98 | ||
99 | static struct aarch64_process_info *aarch64_process_list = NULL; | |
100 | ||
101 | /* Find process data for process PID. */ | |
102 | ||
103 | static struct aarch64_process_info * | |
104 | aarch64_find_process_pid (pid_t pid) | |
105 | { | |
106 | struct aarch64_process_info *proc; | |
107 | ||
108 | for (proc = aarch64_process_list; proc; proc = proc->next) | |
109 | if (proc->pid == pid) | |
110 | return proc; | |
111 | ||
112 | return NULL; | |
9d19df75 MS |
113 | } |
114 | ||
d6c44983 YZ |
115 | /* Add process data for process PID. Returns newly allocated info |
116 | object. */ | |
9d19df75 | 117 | |
d6c44983 YZ |
118 | static struct aarch64_process_info * |
119 | aarch64_add_process (pid_t pid) | |
9d19df75 | 120 | { |
d6c44983 | 121 | struct aarch64_process_info *proc; |
9d19df75 | 122 | |
8d749320 | 123 | proc = XCNEW (struct aarch64_process_info); |
d6c44983 | 124 | proc->pid = pid; |
9d19df75 | 125 | |
d6c44983 YZ |
126 | proc->next = aarch64_process_list; |
127 | aarch64_process_list = proc; | |
128 | ||
129 | return proc; | |
130 | } | |
131 | ||
132 | /* Get data specific info for process PID, creating it if necessary. | |
133 | Never returns NULL. */ | |
134 | ||
135 | static struct aarch64_process_info * | |
136 | aarch64_process_info_get (pid_t pid) | |
9d19df75 | 137 | { |
d6c44983 YZ |
138 | struct aarch64_process_info *proc; |
139 | ||
140 | proc = aarch64_find_process_pid (pid); | |
141 | if (proc == NULL) | |
142 | proc = aarch64_add_process (pid); | |
9d19df75 | 143 | |
d6c44983 | 144 | return proc; |
9d19df75 MS |
145 | } |
146 | ||
d6c44983 YZ |
147 | /* Called whenever GDB is no longer debugging process PID. It deletes |
148 | data structures that keep track of debug register state. */ | |
9d19df75 | 149 | |
d6c44983 YZ |
150 | static void |
151 | aarch64_forget_process (pid_t pid) | |
9d19df75 | 152 | { |
d6c44983 | 153 | struct aarch64_process_info *proc, **proc_link; |
9d19df75 | 154 | |
d6c44983 YZ |
155 | proc = aarch64_process_list; |
156 | proc_link = &aarch64_process_list; | |
157 | ||
158 | while (proc != NULL) | |
9d19df75 | 159 | { |
d6c44983 YZ |
160 | if (proc->pid == pid) |
161 | { | |
162 | *proc_link = proc->next; | |
9d19df75 | 163 | |
d6c44983 YZ |
164 | xfree (proc); |
165 | return; | |
166 | } | |
167 | ||
168 | proc_link = &proc->next; | |
169 | proc = *proc_link; | |
170 | } | |
9d19df75 MS |
171 | } |
172 | ||
d6c44983 | 173 | /* Get debug registers state for process PID. */ |
9d19df75 | 174 | |
db3cb7cb | 175 | struct aarch64_debug_reg_state * |
d6c44983 | 176 | aarch64_get_debug_reg_state (pid_t pid) |
9d19df75 | 177 | { |
d6c44983 | 178 | return &aarch64_process_info_get (pid)->state; |
9d19df75 MS |
179 | } |
180 | ||
9d19df75 MS |
181 | /* Fill GDB's register array with the general-purpose register values |
182 | from the current thread. */ | |
183 | ||
184 | static void | |
185 | fetch_gregs_from_thread (struct regcache *regcache) | |
186 | { | |
607685ec | 187 | int ret, tid; |
ac7936df | 188 | struct gdbarch *gdbarch = regcache->arch (); |
9d19df75 MS |
189 | elf_gregset_t regs; |
190 | struct iovec iovec; | |
191 | ||
607685ec YQ |
192 | /* Make sure REGS can hold all registers contents on both aarch64 |
193 | and arm. */ | |
194 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
195 | ||
55119686 | 196 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
197 | |
198 | iovec.iov_base = ®s; | |
607685ec YQ |
199 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
200 | iovec.iov_len = 18 * 4; | |
201 | else | |
202 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
203 | |
204 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
205 | if (ret < 0) | |
206 | perror_with_name (_("Unable to fetch general registers.")); | |
207 | ||
607685ec YQ |
208 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
209 | aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1); | |
210 | else | |
211 | { | |
212 | int regno; | |
213 | ||
214 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
215 | regcache_raw_supply (regcache, regno, ®s[regno - AARCH64_X0_REGNUM]); | |
216 | } | |
9d19df75 MS |
217 | } |
218 | ||
219 | /* Store to the current thread the valid general-purpose register | |
220 | values in the GDB's register array. */ | |
221 | ||
222 | static void | |
223 | store_gregs_to_thread (const struct regcache *regcache) | |
224 | { | |
607685ec | 225 | int ret, tid; |
9d19df75 MS |
226 | elf_gregset_t regs; |
227 | struct iovec iovec; | |
ac7936df | 228 | struct gdbarch *gdbarch = regcache->arch (); |
9d19df75 | 229 | |
607685ec YQ |
230 | /* Make sure REGS can hold all registers contents on both aarch64 |
231 | and arm. */ | |
232 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
55119686 | 233 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
234 | |
235 | iovec.iov_base = ®s; | |
607685ec YQ |
236 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
237 | iovec.iov_len = 18 * 4; | |
238 | else | |
239 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
240 | |
241 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
242 | if (ret < 0) | |
243 | perror_with_name (_("Unable to fetch general registers.")); | |
244 | ||
607685ec YQ |
245 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
246 | aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1); | |
247 | else | |
248 | { | |
249 | int regno; | |
250 | ||
251 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
252 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
253 | regcache_raw_collect (regcache, regno, | |
254 | ®s[regno - AARCH64_X0_REGNUM]); | |
255 | } | |
9d19df75 MS |
256 | |
257 | ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec); | |
258 | if (ret < 0) | |
259 | perror_with_name (_("Unable to store general registers.")); | |
260 | } | |
261 | ||
262 | /* Fill GDB's register array with the fp/simd register values | |
263 | from the current thread. */ | |
264 | ||
265 | static void | |
266 | fetch_fpregs_from_thread (struct regcache *regcache) | |
267 | { | |
607685ec | 268 | int ret, tid; |
9d19df75 MS |
269 | elf_fpregset_t regs; |
270 | struct iovec iovec; | |
ac7936df | 271 | struct gdbarch *gdbarch = regcache->arch (); |
607685ec YQ |
272 | |
273 | /* Make sure REGS can hold all VFP registers contents on both aarch64 | |
274 | and arm. */ | |
275 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
9d19df75 | 276 | |
55119686 | 277 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
278 | |
279 | iovec.iov_base = ®s; | |
9d19df75 | 280 | |
607685ec YQ |
281 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
282 | { | |
283 | iovec.iov_len = VFP_REGS_SIZE; | |
284 | ||
285 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); | |
286 | if (ret < 0) | |
287 | perror_with_name (_("Unable to fetch VFP registers.")); | |
288 | ||
289 | aarch32_vfp_regcache_supply (regcache, (gdb_byte *) ®s, 32); | |
290 | } | |
291 | else | |
292 | { | |
293 | int regno; | |
294 | ||
295 | iovec.iov_len = sizeof (regs); | |
9d19df75 | 296 | |
607685ec YQ |
297 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); |
298 | if (ret < 0) | |
299 | perror_with_name (_("Unable to fetch vFP/SIMD registers.")); | |
9d19df75 | 300 | |
607685ec YQ |
301 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) |
302 | regcache_raw_supply (regcache, regno, | |
303 | ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
304 | ||
305 | regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, ®s.fpsr); | |
306 | regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, ®s.fpcr); | |
307 | } | |
9d19df75 MS |
308 | } |
309 | ||
310 | /* Store to the current thread the valid fp/simd register | |
311 | values in the GDB's register array. */ | |
312 | ||
313 | static void | |
314 | store_fpregs_to_thread (const struct regcache *regcache) | |
315 | { | |
607685ec | 316 | int ret, tid; |
9d19df75 MS |
317 | elf_fpregset_t regs; |
318 | struct iovec iovec; | |
ac7936df | 319 | struct gdbarch *gdbarch = regcache->arch (); |
9d19df75 | 320 | |
607685ec YQ |
321 | /* Make sure REGS can hold all VFP registers contents on both aarch64 |
322 | and arm. */ | |
323 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
55119686 | 324 | tid = ptid_get_lwp (regcache_get_ptid (regcache)); |
9d19df75 MS |
325 | |
326 | iovec.iov_base = ®s; | |
9d19df75 | 327 | |
607685ec YQ |
328 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
329 | { | |
330 | iovec.iov_len = VFP_REGS_SIZE; | |
9d19df75 | 331 | |
607685ec YQ |
332 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); |
333 | if (ret < 0) | |
334 | perror_with_name (_("Unable to fetch VFP registers.")); | |
9d19df75 | 335 | |
607685ec YQ |
336 | aarch32_vfp_regcache_collect (regcache, (gdb_byte *) ®s, 32); |
337 | } | |
338 | else | |
339 | { | |
340 | int regno; | |
9d19df75 | 341 | |
607685ec YQ |
342 | iovec.iov_len = sizeof (regs); |
343 | ||
344 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); | |
345 | if (ret < 0) | |
346 | perror_with_name (_("Unable to fetch FP/SIMD registers.")); | |
347 | ||
348 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) | |
349 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
350 | regcache_raw_collect (regcache, regno, | |
351 | (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
352 | ||
353 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM)) | |
354 | regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM, | |
355 | (char *) ®s.fpsr); | |
356 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM)) | |
357 | regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM, | |
358 | (char *) ®s.fpcr); | |
359 | } | |
360 | ||
361 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) | |
362 | { | |
363 | ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec); | |
364 | if (ret < 0) | |
365 | perror_with_name (_("Unable to store VFP registers.")); | |
366 | } | |
367 | else | |
368 | { | |
369 | ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec); | |
370 | if (ret < 0) | |
371 | perror_with_name (_("Unable to store FP/SIMD registers.")); | |
372 | } | |
9d19df75 MS |
373 | } |
374 | ||
f6ac5f3d | 375 | /* Implement the "fetch_registers" target_ops method. */ |
9d19df75 | 376 | |
f6ac5f3d PA |
377 | void |
378 | aarch64_linux_nat_target::fetch_registers (struct regcache *regcache, | |
379 | int regno) | |
9d19df75 MS |
380 | { |
381 | if (regno == -1) | |
382 | { | |
383 | fetch_gregs_from_thread (regcache); | |
384 | fetch_fpregs_from_thread (regcache); | |
385 | } | |
386 | else if (regno < AARCH64_V0_REGNUM) | |
387 | fetch_gregs_from_thread (regcache); | |
388 | else | |
389 | fetch_fpregs_from_thread (regcache); | |
390 | } | |
391 | ||
f6ac5f3d | 392 | /* Implement the "store_registers" target_ops method. */ |
9d19df75 | 393 | |
f6ac5f3d PA |
394 | void |
395 | aarch64_linux_nat_target::store_registers (struct regcache *regcache, | |
396 | int regno) | |
9d19df75 MS |
397 | { |
398 | if (regno == -1) | |
399 | { | |
400 | store_gregs_to_thread (regcache); | |
401 | store_fpregs_to_thread (regcache); | |
402 | } | |
403 | else if (regno < AARCH64_V0_REGNUM) | |
404 | store_gregs_to_thread (regcache); | |
405 | else | |
406 | store_fpregs_to_thread (regcache); | |
407 | } | |
408 | ||
409 | /* Fill register REGNO (if it is a general-purpose register) in | |
410 | *GREGSETPS with the value in GDB's register array. If REGNO is -1, | |
411 | do this for all registers. */ | |
412 | ||
413 | void | |
414 | fill_gregset (const struct regcache *regcache, | |
415 | gdb_gregset_t *gregsetp, int regno) | |
416 | { | |
d4d793bf AA |
417 | regcache_collect_regset (&aarch64_linux_gregset, regcache, |
418 | regno, (gdb_byte *) gregsetp, | |
419 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
420 | } |
421 | ||
422 | /* Fill GDB's register array with the general-purpose register values | |
423 | in *GREGSETP. */ | |
424 | ||
425 | void | |
426 | supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | |
427 | { | |
d4d793bf AA |
428 | regcache_supply_regset (&aarch64_linux_gregset, regcache, -1, |
429 | (const gdb_byte *) gregsetp, | |
430 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
431 | } |
432 | ||
433 | /* Fill register REGNO (if it is a floating-point register) in | |
434 | *FPREGSETP with the value in GDB's register array. If REGNO is -1, | |
435 | do this for all registers. */ | |
436 | ||
437 | void | |
438 | fill_fpregset (const struct regcache *regcache, | |
439 | gdb_fpregset_t *fpregsetp, int regno) | |
440 | { | |
d4d793bf AA |
441 | regcache_collect_regset (&aarch64_linux_fpregset, regcache, |
442 | regno, (gdb_byte *) fpregsetp, | |
443 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
444 | } |
445 | ||
446 | /* Fill GDB's register array with the floating-point register values | |
447 | in *FPREGSETP. */ | |
448 | ||
449 | void | |
450 | supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | |
451 | { | |
d4d793bf AA |
452 | regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1, |
453 | (const gdb_byte *) fpregsetp, | |
454 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
455 | } |
456 | ||
d6c44983 YZ |
457 | /* linux_nat_new_fork hook. */ |
458 | ||
459 | static void | |
460 | aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid) | |
461 | { | |
462 | pid_t parent_pid; | |
463 | struct aarch64_debug_reg_state *parent_state; | |
464 | struct aarch64_debug_reg_state *child_state; | |
465 | ||
466 | /* NULL means no watchpoint has ever been set in the parent. In | |
467 | that case, there's nothing to do. */ | |
468 | if (parent->arch_private == NULL) | |
469 | return; | |
470 | ||
471 | /* GDB core assumes the child inherits the watchpoints/hw | |
472 | breakpoints of the parent, and will remove them all from the | |
473 | forked off process. Copy the debug registers mirrors into the | |
474 | new process so that all breakpoints and watchpoints can be | |
475 | removed together. */ | |
476 | ||
477 | parent_pid = ptid_get_pid (parent->ptid); | |
478 | parent_state = aarch64_get_debug_reg_state (parent_pid); | |
479 | child_state = aarch64_get_debug_reg_state (child_pid); | |
480 | *child_state = *parent_state; | |
481 | } | |
9d19df75 MS |
482 | \f |
483 | ||
484 | /* Called by libthread_db. Returns a pointer to the thread local | |
485 | storage (or its descriptor). */ | |
486 | ||
487 | ps_err_e | |
754653a7 | 488 | ps_get_thread_area (struct ps_prochandle *ph, |
9d19df75 MS |
489 | lwpid_t lwpid, int idx, void **base) |
490 | { | |
a0cc84cd YQ |
491 | int is_64bit_p |
492 | = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64); | |
9d19df75 | 493 | |
a0cc84cd | 494 | return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p); |
9d19df75 MS |
495 | } |
496 | \f | |
497 | ||
f6ac5f3d | 498 | /* Implement the "post_startup_inferior" target_ops method. */ |
9d19df75 | 499 | |
f6ac5f3d PA |
500 | void |
501 | aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid) | |
9d19df75 | 502 | { |
d6c44983 | 503 | aarch64_forget_process (ptid_get_pid (ptid)); |
af1b22f3 | 504 | aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid)); |
f6ac5f3d | 505 | linux_nat_target::post_startup_inferior (ptid); |
9d19df75 MS |
506 | } |
507 | ||
607685ec YQ |
508 | extern struct target_desc *tdesc_arm_with_neon; |
509 | ||
f6ac5f3d | 510 | /* Implement the "read_description" target_ops method. */ |
9d19df75 | 511 | |
f6ac5f3d PA |
512 | const struct target_desc * |
513 | aarch64_linux_nat_target::read_description () | |
9d19df75 | 514 | { |
6f67973b YQ |
515 | int ret, tid; |
516 | gdb_byte regbuf[VFP_REGS_SIZE]; | |
517 | struct iovec iovec; | |
607685ec | 518 | |
6f67973b | 519 | tid = ptid_get_lwp (inferior_ptid); |
607685ec | 520 | |
6f67973b YQ |
521 | iovec.iov_base = regbuf; |
522 | iovec.iov_len = VFP_REGS_SIZE; | |
607685ec | 523 | |
6f67973b YQ |
524 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); |
525 | if (ret == 0) | |
526 | return tdesc_arm_with_neon; | |
527 | else | |
da434ccb | 528 | return aarch64_read_description (); |
9d19df75 MS |
529 | } |
530 | ||
ade90bde YQ |
531 | /* Convert a native/host siginfo object, into/from the siginfo in the |
532 | layout of the inferiors' architecture. Returns true if any | |
533 | conversion was done; false otherwise. If DIRECTION is 1, then copy | |
534 | from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to | |
535 | INF. */ | |
536 | ||
537 | static int | |
538 | aarch64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction) | |
539 | { | |
540 | struct gdbarch *gdbarch = get_frame_arch (get_current_frame ()); | |
541 | ||
542 | /* Is the inferior 32-bit? If so, then do fixup the siginfo | |
543 | object. */ | |
544 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) | |
545 | { | |
546 | if (direction == 0) | |
547 | aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf, | |
548 | native); | |
549 | else | |
550 | aarch64_siginfo_from_compat_siginfo (native, | |
551 | (struct compat_siginfo *) inf); | |
552 | ||
553 | return 1; | |
554 | } | |
555 | ||
556 | return 0; | |
557 | } | |
558 | ||
9d19df75 MS |
559 | /* Returns the number of hardware watchpoints of type TYPE that we can |
560 | set. Value is positive if we can set CNT watchpoints, zero if | |
561 | setting watchpoints of type TYPE is not supported, and negative if | |
562 | CNT is more than the maximum number of watchpoints of type TYPE | |
563 | that we can support. TYPE is one of bp_hardware_watchpoint, | |
564 | bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint. | |
565 | CNT is the number of such watchpoints used so far (including this | |
566 | one). OTHERTYPE is non-zero if other types of watchpoints are | |
c2fbdc59 | 567 | currently enabled. */ |
9d19df75 | 568 | |
f6ac5f3d PA |
569 | int |
570 | aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type, | |
571 | int cnt, int othertype) | |
9d19df75 | 572 | { |
c2fbdc59 YQ |
573 | if (type == bp_hardware_watchpoint || type == bp_read_watchpoint |
574 | || type == bp_access_watchpoint || type == bp_watchpoint) | |
575 | { | |
576 | if (aarch64_num_wp_regs == 0) | |
577 | return 0; | |
578 | } | |
579 | else if (type == bp_hardware_breakpoint) | |
580 | { | |
581 | if (aarch64_num_bp_regs == 0) | |
582 | return 0; | |
583 | } | |
584 | else | |
585 | gdb_assert_not_reached ("unexpected breakpoint type"); | |
586 | ||
587 | /* We always return 1 here because we don't have enough information | |
588 | about possible overlap of addresses that they want to watch. As an | |
589 | extreme example, consider the case where all the watchpoints watch | |
590 | the same address and the same region length: then we can handle a | |
591 | virtually unlimited number of watchpoints, due to debug register | |
592 | sharing implemented via reference counts. */ | |
9d19df75 MS |
593 | return 1; |
594 | } | |
595 | ||
0d5ed153 | 596 | /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address. |
9d19df75 MS |
597 | Return 0 on success, -1 on failure. */ |
598 | ||
f6ac5f3d PA |
599 | int |
600 | aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch, | |
601 | struct bp_target_info *bp_tgt) | |
9d19df75 MS |
602 | { |
603 | int ret; | |
0d5ed153 | 604 | CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; |
8d689ee5 | 605 | int len; |
2ecd81c2 | 606 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
607 | struct aarch64_debug_reg_state *state |
608 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 609 | |
8d689ee5 YQ |
610 | gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); |
611 | ||
c5e92cca | 612 | if (show_debug_regs) |
9d19df75 MS |
613 | fprintf_unfiltered |
614 | (gdb_stdlog, | |
615 | "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
616 | (unsigned long) addr, len); | |
617 | ||
c67ca4de | 618 | ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 619 | |
c5e92cca | 620 | if (show_debug_regs) |
d6c44983 | 621 | { |
d6c44983 | 622 | aarch64_show_debug_reg_state (state, |
2fd0f80d | 623 | "insert_hw_breakpoint", addr, len, type); |
d6c44983 | 624 | } |
9d19df75 MS |
625 | |
626 | return ret; | |
627 | } | |
628 | ||
629 | /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address. | |
630 | Return 0 on success, -1 on failure. */ | |
631 | ||
f6ac5f3d PA |
632 | int |
633 | aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch, | |
634 | struct bp_target_info *bp_tgt) | |
9d19df75 MS |
635 | { |
636 | int ret; | |
637 | CORE_ADDR addr = bp_tgt->placed_address; | |
8d689ee5 | 638 | int len = 4; |
2ecd81c2 | 639 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
640 | struct aarch64_debug_reg_state *state |
641 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 642 | |
8d689ee5 YQ |
643 | gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); |
644 | ||
c5e92cca | 645 | if (show_debug_regs) |
9d19df75 MS |
646 | fprintf_unfiltered |
647 | (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
648 | (unsigned long) addr, len); | |
649 | ||
c67ca4de | 650 | ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 651 | |
c5e92cca | 652 | if (show_debug_regs) |
d6c44983 | 653 | { |
d6c44983 YZ |
654 | aarch64_show_debug_reg_state (state, |
655 | "remove_hw_watchpoint", addr, len, type); | |
656 | } | |
9d19df75 MS |
657 | |
658 | return ret; | |
659 | } | |
660 | ||
f6ac5f3d | 661 | /* Implement the "insert_watchpoint" target_ops method. |
9d19df75 MS |
662 | |
663 | Insert a watchpoint to watch a memory region which starts at | |
664 | address ADDR and whose length is LEN bytes. Watch memory accesses | |
665 | of the type TYPE. Return 0 on success, -1 on failure. */ | |
666 | ||
f6ac5f3d PA |
667 | int |
668 | aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len, | |
669 | enum target_hw_bp_type type, | |
670 | struct expression *cond) | |
9d19df75 MS |
671 | { |
672 | int ret; | |
c67ca4de YQ |
673 | struct aarch64_debug_reg_state *state |
674 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 675 | |
c5e92cca | 676 | if (show_debug_regs) |
9d19df75 MS |
677 | fprintf_unfiltered (gdb_stdlog, |
678 | "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
679 | (unsigned long) addr, len); | |
680 | ||
681 | gdb_assert (type != hw_execute); | |
682 | ||
c67ca4de | 683 | ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 684 | |
c5e92cca | 685 | if (show_debug_regs) |
d6c44983 | 686 | { |
d6c44983 YZ |
687 | aarch64_show_debug_reg_state (state, |
688 | "insert_watchpoint", addr, len, type); | |
689 | } | |
9d19df75 MS |
690 | |
691 | return ret; | |
692 | } | |
693 | ||
f6ac5f3d | 694 | /* Implement the "remove_watchpoint" target_ops method. |
9d19df75 MS |
695 | Remove a watchpoint that watched the memory region which starts at |
696 | address ADDR, whose length is LEN bytes, and for accesses of the | |
697 | type TYPE. Return 0 on success, -1 on failure. */ | |
698 | ||
f6ac5f3d PA |
699 | int |
700 | aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len, | |
701 | enum target_hw_bp_type type, | |
702 | struct expression *cond) | |
9d19df75 MS |
703 | { |
704 | int ret; | |
c67ca4de YQ |
705 | struct aarch64_debug_reg_state *state |
706 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 707 | |
c5e92cca | 708 | if (show_debug_regs) |
9d19df75 MS |
709 | fprintf_unfiltered (gdb_stdlog, |
710 | "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
711 | (unsigned long) addr, len); | |
712 | ||
713 | gdb_assert (type != hw_execute); | |
714 | ||
c67ca4de | 715 | ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 716 | |
c5e92cca | 717 | if (show_debug_regs) |
d6c44983 | 718 | { |
d6c44983 YZ |
719 | aarch64_show_debug_reg_state (state, |
720 | "remove_watchpoint", addr, len, type); | |
721 | } | |
9d19df75 MS |
722 | |
723 | return ret; | |
724 | } | |
725 | ||
f6ac5f3d | 726 | /* Implement the "region_ok_for_hw_watchpoint" target_ops method. */ |
9d19df75 | 727 | |
f6ac5f3d PA |
728 | int |
729 | aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len) | |
9d19df75 | 730 | { |
39edd165 | 731 | return aarch64_linux_region_ok_for_watchpoint (addr, len); |
9d19df75 MS |
732 | } |
733 | ||
f6ac5f3d | 734 | /* Implement the "stopped_data_address" target_ops method. */ |
9d19df75 | 735 | |
57810aa7 | 736 | bool |
f6ac5f3d | 737 | aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p) |
9d19df75 MS |
738 | { |
739 | siginfo_t siginfo; | |
740 | int i, tid; | |
741 | struct aarch64_debug_reg_state *state; | |
742 | ||
743 | if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) | |
57810aa7 | 744 | return false; |
9d19df75 MS |
745 | |
746 | /* This must be a hardware breakpoint. */ | |
747 | if (siginfo.si_signo != SIGTRAP | |
748 | || (siginfo.si_code & 0xffff) != TRAP_HWBKPT) | |
57810aa7 | 749 | return false; |
9d19df75 MS |
750 | |
751 | /* Check if the address matches any watched address. */ | |
d6c44983 | 752 | state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); |
9d19df75 MS |
753 | for (i = aarch64_num_wp_regs - 1; i >= 0; --i) |
754 | { | |
755 | const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]); | |
756 | const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr; | |
757 | const CORE_ADDR addr_watch = state->dr_addr_wp[i]; | |
758 | ||
759 | if (state->dr_ref_count_wp[i] | |
760 | && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i]) | |
761 | && addr_trap >= addr_watch | |
762 | && addr_trap < addr_watch + len) | |
763 | { | |
764 | *addr_p = addr_trap; | |
57810aa7 | 765 | return true; |
9d19df75 MS |
766 | } |
767 | } | |
768 | ||
57810aa7 | 769 | return false; |
9d19df75 MS |
770 | } |
771 | ||
f6ac5f3d | 772 | /* Implement the "stopped_by_watchpoint" target_ops method. */ |
9d19df75 | 773 | |
57810aa7 | 774 | bool |
f6ac5f3d | 775 | aarch64_linux_nat_target::stopped_by_watchpoint () |
9d19df75 MS |
776 | { |
777 | CORE_ADDR addr; | |
778 | ||
f6ac5f3d | 779 | return stopped_data_address (&addr); |
9d19df75 MS |
780 | } |
781 | ||
f6ac5f3d | 782 | /* Implement the "watchpoint_addr_within_range" target_ops method. */ |
9d19df75 | 783 | |
57810aa7 | 784 | bool |
f6ac5f3d PA |
785 | aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr, |
786 | CORE_ADDR start, int length) | |
9d19df75 MS |
787 | { |
788 | return start <= addr && start + length - 1 >= addr; | |
789 | } | |
790 | ||
f6ac5f3d | 791 | /* Implement the "can_do_single_step" target_ops method. */ |
750ce8d1 | 792 | |
f6ac5f3d PA |
793 | int |
794 | aarch64_linux_nat_target::can_do_single_step () | |
750ce8d1 YQ |
795 | { |
796 | return 1; | |
797 | } | |
798 | ||
9d19df75 MS |
799 | /* Define AArch64 maintenance commands. */ |
800 | ||
801 | static void | |
802 | add_show_debug_regs_command (void) | |
803 | { | |
804 | /* A maintenance command to enable printing the internal DRi mirror | |
805 | variables. */ | |
806 | add_setshow_boolean_cmd ("show-debug-regs", class_maintenance, | |
c5e92cca | 807 | &show_debug_regs, _("\ |
9d19df75 MS |
808 | Set whether to show variables that mirror the AArch64 debug registers."), _("\ |
809 | Show whether to show variables that mirror the AArch64 debug registers."), _("\ | |
810 | Use \"on\" to enable, \"off\" to disable.\n\ | |
811 | If enabled, the debug registers values are shown when GDB inserts\n\ | |
812 | or removes a hardware breakpoint or watchpoint, and when the inferior\n\ | |
813 | triggers a breakpoint or watchpoint."), | |
814 | NULL, | |
815 | NULL, | |
816 | &maintenance_set_cmdlist, | |
817 | &maintenance_show_cmdlist); | |
818 | } | |
819 | ||
9d19df75 MS |
820 | void |
821 | _initialize_aarch64_linux_nat (void) | |
822 | { | |
f6ac5f3d | 823 | struct target_ops *t = &the_aarch64_linux_nat_target; |
9d19df75 MS |
824 | |
825 | add_show_debug_regs_command (); | |
826 | ||
9d19df75 | 827 | /* Register the target. */ |
f6ac5f3d PA |
828 | linux_target = &the_aarch64_linux_nat_target; |
829 | add_target (t); | |
9d19df75 | 830 | linux_nat_set_new_thread (t, aarch64_linux_new_thread); |
466eecee | 831 | linux_nat_set_delete_thread (t, aarch64_linux_delete_thread); |
d6c44983 YZ |
832 | linux_nat_set_new_fork (t, aarch64_linux_new_fork); |
833 | linux_nat_set_forget_process (t, aarch64_forget_process); | |
9d19df75 | 834 | linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume); |
ade90bde YQ |
835 | |
836 | /* Add our siginfo layout converter. */ | |
837 | linux_nat_set_siginfo_fixup (t, aarch64_linux_siginfo_fixup); | |
9d19df75 | 838 | } |