* gdb.base/sep.exp: No longer setup_kfail when the program was
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
baa490c4 27#include "dwarf2-frame.h"
c906108c
SS
28#include "inferior.h"
29#include "symtab.h"
30#include "value.h"
31#include "gdbcmd.h"
32#include "gdbcore.h"
33#include "dis-asm.h"
34#include "symfile.h"
35#include "objfiles.h"
36#include "gdb_string.h"
c5f0f3d0 37#include "linespec.h"
4e052eda 38#include "regcache.h"
615967cb 39#include "reggroups.h"
dc129d82 40#include "arch-utils.h"
4be87837 41#include "osabi.h"
fe898f56 42#include "block.h"
dc129d82
JT
43
44#include "elf-bfd.h"
45
46#include "alpha-tdep.h"
47
c906108c 48\f
fa88f677 49static const char *
636a6dfc
JT
50alpha_register_name (int regno)
51{
5ab84872 52 static const char * const register_names[] =
636a6dfc
JT
53 {
54 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
55 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
56 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
57 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
58 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
59 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
60 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
61 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 62 "pc", "", "unique"
636a6dfc
JT
63 };
64
65 if (regno < 0)
5ab84872 66 return NULL;
636a6dfc 67 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
68 return NULL;
69 return register_names[regno];
636a6dfc 70}
d734c450 71
dc129d82 72static int
d734c450
JT
73alpha_cannot_fetch_register (int regno)
74{
44d88583 75 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
76}
77
dc129d82 78static int
d734c450
JT
79alpha_cannot_store_register (int regno)
80{
44d88583 81 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
82}
83
dc129d82 84static struct type *
c483c494 85alpha_register_type (struct gdbarch *gdbarch, int regno)
0d056799 86{
72667056
RH
87 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
88 return builtin_type_void_data_ptr;
89 if (regno == ALPHA_PC_REGNUM)
90 return builtin_type_void_func_ptr;
91
92 /* Don't need to worry about little vs big endian until
93 some jerk tries to port to alpha-unicosmk. */
b38b6be2 94 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
72667056
RH
95 return builtin_type_ieee_double_little;
96
97 return builtin_type_int64;
0d056799 98}
f8453e34 99
615967cb
RH
100/* Is REGNUM a member of REGGROUP? */
101
102static int
103alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
104 struct reggroup *group)
105{
106 /* Filter out any registers eliminated, but whose regnum is
107 reserved for backward compatibility, e.g. the vfp. */
108 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
109 return 0;
110
df4a182b
RH
111 if (group == all_reggroup)
112 return 1;
113
114 /* Zero should not be saved or restored. Technically it is a general
115 register (just as $f31 would be a float if we represented it), but
116 there's no point displaying it during "info regs", so leave it out
117 of all groups except for "all". */
118 if (regnum == ALPHA_ZERO_REGNUM)
119 return 0;
120
121 /* All other registers are saved and restored. */
122 if (group == save_reggroup || group == restore_reggroup)
615967cb
RH
123 return 1;
124
125 /* All other groups are non-overlapping. */
126
127 /* Since this is really a PALcode memory slot... */
128 if (regnum == ALPHA_UNIQUE_REGNUM)
129 return group == system_reggroup;
130
131 /* Force the FPCR to be considered part of the floating point state. */
132 if (regnum == ALPHA_FPCR_REGNUM)
133 return group == float_reggroup;
134
135 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
136 return group == float_reggroup;
137 else
138 return group == general_reggroup;
139}
140
dc129d82 141static int
f8453e34
JT
142alpha_register_byte (int regno)
143{
144 return (regno * 8);
145}
146
dc129d82 147static int
f8453e34
JT
148alpha_register_raw_size (int regno)
149{
150 return 8;
151}
152
dc129d82 153static int
f8453e34
JT
154alpha_register_virtual_size (int regno)
155{
156 return 8;
157}
636a6dfc 158
c483c494
RH
159/* The following represents exactly the conversion performed by
160 the LDS instruction. This applies to both single-precision
161 floating point and 32-bit integers. */
162
163static void
164alpha_lds (void *out, const void *in)
165{
166 ULONGEST mem = extract_unsigned_integer (in, 4);
167 ULONGEST frac = (mem >> 0) & 0x7fffff;
168 ULONGEST sign = (mem >> 31) & 1;
169 ULONGEST exp_msb = (mem >> 30) & 1;
170 ULONGEST exp_low = (mem >> 23) & 0x7f;
171 ULONGEST exp, reg;
172
173 exp = (exp_msb << 10) | exp_low;
174 if (exp_msb)
175 {
176 if (exp_low == 0x7f)
177 exp = 0x7ff;
178 }
179 else
180 {
181 if (exp_low != 0x00)
182 exp |= 0x380;
183 }
184
185 reg = (sign << 63) | (exp << 52) | (frac << 29);
186 store_unsigned_integer (out, 8, reg);
187}
188
189/* Similarly, this represents exactly the conversion performed by
190 the STS instruction. */
191
39efb398 192static void
c483c494
RH
193alpha_sts (void *out, const void *in)
194{
195 ULONGEST reg, mem;
196
197 reg = extract_unsigned_integer (in, 8);
198 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
199 store_unsigned_integer (out, 4, mem);
200}
201
d2427a71
RH
202/* The alpha needs a conversion between register and memory format if the
203 register is a floating point register and memory format is float, as the
204 register format must be double or memory format is an integer with 4
205 bytes or less, as the representation of integers in floating point
206 registers is different. */
207
c483c494 208static int
ff2e87ac 209alpha_convert_register_p (int regno, struct type *type)
14696584 210{
c483c494 211 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31);
14696584
RH
212}
213
d2427a71 214static void
ff2e87ac
AC
215alpha_register_to_value (struct frame_info *frame, int regnum,
216 struct type *valtype, void *out)
5868c862 217{
ff2e87ac
AC
218 char in[MAX_REGISTER_SIZE];
219 frame_register_read (frame, regnum, in);
c483c494 220 switch (TYPE_LENGTH (valtype))
d2427a71 221 {
c483c494
RH
222 case 4:
223 alpha_sts (out, in);
224 break;
225 case 8:
226 memcpy (out, in, 8);
227 break;
228 default:
229 error ("Cannot retrieve value from floating point register");
d2427a71 230 }
d2427a71 231}
5868c862 232
d2427a71 233static void
ff2e87ac
AC
234alpha_value_to_register (struct frame_info *frame, int regnum,
235 struct type *valtype, const void *in)
d2427a71 236{
ff2e87ac 237 char out[MAX_REGISTER_SIZE];
c483c494 238 switch (TYPE_LENGTH (valtype))
d2427a71 239 {
c483c494
RH
240 case 4:
241 alpha_lds (out, in);
242 break;
243 case 8:
244 memcpy (out, in, 8);
245 break;
246 default:
247 error ("Cannot store value in floating point register");
d2427a71 248 }
ff2e87ac 249 put_frame_register (frame, regnum, out);
5868c862
JT
250}
251
d2427a71
RH
252\f
253/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
254 the stack. The register arguments are stored in ARG_REG_BUFFER, and
255 then moved into the register file; this simplifies the passing of a
256 large struct which extends from the registers to the stack, plus avoids
257 three ptrace invocations per word.
258
259 We don't bother tracking which register values should go in integer
260 regs or fp regs; we load the same values into both.
261
d2427a71
RH
262 If the called function is returning a structure, the address of the
263 structure to be returned is passed as a hidden first argument. */
c906108c 264
d2427a71 265static CORE_ADDR
c88e30c0
RH
266alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
267 struct regcache *regcache, CORE_ADDR bp_addr,
268 int nargs, struct value **args, CORE_ADDR sp,
269 int struct_return, CORE_ADDR struct_addr)
c906108c 270{
d2427a71
RH
271 int i;
272 int accumulate_size = struct_return ? 8 : 0;
d2427a71 273 struct alpha_arg
c906108c 274 {
d2427a71
RH
275 char *contents;
276 int len;
277 int offset;
278 };
c88e30c0
RH
279 struct alpha_arg *alpha_args
280 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
52f0bd74 281 struct alpha_arg *m_arg;
c88e30c0 282 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 283 int required_arg_regs;
c906108c 284
c88e30c0
RH
285 /* The ABI places the address of the called function in T12. */
286 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
287
288 /* Set the return address register to point to the entry point
289 of the program, where a breakpoint lies in wait. */
290 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
291
292 /* Lay out the arguments in memory. */
d2427a71
RH
293 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
294 {
295 struct value *arg = args[i];
296 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 297
d2427a71
RH
298 /* Cast argument to long if necessary as the compiler does it too. */
299 switch (TYPE_CODE (arg_type))
c906108c 300 {
d2427a71
RH
301 case TYPE_CODE_INT:
302 case TYPE_CODE_BOOL:
303 case TYPE_CODE_CHAR:
304 case TYPE_CODE_RANGE:
305 case TYPE_CODE_ENUM:
0ede8eca 306 if (TYPE_LENGTH (arg_type) == 4)
d2427a71 307 {
0ede8eca
RH
308 /* 32-bit values must be sign-extended to 64 bits
309 even if the base data type is unsigned. */
310 arg_type = builtin_type_int32;
311 arg = value_cast (arg_type, arg);
312 }
313 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
314 {
315 arg_type = builtin_type_int64;
d2427a71
RH
316 arg = value_cast (arg_type, arg);
317 }
318 break;
7b5e1cb3 319
c88e30c0
RH
320 case TYPE_CODE_FLT:
321 /* "float" arguments loaded in registers must be passed in
322 register format, aka "double". */
323 if (accumulate_size < sizeof (arg_reg_buffer)
324 && TYPE_LENGTH (arg_type) == 4)
325 {
eb4edb88 326 arg_type = builtin_type_ieee_double_little;
c88e30c0
RH
327 arg = value_cast (arg_type, arg);
328 }
329 /* Tru64 5.1 has a 128-bit long double, and passes this by
330 invisible reference. No one else uses this data type. */
331 else if (TYPE_LENGTH (arg_type) == 16)
332 {
333 /* Allocate aligned storage. */
334 sp = (sp & -16) - 16;
335
336 /* Write the real data into the stack. */
337 write_memory (sp, VALUE_CONTENTS (arg), 16);
338
339 /* Construct the indirection. */
340 arg_type = lookup_pointer_type (arg_type);
341 arg = value_from_pointer (arg_type, sp);
342 }
343 break;
7b5e1cb3
RH
344
345 case TYPE_CODE_COMPLEX:
346 /* ??? The ABI says that complex values are passed as two
347 separate scalar values. This distinction only matters
348 for complex float. However, GCC does not implement this. */
349
350 /* Tru64 5.1 has a 128-bit long double, and passes this by
351 invisible reference. */
352 if (TYPE_LENGTH (arg_type) == 32)
353 {
354 /* Allocate aligned storage. */
355 sp = (sp & -16) - 16;
356
357 /* Write the real data into the stack. */
358 write_memory (sp, VALUE_CONTENTS (arg), 32);
359
360 /* Construct the indirection. */
361 arg_type = lookup_pointer_type (arg_type);
362 arg = value_from_pointer (arg_type, sp);
363 }
364 break;
365
d2427a71
RH
366 default:
367 break;
c906108c 368 }
d2427a71
RH
369 m_arg->len = TYPE_LENGTH (arg_type);
370 m_arg->offset = accumulate_size;
371 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
372 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
373 }
374
d2427a71
RH
375 /* Determine required argument register loads, loading an argument register
376 is expensive as it uses three ptrace calls. */
377 required_arg_regs = accumulate_size / 8;
378 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
379 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 380
d2427a71 381 /* Make room for the arguments on the stack. */
c88e30c0
RH
382 if (accumulate_size < sizeof(arg_reg_buffer))
383 accumulate_size = 0;
384 else
385 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 386 sp -= accumulate_size;
c906108c 387
c88e30c0 388 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 389 sp &= ~15;
c906108c 390
d2427a71
RH
391 /* `Push' arguments on the stack. */
392 for (i = nargs; m_arg--, --i >= 0;)
c906108c 393 {
c88e30c0
RH
394 char *contents = m_arg->contents;
395 int offset = m_arg->offset;
396 int len = m_arg->len;
397
398 /* Copy the bytes destined for registers into arg_reg_buffer. */
399 if (offset < sizeof(arg_reg_buffer))
400 {
401 if (offset + len <= sizeof(arg_reg_buffer))
402 {
403 memcpy (arg_reg_buffer + offset, contents, len);
404 continue;
405 }
406 else
407 {
408 int tlen = sizeof(arg_reg_buffer) - offset;
409 memcpy (arg_reg_buffer + offset, contents, tlen);
410 offset += tlen;
411 contents += tlen;
412 len -= tlen;
413 }
414 }
415
416 /* Everything else goes to the stack. */
417 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 418 }
c88e30c0
RH
419 if (struct_return)
420 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 421
d2427a71
RH
422 /* Load the argument registers. */
423 for (i = 0; i < required_arg_regs; i++)
424 {
09cc52fd
RH
425 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
426 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
427 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
428 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 429 }
c906108c 430
09cc52fd
RH
431 /* Finally, update the stack pointer. */
432 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
433
c88e30c0 434 return sp;
c906108c
SS
435}
436
5ec2bb99
RH
437/* Extract from REGCACHE the value about to be returned from a function
438 and copy it into VALBUF. */
d2427a71 439
dc129d82 440static void
5ec2bb99
RH
441alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
442 void *valbuf)
140f9984 443{
7b5e1cb3 444 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
445 char raw_buffer[ALPHA_REGISTER_SIZE];
446 ULONGEST l;
447
448 switch (TYPE_CODE (valtype))
449 {
450 case TYPE_CODE_FLT:
7b5e1cb3 451 switch (length)
5ec2bb99
RH
452 {
453 case 4:
454 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
c483c494 455 alpha_sts (valbuf, raw_buffer);
5ec2bb99
RH
456 break;
457
458 case 8:
459 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
460 break;
461
24064b5c
RH
462 case 16:
463 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
464 read_memory (l, valbuf, 16);
465 break;
466
5ec2bb99 467 default:
67dfac52 468 internal_error (__FILE__, __LINE__, "unknown floating point width");
5ec2bb99
RH
469 }
470 break;
471
7b5e1cb3
RH
472 case TYPE_CODE_COMPLEX:
473 switch (length)
474 {
475 case 8:
476 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
477 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
478 break;
479
480 case 16:
481 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
482 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1,
483 (char *)valbuf + 8);
484 break;
485
486 case 32:
487 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
488 read_memory (l, valbuf, 32);
489 break;
490
491 default:
67dfac52 492 internal_error (__FILE__, __LINE__, "unknown floating point width");
7b5e1cb3
RH
493 }
494 break;
495
5ec2bb99
RH
496 default:
497 /* Assume everything else degenerates to an integer. */
498 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
7b5e1cb3 499 store_unsigned_integer (valbuf, length, l);
5ec2bb99
RH
500 break;
501 }
140f9984
JT
502}
503
5ec2bb99
RH
504/* Extract from REGCACHE the address of a structure about to be returned
505 from a function. */
506
507static CORE_ADDR
508alpha_extract_struct_value_address (struct regcache *regcache)
509{
510 ULONGEST addr;
511 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
512 return addr;
513}
514
515/* Insert the given value into REGCACHE as if it was being
516 returned by a function. */
0d056799 517
d2427a71 518static void
5ec2bb99
RH
519alpha_store_return_value (struct type *valtype, struct regcache *regcache,
520 const void *valbuf)
c906108c 521{
d2427a71 522 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
523 char raw_buffer[ALPHA_REGISTER_SIZE];
524 ULONGEST l;
d2427a71 525
5ec2bb99 526 switch (TYPE_CODE (valtype))
c906108c 527 {
5ec2bb99
RH
528 case TYPE_CODE_FLT:
529 switch (length)
530 {
531 case 4:
c483c494 532 alpha_lds (raw_buffer, valbuf);
f75d70cc
RH
533 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
534 break;
5ec2bb99
RH
535
536 case 8:
537 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
538 break;
539
24064b5c
RH
540 case 16:
541 /* FIXME: 128-bit long doubles are returned like structures:
542 by writing into indirect storage provided by the caller
543 as the first argument. */
544 error ("Cannot set a 128-bit long double return value.");
545
5ec2bb99 546 default:
67dfac52 547 internal_error (__FILE__, __LINE__, "unknown floating point width");
5ec2bb99
RH
548 }
549 break;
d2427a71 550
7b5e1cb3
RH
551 case TYPE_CODE_COMPLEX:
552 switch (length)
553 {
554 case 8:
555 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
556 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
557 break;
558
559 case 16:
560 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
561 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1,
562 (const char *)valbuf + 8);
563 break;
564
565 case 32:
566 /* FIXME: 128-bit long doubles are returned like structures:
567 by writing into indirect storage provided by the caller
568 as the first argument. */
569 error ("Cannot set a 128-bit long double return value.");
570
571 default:
67dfac52 572 internal_error (__FILE__, __LINE__, "unknown floating point width");
7b5e1cb3
RH
573 }
574 break;
575
5ec2bb99
RH
576 default:
577 /* Assume everything else degenerates to an integer. */
0ede8eca
RH
578 /* 32-bit values must be sign-extended to 64 bits
579 even if the base data type is unsigned. */
580 if (length == 4)
581 valtype = builtin_type_int32;
5ec2bb99
RH
582 l = unpack_long (valtype, valbuf);
583 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
584 break;
585 }
c906108c
SS
586}
587
d2427a71
RH
588\f
589static const unsigned char *
590alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 591{
d2427a71
RH
592 static const unsigned char alpha_breakpoint[] =
593 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 594
d2427a71
RH
595 *lenptr = sizeof(alpha_breakpoint);
596 return (alpha_breakpoint);
597}
c906108c 598
d2427a71
RH
599\f
600/* This returns the PC of the first insn after the prologue.
601 If we can't find the prologue, then return 0. */
c906108c 602
d2427a71
RH
603CORE_ADDR
604alpha_after_prologue (CORE_ADDR pc)
c906108c 605{
d2427a71
RH
606 struct symtab_and_line sal;
607 CORE_ADDR func_addr, func_end;
c906108c 608
d2427a71 609 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 610 return 0;
c906108c 611
d2427a71
RH
612 sal = find_pc_line (func_addr, 0);
613 if (sal.end < func_end)
614 return sal.end;
c5aa993b 615
d2427a71
RH
616 /* The line after the prologue is after the end of the function. In this
617 case, tell the caller to find the prologue the hard way. */
618 return 0;
c906108c
SS
619}
620
d2427a71
RH
621/* Read an instruction from memory at PC, looking through breakpoints. */
622
623unsigned int
624alpha_read_insn (CORE_ADDR pc)
c906108c 625{
d2427a71
RH
626 char buf[4];
627 int status;
c5aa993b 628
d2427a71
RH
629 status = read_memory_nobpt (pc, buf, 4);
630 if (status)
631 memory_error (status, pc);
632 return extract_unsigned_integer (buf, 4);
633}
c5aa993b 634
d2427a71
RH
635/* To skip prologues, I use this predicate. Returns either PC itself
636 if the code at PC does not look like a function prologue; otherwise
637 returns an address that (if we're lucky) follows the prologue. If
638 LENIENT, then we must skip everything which is involved in setting
639 up the frame (it's OK to skip more, just so long as we don't skip
640 anything which might clobber the registers which are being saved. */
c906108c 641
d2427a71
RH
642static CORE_ADDR
643alpha_skip_prologue (CORE_ADDR pc)
644{
645 unsigned long inst;
646 int offset;
647 CORE_ADDR post_prologue_pc;
648 char buf[4];
c906108c 649
d2427a71
RH
650 /* Silently return the unaltered pc upon memory errors.
651 This could happen on OSF/1 if decode_line_1 tries to skip the
652 prologue for quickstarted shared library functions when the
653 shared library is not yet mapped in.
654 Reading target memory is slow over serial lines, so we perform
655 this check only if the target has shared libraries (which all
656 Alpha targets do). */
657 if (target_read_memory (pc, buf, 4))
658 return pc;
c906108c 659
d2427a71
RH
660 /* See if we can determine the end of the prologue via the symbol table.
661 If so, then return either PC, or the PC after the prologue, whichever
662 is greater. */
c906108c 663
d2427a71
RH
664 post_prologue_pc = alpha_after_prologue (pc);
665 if (post_prologue_pc != 0)
666 return max (pc, post_prologue_pc);
c906108c 667
d2427a71
RH
668 /* Can't determine prologue from the symbol table, need to examine
669 instructions. */
dc1b0db2 670
d2427a71
RH
671 /* Skip the typical prologue instructions. These are the stack adjustment
672 instruction and the instructions that save registers on the stack
673 or in the gcc frame. */
674 for (offset = 0; offset < 100; offset += 4)
675 {
676 inst = alpha_read_insn (pc + offset);
c906108c 677
d2427a71
RH
678 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
679 continue;
680 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
681 continue;
682 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
683 continue;
684 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
685 continue;
c906108c 686
d2427a71
RH
687 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
688 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
689 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
690 continue;
c906108c 691
d2427a71
RH
692 if (inst == 0x47de040f) /* bis sp,sp,fp */
693 continue;
694 if (inst == 0x47fe040f) /* bis zero,sp,fp */
695 continue;
c906108c 696
d2427a71 697 break;
c906108c 698 }
d2427a71
RH
699 return pc + offset;
700}
c906108c 701
d2427a71
RH
702\f
703/* Figure out where the longjmp will land.
704 We expect the first arg to be a pointer to the jmp_buf structure from
705 which we extract the PC (JB_PC) that we will land at. The PC is copied
706 into the "pc". This routine returns true on success. */
c906108c
SS
707
708static int
d2427a71 709alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 710{
d2427a71
RH
711 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
712 CORE_ADDR jb_addr;
5ab84872 713 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 714
d2427a71 715 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 716
d2427a71
RH
717 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
718 raw_buffer, tdep->jb_elt_size))
c906108c 719 return 0;
d2427a71 720
7c0b4a20 721 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 722 return 1;
c906108c
SS
723}
724
d2427a71
RH
725\f
726/* Frame unwinder for signal trampolines. We use alpha tdep bits that
727 describe the location and shape of the sigcontext structure. After
728 that, all registers are in memory, so it's easy. */
729/* ??? Shouldn't we be able to do this generically, rather than with
730 OSABI data specific to Alpha? */
731
732struct alpha_sigtramp_unwind_cache
c906108c 733{
d2427a71
RH
734 CORE_ADDR sigcontext_addr;
735};
c906108c 736
d2427a71
RH
737static struct alpha_sigtramp_unwind_cache *
738alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
739 void **this_prologue_cache)
740{
741 struct alpha_sigtramp_unwind_cache *info;
742 struct gdbarch_tdep *tdep;
c906108c 743
d2427a71
RH
744 if (*this_prologue_cache)
745 return *this_prologue_cache;
c906108c 746
d2427a71
RH
747 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
748 *this_prologue_cache = info;
c906108c 749
d2427a71
RH
750 tdep = gdbarch_tdep (current_gdbarch);
751 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 752
d2427a71 753 return info;
c906108c
SS
754}
755
138e7be5
MK
756/* Return the address of REGNUM in a sigtramp frame. Since this is
757 all arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 758
d2427a71 759static CORE_ADDR
138e7be5 760alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum)
d2427a71 761{
138e7be5
MK
762 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
763
764 if (regnum >= 0 && regnum < 32)
765 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
766 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
767 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
768 else if (regnum == ALPHA_PC_REGNUM)
769 return sigcontext_addr + tdep->sc_pc_offset;
c5aa993b 770
d2427a71 771 return 0;
c906108c
SS
772}
773
d2427a71
RH
774/* Given a GDB frame, determine the address of the calling function's
775 frame. This will be used to create a new GDB frame struct. */
140f9984 776
dc129d82 777static void
d2427a71
RH
778alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
779 void **this_prologue_cache,
780 struct frame_id *this_id)
c906108c 781{
d2427a71
RH
782 struct alpha_sigtramp_unwind_cache *info
783 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
784 struct gdbarch_tdep *tdep;
785 CORE_ADDR stack_addr, code_addr;
786
787 /* If the OSABI couldn't locate the sigcontext, give up. */
788 if (info->sigcontext_addr == 0)
789 return;
790
791 /* If we have dynamic signal trampolines, find their start.
792 If we do not, then we must assume there is a symbol record
793 that can provide the start address. */
794 tdep = gdbarch_tdep (current_gdbarch);
795 if (tdep->dynamic_sigtramp_offset)
c906108c 796 {
d2427a71
RH
797 int offset;
798 code_addr = frame_pc_unwind (next_frame);
799 offset = tdep->dynamic_sigtramp_offset (code_addr);
800 if (offset >= 0)
801 code_addr -= offset;
c906108c 802 else
d2427a71 803 code_addr = 0;
c906108c 804 }
d2427a71
RH
805 else
806 code_addr = frame_func_unwind (next_frame);
c906108c 807
d2427a71
RH
808 /* The stack address is trivially read from the sigcontext. */
809 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
810 ALPHA_SP_REGNUM);
b21fd293
RH
811 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
812 ALPHA_REGISTER_SIZE);
c906108c 813
d2427a71 814 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
815}
816
d2427a71 817/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 818
d2427a71
RH
819static void
820alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
821 void **this_prologue_cache,
822 int regnum, int *optimizedp,
823 enum lval_type *lvalp, CORE_ADDR *addrp,
824 int *realnump, void *bufferp)
c906108c 825{
d2427a71
RH
826 struct alpha_sigtramp_unwind_cache *info
827 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
828 CORE_ADDR addr;
c906108c 829
d2427a71 830 if (info->sigcontext_addr != 0)
c906108c 831 {
d2427a71
RH
832 /* All integer and fp registers are stored in memory. */
833 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
834 if (addr != 0)
c906108c 835 {
d2427a71
RH
836 *optimizedp = 0;
837 *lvalp = lval_memory;
838 *addrp = addr;
839 *realnump = -1;
840 if (bufferp != NULL)
b21fd293 841 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
d2427a71 842 return;
c906108c 843 }
c906108c
SS
844 }
845
d2427a71
RH
846 /* This extra register may actually be in the sigcontext, but our
847 current description of it in alpha_sigtramp_frame_unwind_cache
848 doesn't include it. Too bad. Fall back on whatever's in the
849 outer frame. */
850 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
851 realnump, bufferp);
852}
c906108c 853
d2427a71
RH
854static const struct frame_unwind alpha_sigtramp_frame_unwind = {
855 SIGTRAMP_FRAME,
856 alpha_sigtramp_frame_this_id,
857 alpha_sigtramp_frame_prev_register
858};
c906108c 859
d2427a71 860static const struct frame_unwind *
336d1bba 861alpha_sigtramp_frame_sniffer (struct frame_info *next_frame)
d2427a71 862{
336d1bba 863 CORE_ADDR pc = frame_pc_unwind (next_frame);
d2427a71 864 char *name;
c906108c 865
f2524b93
AC
866 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
867 look at tramp-frame.h and other simplier per-architecture
868 sigtramp unwinders. */
869
870 /* We shouldn't even bother to try if the OSABI didn't register a
871 sigcontext_addr handler or pc_in_sigtramp hander. */
872 if (gdbarch_tdep (current_gdbarch)->sigcontext_addr == NULL)
873 return NULL;
874 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp == NULL)
d2427a71 875 return NULL;
c906108c 876
d2427a71
RH
877 /* Otherwise we should be in a signal frame. */
878 find_pc_partial_function (pc, &name, NULL, NULL);
f2524b93 879 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp (pc, name))
d2427a71 880 return &alpha_sigtramp_frame_unwind;
c906108c 881
d2427a71 882 return NULL;
c906108c 883}
d2427a71
RH
884\f
885/* Fallback alpha frame unwinder. Uses instruction scanning and knows
886 something about the traditional layout of alpha stack frames. */
c906108c 887
d2427a71 888struct alpha_heuristic_unwind_cache
c906108c 889{
d2427a71
RH
890 CORE_ADDR *saved_regs;
891 CORE_ADDR vfp;
892 CORE_ADDR start_pc;
893 int return_reg;
894};
c906108c 895
d2427a71
RH
896/* Heuristic_proc_start may hunt through the text section for a long
897 time across a 2400 baud serial line. Allows the user to limit this
898 search. */
899static unsigned int heuristic_fence_post = 0;
c906108c 900
d2427a71
RH
901/* Attempt to locate the start of the function containing PC. We assume that
902 the previous function ends with an about_to_return insn. Not foolproof by
903 any means, since gcc is happy to put the epilogue in the middle of a
904 function. But we're guessing anyway... */
c906108c 905
d2427a71
RH
906static CORE_ADDR
907alpha_heuristic_proc_start (CORE_ADDR pc)
908{
909 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
910 CORE_ADDR last_non_nop = pc;
911 CORE_ADDR fence = pc - heuristic_fence_post;
912 CORE_ADDR orig_pc = pc;
fbe586ae 913 CORE_ADDR func;
9e0b60a8 914
d2427a71
RH
915 if (pc == 0)
916 return 0;
9e0b60a8 917
fbe586ae
RH
918 /* First see if we can find the start of the function from minimal
919 symbol information. This can succeed with a binary that doesn't
920 have debug info, but hasn't been stripped. */
921 func = get_pc_function_start (pc);
922 if (func)
923 return func;
924
d2427a71
RH
925 if (heuristic_fence_post == UINT_MAX
926 || fence < tdep->vm_min_address)
927 fence = tdep->vm_min_address;
c906108c 928
d2427a71
RH
929 /* Search back for previous return; also stop at a 0, which might be
930 seen for instance before the start of a code section. Don't include
931 nops, since this usually indicates padding between functions. */
932 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 933 {
d2427a71
RH
934 unsigned int insn = alpha_read_insn (pc);
935 switch (insn)
c906108c 936 {
d2427a71
RH
937 case 0: /* invalid insn */
938 case 0x6bfa8001: /* ret $31,($26),1 */
939 return last_non_nop;
940
941 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
942 case 0x47ff041f: /* nop: bis $31,$31,$31 */
943 break;
944
945 default:
946 last_non_nop = pc;
947 break;
c906108c 948 }
d2427a71 949 }
c906108c 950
d2427a71
RH
951 /* It's not clear to me why we reach this point when stopping quietly,
952 but with this test, at least we don't print out warnings for every
953 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
954 if (stop_soon == NO_STOP_QUIETLY)
955 {
956 static int blurb_printed = 0;
c906108c 957
d2427a71
RH
958 if (fence == tdep->vm_min_address)
959 warning ("Hit beginning of text section without finding");
c906108c 960 else
d2427a71
RH
961 warning ("Hit heuristic-fence-post without finding");
962 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 963
d2427a71
RH
964 if (!blurb_printed)
965 {
966 printf_filtered ("\
967This warning occurs if you are debugging a function without any symbols\n\
968(for example, in a stripped executable). In that case, you may wish to\n\
969increase the size of the search with the `set heuristic-fence-post' command.\n\
970\n\
971Otherwise, you told GDB there was a function where there isn't one, or\n\
972(more likely) you have encountered a bug in GDB.\n");
973 blurb_printed = 1;
974 }
975 }
c906108c 976
d2427a71
RH
977 return 0;
978}
c906108c 979
fbe586ae 980static struct alpha_heuristic_unwind_cache *
d2427a71
RH
981alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
982 void **this_prologue_cache,
983 CORE_ADDR start_pc)
984{
985 struct alpha_heuristic_unwind_cache *info;
986 ULONGEST val;
987 CORE_ADDR limit_pc, cur_pc;
988 int frame_reg, frame_size, return_reg, reg;
c906108c 989
d2427a71
RH
990 if (*this_prologue_cache)
991 return *this_prologue_cache;
c906108c 992
d2427a71
RH
993 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
994 *this_prologue_cache = info;
995 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 996
d2427a71
RH
997 limit_pc = frame_pc_unwind (next_frame);
998 if (start_pc == 0)
999 start_pc = alpha_heuristic_proc_start (limit_pc);
1000 info->start_pc = start_pc;
c906108c 1001
d2427a71
RH
1002 frame_reg = ALPHA_SP_REGNUM;
1003 frame_size = 0;
1004 return_reg = -1;
c906108c 1005
d2427a71
RH
1006 /* If we've identified a likely place to start, do code scanning. */
1007 if (start_pc != 0)
c5aa993b 1008 {
d2427a71
RH
1009 /* Limit the forward search to 50 instructions. */
1010 if (start_pc + 200 < limit_pc)
1011 limit_pc = start_pc + 200;
c5aa993b 1012
d2427a71
RH
1013 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
1014 {
1015 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1016
d2427a71
RH
1017 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1018 {
1019 if (word & 0x8000)
1020 {
1021 /* Consider only the first stack allocation instruction
1022 to contain the static size of the frame. */
1023 if (frame_size == 0)
1024 frame_size = (-word) & 0xffff;
1025 }
1026 else
1027 {
1028 /* Exit loop if a positive stack adjustment is found, which
1029 usually means that the stack cleanup code in the function
1030 epilogue is reached. */
1031 break;
1032 }
1033 }
1034 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1035 {
1036 reg = (word & 0x03e00000) >> 21;
1037
d15bfd3a
AC
1038 /* Ignore this instruction if we have already encountered
1039 an instruction saving the same register earlier in the
1040 function code. The current instruction does not tell
1041 us where the original value upon function entry is saved.
1042 All it says is that the function we are scanning reused
1043 that register for some computation of its own, and is now
1044 saving its result. */
1045 if (info->saved_regs[reg])
1046 continue;
1047
d2427a71
RH
1048 if (reg == 31)
1049 continue;
1050
1051 /* Do not compute the address where the register was saved yet,
1052 because we don't know yet if the offset will need to be
1053 relative to $sp or $fp (we can not compute the address
1054 relative to $sp if $sp is updated during the execution of
1055 the current subroutine, for instance when doing some alloca).
1056 So just store the offset for the moment, and compute the
1057 address later when we know whether this frame has a frame
1058 pointer or not. */
1059 /* Hack: temporarily add one, so that the offset is non-zero
1060 and we can tell which registers have save offsets below. */
1061 info->saved_regs[reg] = (word & 0xffff) + 1;
1062
1063 /* Starting with OSF/1-3.2C, the system libraries are shipped
1064 without local symbols, but they still contain procedure
1065 descriptors without a symbol reference. GDB is currently
1066 unable to find these procedure descriptors and uses
1067 heuristic_proc_desc instead.
1068 As some low level compiler support routines (__div*, __add*)
1069 use a non-standard return address register, we have to
1070 add some heuristics to determine the return address register,
1071 or stepping over these routines will fail.
1072 Usually the return address register is the first register
1073 saved on the stack, but assembler optimization might
1074 rearrange the register saves.
1075 So we recognize only a few registers (t7, t9, ra) within
1076 the procedure prologue as valid return address registers.
1077 If we encounter a return instruction, we extract the
1078 the return address register from it.
1079
1080 FIXME: Rewriting GDB to access the procedure descriptors,
1081 e.g. via the minimal symbol table, might obviate this hack. */
1082 if (return_reg == -1
1083 && cur_pc < (start_pc + 80)
1084 && (reg == ALPHA_T7_REGNUM
1085 || reg == ALPHA_T9_REGNUM
1086 || reg == ALPHA_RA_REGNUM))
1087 return_reg = reg;
1088 }
1089 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1090 return_reg = (word >> 16) & 0x1f;
1091 else if (word == 0x47de040f) /* bis sp,sp,fp */
1092 frame_reg = ALPHA_GCC_FP_REGNUM;
1093 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1094 frame_reg = ALPHA_GCC_FP_REGNUM;
1095 }
c5aa993b 1096
d2427a71
RH
1097 /* If we haven't found a valid return address register yet, keep
1098 searching in the procedure prologue. */
1099 if (return_reg == -1)
1100 {
1101 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1102 {
1103 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1104
d2427a71
RH
1105 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1106 {
1107 reg = (word & 0x03e00000) >> 21;
1108 if (reg == ALPHA_T7_REGNUM
1109 || reg == ALPHA_T9_REGNUM
1110 || reg == ALPHA_RA_REGNUM)
1111 {
1112 return_reg = reg;
1113 break;
1114 }
1115 }
1116 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1117 {
1118 return_reg = (word >> 16) & 0x1f;
1119 break;
1120 }
85b32d22
RH
1121
1122 cur_pc += 4;
d2427a71
RH
1123 }
1124 }
c906108c 1125 }
c906108c 1126
d2427a71
RH
1127 /* Failing that, do default to the customary RA. */
1128 if (return_reg == -1)
1129 return_reg = ALPHA_RA_REGNUM;
1130 info->return_reg = return_reg;
f8453e34 1131
d2427a71
RH
1132 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1133 info->vfp = val + frame_size;
c906108c 1134
d2427a71
RH
1135 /* Convert offsets to absolute addresses. See above about adding
1136 one to the offsets to make all detected offsets non-zero. */
1137 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1138 if (info->saved_regs[reg])
1139 info->saved_regs[reg] += val - 1;
1140
1141 return info;
c906108c 1142}
c906108c 1143
d2427a71
RH
1144/* Given a GDB frame, determine the address of the calling function's
1145 frame. This will be used to create a new GDB frame struct. */
1146
fbe586ae 1147static void
d2427a71
RH
1148alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1149 void **this_prologue_cache,
1150 struct frame_id *this_id)
c906108c 1151{
d2427a71
RH
1152 struct alpha_heuristic_unwind_cache *info
1153 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1154
d2427a71 1155 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1156}
1157
d2427a71
RH
1158/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1159
fbe586ae 1160static void
d2427a71
RH
1161alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1162 void **this_prologue_cache,
1163 int regnum, int *optimizedp,
1164 enum lval_type *lvalp, CORE_ADDR *addrp,
1165 int *realnump, void *bufferp)
c906108c 1166{
d2427a71
RH
1167 struct alpha_heuristic_unwind_cache *info
1168 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1169
1170 /* The PC of the previous frame is stored in the link register of
1171 the current frame. Frob regnum so that we pull the value from
1172 the correct place. */
1173 if (regnum == ALPHA_PC_REGNUM)
1174 regnum = info->return_reg;
1175
1176 /* For all registers known to be saved in the current frame,
1177 do the obvious and pull the value out. */
1178 if (info->saved_regs[regnum])
c906108c 1179 {
d2427a71
RH
1180 *optimizedp = 0;
1181 *lvalp = lval_memory;
1182 *addrp = info->saved_regs[regnum];
1183 *realnump = -1;
1184 if (bufferp != NULL)
b21fd293 1185 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1186 return;
1187 }
1188
d2427a71
RH
1189 /* The stack pointer of the previous frame is computed by popping
1190 the current stack frame. */
1191 if (regnum == ALPHA_SP_REGNUM)
c906108c 1192 {
d2427a71
RH
1193 *optimizedp = 0;
1194 *lvalp = not_lval;
1195 *addrp = 0;
1196 *realnump = -1;
1197 if (bufferp != NULL)
1198 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1199 return;
c906108c 1200 }
95b80706 1201
d2427a71
RH
1202 /* Otherwise assume the next frame has the same register value. */
1203 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1204 realnump, bufferp);
95b80706
JT
1205}
1206
d2427a71
RH
1207static const struct frame_unwind alpha_heuristic_frame_unwind = {
1208 NORMAL_FRAME,
1209 alpha_heuristic_frame_this_id,
1210 alpha_heuristic_frame_prev_register
1211};
c906108c 1212
d2427a71 1213static const struct frame_unwind *
336d1bba 1214alpha_heuristic_frame_sniffer (struct frame_info *next_frame)
c906108c 1215{
d2427a71 1216 return &alpha_heuristic_frame_unwind;
c906108c
SS
1217}
1218
fbe586ae 1219static CORE_ADDR
d2427a71
RH
1220alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1221 void **this_prologue_cache)
c906108c 1222{
d2427a71
RH
1223 struct alpha_heuristic_unwind_cache *info
1224 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1225
d2427a71 1226 return info->vfp;
c906108c
SS
1227}
1228
d2427a71
RH
1229static const struct frame_base alpha_heuristic_frame_base = {
1230 &alpha_heuristic_frame_unwind,
1231 alpha_heuristic_frame_base_address,
1232 alpha_heuristic_frame_base_address,
1233 alpha_heuristic_frame_base_address
1234};
1235
c906108c 1236/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1237 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1238
1239static void
fba45db2 1240reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1241{
1242 reinit_frame_cache ();
1243}
1244
d2427a71
RH
1245\f
1246/* ALPHA stack frames are almost impenetrable. When execution stops,
1247 we basically have to look at symbol information for the function
1248 that we stopped in, which tells us *which* register (if any) is
1249 the base of the frame pointer, and what offset from that register
1250 the frame itself is at.
c906108c 1251
d2427a71
RH
1252 This presents a problem when trying to examine a stack in memory
1253 (that isn't executing at the moment), using the "frame" command. We
1254 don't have a PC, nor do we have any registers except SP.
c906108c 1255
d2427a71
RH
1256 This routine takes two arguments, SP and PC, and tries to make the
1257 cached frames look as if these two arguments defined a frame on the
1258 cache. This allows the rest of info frame to extract the important
1259 arguments without difficulty. */
ec32e4be 1260
d2427a71
RH
1261struct frame_info *
1262alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1263{
d2427a71
RH
1264 if (argc != 2)
1265 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1266
d2427a71 1267 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1268}
1269
d2427a71
RH
1270/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1271 dummy frame. The frame ID's base needs to match the TOS value
1272 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1273 breakpoint. */
d734c450 1274
d2427a71
RH
1275static struct frame_id
1276alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1277{
d2427a71
RH
1278 ULONGEST base;
1279 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1280 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1281}
1282
dc129d82 1283static CORE_ADDR
d2427a71 1284alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1285{
d2427a71
RH
1286 ULONGEST pc;
1287 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1288 return pc;
accc6d1f
JT
1289}
1290
98a8e1e5
RH
1291\f
1292/* Helper routines for alpha*-nat.c files to move register sets to and
1293 from core files. The UNIQUE pointer is allowed to be NULL, as most
1294 targets don't supply this value in their core files. */
1295
1296void
1297alpha_supply_int_regs (int regno, const void *r0_r30,
1298 const void *pc, const void *unique)
1299{
1300 int i;
1301
1302 for (i = 0; i < 31; ++i)
1303 if (regno == i || regno == -1)
1304 supply_register (i, (const char *)r0_r30 + i*8);
1305
1306 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1307 supply_register (ALPHA_ZERO_REGNUM, NULL);
1308
1309 if (regno == ALPHA_PC_REGNUM || regno == -1)
1310 supply_register (ALPHA_PC_REGNUM, pc);
1311
1312 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1313 supply_register (ALPHA_UNIQUE_REGNUM, unique);
1314}
1315
1316void
1317alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique)
1318{
1319 int i;
1320
1321 for (i = 0; i < 31; ++i)
1322 if (regno == i || regno == -1)
1323 regcache_collect (i, (char *)r0_r30 + i*8);
1324
1325 if (regno == ALPHA_PC_REGNUM || regno == -1)
1326 regcache_collect (ALPHA_PC_REGNUM, pc);
1327
1328 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1329 regcache_collect (ALPHA_UNIQUE_REGNUM, unique);
1330}
1331
1332void
1333alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr)
1334{
1335 int i;
1336
1337 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1338 if (regno == i || regno == -1)
1339 supply_register (i, (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
1340
1341 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1342 supply_register (ALPHA_FPCR_REGNUM, fpcr);
1343}
1344
1345void
1346alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr)
1347{
1348 int i;
1349
1350 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1351 if (regno == i || regno == -1)
1352 regcache_collect (i, (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8);
1353
1354 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1355 regcache_collect (ALPHA_FPCR_REGNUM, fpcr);
1356}
1357
d2427a71 1358\f
ec32e4be
JT
1359/* alpha_software_single_step() is called just before we want to resume
1360 the inferior, if we want to single-step it but there is no hardware
1361 or kernel single-step support (NetBSD on Alpha, for example). We find
1362 the target of the coming instruction and breakpoint it.
1363
1364 single_step is also called just after the inferior stops. If we had
1365 set up a simulated single-step, we undo our damage. */
1366
1367static CORE_ADDR
1368alpha_next_pc (CORE_ADDR pc)
1369{
1370 unsigned int insn;
1371 unsigned int op;
1372 int offset;
1373 LONGEST rav;
1374
b21fd293 1375 insn = alpha_read_insn (pc);
ec32e4be
JT
1376
1377 /* Opcode is top 6 bits. */
1378 op = (insn >> 26) & 0x3f;
1379
1380 if (op == 0x1a)
1381 {
1382 /* Jump format: target PC is:
1383 RB & ~3 */
1384 return (read_register ((insn >> 16) & 0x1f) & ~3);
1385 }
1386
1387 if ((op & 0x30) == 0x30)
1388 {
1389 /* Branch format: target PC is:
1390 (new PC) + (4 * sext(displacement)) */
1391 if (op == 0x30 || /* BR */
1392 op == 0x34) /* BSR */
1393 {
1394 branch_taken:
1395 offset = (insn & 0x001fffff);
1396 if (offset & 0x00100000)
1397 offset |= 0xffe00000;
1398 offset *= 4;
1399 return (pc + 4 + offset);
1400 }
1401
1402 /* Need to determine if branch is taken; read RA. */
1403 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1404 switch (op)
1405 {
1406 case 0x38: /* BLBC */
1407 if ((rav & 1) == 0)
1408 goto branch_taken;
1409 break;
1410 case 0x3c: /* BLBS */
1411 if (rav & 1)
1412 goto branch_taken;
1413 break;
1414 case 0x39: /* BEQ */
1415 if (rav == 0)
1416 goto branch_taken;
1417 break;
1418 case 0x3d: /* BNE */
1419 if (rav != 0)
1420 goto branch_taken;
1421 break;
1422 case 0x3a: /* BLT */
1423 if (rav < 0)
1424 goto branch_taken;
1425 break;
1426 case 0x3b: /* BLE */
1427 if (rav <= 0)
1428 goto branch_taken;
1429 break;
1430 case 0x3f: /* BGT */
1431 if (rav > 0)
1432 goto branch_taken;
1433 break;
1434 case 0x3e: /* BGE */
1435 if (rav >= 0)
1436 goto branch_taken;
1437 break;
d2427a71
RH
1438
1439 /* ??? Missing floating-point branches. */
ec32e4be
JT
1440 }
1441 }
1442
1443 /* Not a branch or branch not taken; target PC is:
1444 pc + 4 */
1445 return (pc + 4);
1446}
1447
1448void
1449alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1450{
1451 static CORE_ADDR next_pc;
1452 typedef char binsn_quantum[BREAKPOINT_MAX];
1453 static binsn_quantum break_mem;
1454 CORE_ADDR pc;
1455
1456 if (insert_breakpoints_p)
1457 {
1458 pc = read_pc ();
1459 next_pc = alpha_next_pc (pc);
1460
1461 target_insert_breakpoint (next_pc, break_mem);
1462 }
1463 else
1464 {
1465 target_remove_breakpoint (next_pc, break_mem);
1466 write_pc (next_pc);
1467 }
c906108c
SS
1468}
1469
dc129d82 1470\f
dc129d82
JT
1471/* Initialize the current architecture based on INFO. If possible, re-use an
1472 architecture from ARCHES, which is a list of architectures already created
1473 during this debugging session.
1474
1475 Called e.g. at program startup, when reading a core file, and when reading
1476 a binary file. */
1477
1478static struct gdbarch *
1479alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1480{
1481 struct gdbarch_tdep *tdep;
1482 struct gdbarch *gdbarch;
dc129d82
JT
1483
1484 /* Try to determine the ABI of the object we are loading. */
4be87837 1485 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1486 {
4be87837
DJ
1487 /* If it's an ECOFF file, assume it's OSF/1. */
1488 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1489 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1490 }
1491
1492 /* Find a candidate among extant architectures. */
4be87837
DJ
1493 arches = gdbarch_list_lookup_by_info (arches, &info);
1494 if (arches != NULL)
1495 return arches->gdbarch;
dc129d82
JT
1496
1497 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1498 gdbarch = gdbarch_alloc (&info, tdep);
1499
d2427a71
RH
1500 /* Lowest text address. This is used by heuristic_proc_start()
1501 to decide when to stop looking. */
d9b023cc
JT
1502 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1503
36a6271d 1504 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1505 tdep->sigcontext_addr = NULL;
138e7be5
MK
1506 tdep->sc_pc_offset = 2 * 8;
1507 tdep->sc_regs_offset = 4 * 8;
1508 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
36a6271d 1509
accc6d1f
JT
1510 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1511
dc129d82
JT
1512 /* Type sizes */
1513 set_gdbarch_short_bit (gdbarch, 16);
1514 set_gdbarch_int_bit (gdbarch, 32);
1515 set_gdbarch_long_bit (gdbarch, 64);
1516 set_gdbarch_long_long_bit (gdbarch, 64);
1517 set_gdbarch_float_bit (gdbarch, 32);
1518 set_gdbarch_double_bit (gdbarch, 64);
1519 set_gdbarch_long_double_bit (gdbarch, 64);
1520 set_gdbarch_ptr_bit (gdbarch, 64);
1521
1522 /* Register info */
1523 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1524 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1525 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1526 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1527
1528 set_gdbarch_register_name (gdbarch, alpha_register_name);
9c04cab7
AC
1529 set_gdbarch_deprecated_register_byte (gdbarch, alpha_register_byte);
1530 set_gdbarch_deprecated_register_raw_size (gdbarch, alpha_register_raw_size);
1531 set_gdbarch_deprecated_register_virtual_size (gdbarch, alpha_register_virtual_size);
c483c494 1532 set_gdbarch_register_type (gdbarch, alpha_register_type);
dc129d82
JT
1533
1534 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1535 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1536
c483c494
RH
1537 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p);
1538 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value);
1539 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register);
dc129d82 1540
615967cb
RH
1541 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1542
d2427a71 1543 /* Prologue heuristics. */
dc129d82
JT
1544 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1545
5ef165c2
RH
1546 /* Disassembler. */
1547 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1548
d2427a71 1549 /* Call info. */
dc129d82 1550
1fd35568 1551 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
5ec2bb99
RH
1552 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value);
1553 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value);
74055713 1554 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, alpha_extract_struct_value_address);
dc129d82
JT
1555
1556 /* Settings for calling functions in the inferior. */
c88e30c0 1557 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1558
1559 /* Methods for saving / extracting a dummy frame's ID. */
1560 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
d2427a71
RH
1561
1562 /* Return the unwound PC value. */
1563 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1564
1565 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1566 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1567
95b80706 1568 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1569 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706 1570
44dffaac 1571 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1572 gdbarch_init_osabi (info, gdbarch);
44dffaac 1573
accc6d1f
JT
1574 /* Now that we have tuned the configuration, set a few final things
1575 based on what the OS ABI has told us. */
1576
1577 if (tdep->jb_pc >= 0)
1578 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1579
336d1bba
AC
1580 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer);
1581 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer);
dc129d82 1582
d2427a71 1583 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1584
d2427a71 1585 return gdbarch;
dc129d82
JT
1586}
1587
baa490c4
RH
1588void
1589alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1590{
336d1bba
AC
1591 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1592 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
baa490c4
RH
1593}
1594
a78f21af
AC
1595extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1596
c906108c 1597void
fba45db2 1598_initialize_alpha_tdep (void)
c906108c
SS
1599{
1600 struct cmd_list_element *c;
1601
d2427a71 1602 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1603
1604 /* Let the user set the fence post for heuristic_proc_start. */
1605
1606 /* We really would like to have both "0" and "unlimited" work, but
1607 command.c doesn't deal with that. So make it a var_zinteger
1608 because the user can always use "999999" or some such for unlimited. */
1609 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1610 (char *) &heuristic_fence_post,
1611 "\
1612Set the distance searched for the start of a function.\n\
1613If you are debugging a stripped executable, GDB needs to search through the\n\
1614program for the start of a function. This command sets the distance of the\n\
1615search. The only need to set it is when debugging a stripped executable.",
1616 &setlist);
1617 /* We need to throw away the frame cache when we set this, since it
1618 might change our ability to get backtraces. */
9f60d481 1619 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1620 add_show_from_set (c, &showlist);
1621}
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