Commit | Line | Data |
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c906108c | 1 | /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. |
1e698235 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
b6ba6518 | 3 | Free Software Foundation, Inc. |
c906108c | 4 | |
c5aa993b | 5 | This file is part of GDB. |
c906108c | 6 | |
c5aa993b JM |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
c906108c | 11 | |
c5aa993b JM |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
c906108c | 16 | |
c5aa993b JM |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
21 | |
22 | #include "defs.h" | |
615967cb | 23 | #include "doublest.h" |
c906108c | 24 | #include "frame.h" |
d2427a71 RH |
25 | #include "frame-unwind.h" |
26 | #include "frame-base.h" | |
baa490c4 | 27 | #include "dwarf2-frame.h" |
c906108c SS |
28 | #include "inferior.h" |
29 | #include "symtab.h" | |
30 | #include "value.h" | |
31 | #include "gdbcmd.h" | |
32 | #include "gdbcore.h" | |
33 | #include "dis-asm.h" | |
34 | #include "symfile.h" | |
35 | #include "objfiles.h" | |
36 | #include "gdb_string.h" | |
c5f0f3d0 | 37 | #include "linespec.h" |
4e052eda | 38 | #include "regcache.h" |
615967cb | 39 | #include "reggroups.h" |
dc129d82 | 40 | #include "arch-utils.h" |
4be87837 | 41 | #include "osabi.h" |
fe898f56 | 42 | #include "block.h" |
7d9b040b | 43 | #include "infcall.h" |
dc129d82 JT |
44 | |
45 | #include "elf-bfd.h" | |
46 | ||
47 | #include "alpha-tdep.h" | |
48 | ||
c906108c | 49 | \f |
fa88f677 | 50 | static const char * |
636a6dfc JT |
51 | alpha_register_name (int regno) |
52 | { | |
5ab84872 | 53 | static const char * const register_names[] = |
636a6dfc JT |
54 | { |
55 | "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", | |
56 | "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", | |
57 | "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", | |
58 | "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", | |
59 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
60 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
61 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
62 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", | |
44d88583 | 63 | "pc", "", "unique" |
636a6dfc JT |
64 | }; |
65 | ||
66 | if (regno < 0) | |
5ab84872 | 67 | return NULL; |
636a6dfc | 68 | if (regno >= (sizeof(register_names) / sizeof(*register_names))) |
5ab84872 RH |
69 | return NULL; |
70 | return register_names[regno]; | |
636a6dfc | 71 | } |
d734c450 | 72 | |
dc129d82 | 73 | static int |
d734c450 JT |
74 | alpha_cannot_fetch_register (int regno) |
75 | { | |
44d88583 | 76 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
77 | } |
78 | ||
dc129d82 | 79 | static int |
d734c450 JT |
80 | alpha_cannot_store_register (int regno) |
81 | { | |
44d88583 | 82 | return regno == ALPHA_ZERO_REGNUM; |
d734c450 JT |
83 | } |
84 | ||
dc129d82 | 85 | static struct type * |
c483c494 | 86 | alpha_register_type (struct gdbarch *gdbarch, int regno) |
0d056799 | 87 | { |
72667056 RH |
88 | if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) |
89 | return builtin_type_void_data_ptr; | |
90 | if (regno == ALPHA_PC_REGNUM) | |
91 | return builtin_type_void_func_ptr; | |
92 | ||
93 | /* Don't need to worry about little vs big endian until | |
94 | some jerk tries to port to alpha-unicosmk. */ | |
b38b6be2 | 95 | if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) |
72667056 RH |
96 | return builtin_type_ieee_double_little; |
97 | ||
98 | return builtin_type_int64; | |
0d056799 | 99 | } |
f8453e34 | 100 | |
615967cb RH |
101 | /* Is REGNUM a member of REGGROUP? */ |
102 | ||
103 | static int | |
104 | alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, | |
105 | struct reggroup *group) | |
106 | { | |
107 | /* Filter out any registers eliminated, but whose regnum is | |
108 | reserved for backward compatibility, e.g. the vfp. */ | |
109 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') | |
110 | return 0; | |
111 | ||
df4a182b RH |
112 | if (group == all_reggroup) |
113 | return 1; | |
114 | ||
115 | /* Zero should not be saved or restored. Technically it is a general | |
116 | register (just as $f31 would be a float if we represented it), but | |
117 | there's no point displaying it during "info regs", so leave it out | |
118 | of all groups except for "all". */ | |
119 | if (regnum == ALPHA_ZERO_REGNUM) | |
120 | return 0; | |
121 | ||
122 | /* All other registers are saved and restored. */ | |
123 | if (group == save_reggroup || group == restore_reggroup) | |
615967cb RH |
124 | return 1; |
125 | ||
126 | /* All other groups are non-overlapping. */ | |
127 | ||
128 | /* Since this is really a PALcode memory slot... */ | |
129 | if (regnum == ALPHA_UNIQUE_REGNUM) | |
130 | return group == system_reggroup; | |
131 | ||
132 | /* Force the FPCR to be considered part of the floating point state. */ | |
133 | if (regnum == ALPHA_FPCR_REGNUM) | |
134 | return group == float_reggroup; | |
135 | ||
136 | if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) | |
137 | return group == float_reggroup; | |
138 | else | |
139 | return group == general_reggroup; | |
140 | } | |
141 | ||
dc129d82 | 142 | static int |
f8453e34 JT |
143 | alpha_register_byte (int regno) |
144 | { | |
145 | return (regno * 8); | |
146 | } | |
147 | ||
c483c494 RH |
148 | /* The following represents exactly the conversion performed by |
149 | the LDS instruction. This applies to both single-precision | |
150 | floating point and 32-bit integers. */ | |
151 | ||
152 | static void | |
153 | alpha_lds (void *out, const void *in) | |
154 | { | |
155 | ULONGEST mem = extract_unsigned_integer (in, 4); | |
156 | ULONGEST frac = (mem >> 0) & 0x7fffff; | |
157 | ULONGEST sign = (mem >> 31) & 1; | |
158 | ULONGEST exp_msb = (mem >> 30) & 1; | |
159 | ULONGEST exp_low = (mem >> 23) & 0x7f; | |
160 | ULONGEST exp, reg; | |
161 | ||
162 | exp = (exp_msb << 10) | exp_low; | |
163 | if (exp_msb) | |
164 | { | |
165 | if (exp_low == 0x7f) | |
166 | exp = 0x7ff; | |
167 | } | |
168 | else | |
169 | { | |
170 | if (exp_low != 0x00) | |
171 | exp |= 0x380; | |
172 | } | |
173 | ||
174 | reg = (sign << 63) | (exp << 52) | (frac << 29); | |
175 | store_unsigned_integer (out, 8, reg); | |
176 | } | |
177 | ||
178 | /* Similarly, this represents exactly the conversion performed by | |
179 | the STS instruction. */ | |
180 | ||
39efb398 | 181 | static void |
c483c494 RH |
182 | alpha_sts (void *out, const void *in) |
183 | { | |
184 | ULONGEST reg, mem; | |
185 | ||
186 | reg = extract_unsigned_integer (in, 8); | |
187 | mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); | |
188 | store_unsigned_integer (out, 4, mem); | |
189 | } | |
190 | ||
d2427a71 RH |
191 | /* The alpha needs a conversion between register and memory format if the |
192 | register is a floating point register and memory format is float, as the | |
193 | register format must be double or memory format is an integer with 4 | |
194 | bytes or less, as the representation of integers in floating point | |
195 | registers is different. */ | |
196 | ||
c483c494 | 197 | static int |
ff2e87ac | 198 | alpha_convert_register_p (int regno, struct type *type) |
14696584 | 199 | { |
c483c494 | 200 | return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31); |
14696584 RH |
201 | } |
202 | ||
d2427a71 | 203 | static void |
ff2e87ac AC |
204 | alpha_register_to_value (struct frame_info *frame, int regnum, |
205 | struct type *valtype, void *out) | |
5868c862 | 206 | { |
ff2e87ac AC |
207 | char in[MAX_REGISTER_SIZE]; |
208 | frame_register_read (frame, regnum, in); | |
c483c494 | 209 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 210 | { |
c483c494 RH |
211 | case 4: |
212 | alpha_sts (out, in); | |
213 | break; | |
214 | case 8: | |
215 | memcpy (out, in, 8); | |
216 | break; | |
217 | default: | |
218 | error ("Cannot retrieve value from floating point register"); | |
d2427a71 | 219 | } |
d2427a71 | 220 | } |
5868c862 | 221 | |
d2427a71 | 222 | static void |
ff2e87ac AC |
223 | alpha_value_to_register (struct frame_info *frame, int regnum, |
224 | struct type *valtype, const void *in) | |
d2427a71 | 225 | { |
ff2e87ac | 226 | char out[MAX_REGISTER_SIZE]; |
c483c494 | 227 | switch (TYPE_LENGTH (valtype)) |
d2427a71 | 228 | { |
c483c494 RH |
229 | case 4: |
230 | alpha_lds (out, in); | |
231 | break; | |
232 | case 8: | |
233 | memcpy (out, in, 8); | |
234 | break; | |
235 | default: | |
236 | error ("Cannot store value in floating point register"); | |
d2427a71 | 237 | } |
ff2e87ac | 238 | put_frame_register (frame, regnum, out); |
5868c862 JT |
239 | } |
240 | ||
d2427a71 RH |
241 | \f |
242 | /* The alpha passes the first six arguments in the registers, the rest on | |
c88e30c0 RH |
243 | the stack. The register arguments are stored in ARG_REG_BUFFER, and |
244 | then moved into the register file; this simplifies the passing of a | |
245 | large struct which extends from the registers to the stack, plus avoids | |
246 | three ptrace invocations per word. | |
247 | ||
248 | We don't bother tracking which register values should go in integer | |
249 | regs or fp regs; we load the same values into both. | |
250 | ||
d2427a71 RH |
251 | If the called function is returning a structure, the address of the |
252 | structure to be returned is passed as a hidden first argument. */ | |
c906108c | 253 | |
d2427a71 | 254 | static CORE_ADDR |
7d9b040b | 255 | alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
c88e30c0 RH |
256 | struct regcache *regcache, CORE_ADDR bp_addr, |
257 | int nargs, struct value **args, CORE_ADDR sp, | |
258 | int struct_return, CORE_ADDR struct_addr) | |
c906108c | 259 | { |
d2427a71 RH |
260 | int i; |
261 | int accumulate_size = struct_return ? 8 : 0; | |
d2427a71 | 262 | struct alpha_arg |
c906108c | 263 | { |
d2427a71 RH |
264 | char *contents; |
265 | int len; | |
266 | int offset; | |
267 | }; | |
c88e30c0 RH |
268 | struct alpha_arg *alpha_args |
269 | = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); | |
52f0bd74 | 270 | struct alpha_arg *m_arg; |
c88e30c0 | 271 | char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; |
d2427a71 | 272 | int required_arg_regs; |
7d9b040b | 273 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
c906108c | 274 | |
c88e30c0 RH |
275 | /* The ABI places the address of the called function in T12. */ |
276 | regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); | |
277 | ||
278 | /* Set the return address register to point to the entry point | |
279 | of the program, where a breakpoint lies in wait. */ | |
280 | regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); | |
281 | ||
282 | /* Lay out the arguments in memory. */ | |
d2427a71 RH |
283 | for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) |
284 | { | |
285 | struct value *arg = args[i]; | |
286 | struct type *arg_type = check_typedef (VALUE_TYPE (arg)); | |
c88e30c0 | 287 | |
d2427a71 RH |
288 | /* Cast argument to long if necessary as the compiler does it too. */ |
289 | switch (TYPE_CODE (arg_type)) | |
c906108c | 290 | { |
d2427a71 RH |
291 | case TYPE_CODE_INT: |
292 | case TYPE_CODE_BOOL: | |
293 | case TYPE_CODE_CHAR: | |
294 | case TYPE_CODE_RANGE: | |
295 | case TYPE_CODE_ENUM: | |
0ede8eca | 296 | if (TYPE_LENGTH (arg_type) == 4) |
d2427a71 | 297 | { |
0ede8eca RH |
298 | /* 32-bit values must be sign-extended to 64 bits |
299 | even if the base data type is unsigned. */ | |
300 | arg_type = builtin_type_int32; | |
301 | arg = value_cast (arg_type, arg); | |
302 | } | |
303 | if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) | |
304 | { | |
305 | arg_type = builtin_type_int64; | |
d2427a71 RH |
306 | arg = value_cast (arg_type, arg); |
307 | } | |
308 | break; | |
7b5e1cb3 | 309 | |
c88e30c0 RH |
310 | case TYPE_CODE_FLT: |
311 | /* "float" arguments loaded in registers must be passed in | |
312 | register format, aka "double". */ | |
313 | if (accumulate_size < sizeof (arg_reg_buffer) | |
314 | && TYPE_LENGTH (arg_type) == 4) | |
315 | { | |
eb4edb88 | 316 | arg_type = builtin_type_ieee_double_little; |
c88e30c0 RH |
317 | arg = value_cast (arg_type, arg); |
318 | } | |
319 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
320 | invisible reference. No one else uses this data type. */ | |
321 | else if (TYPE_LENGTH (arg_type) == 16) | |
322 | { | |
323 | /* Allocate aligned storage. */ | |
324 | sp = (sp & -16) - 16; | |
325 | ||
326 | /* Write the real data into the stack. */ | |
327 | write_memory (sp, VALUE_CONTENTS (arg), 16); | |
328 | ||
329 | /* Construct the indirection. */ | |
330 | arg_type = lookup_pointer_type (arg_type); | |
331 | arg = value_from_pointer (arg_type, sp); | |
332 | } | |
333 | break; | |
7b5e1cb3 RH |
334 | |
335 | case TYPE_CODE_COMPLEX: | |
336 | /* ??? The ABI says that complex values are passed as two | |
337 | separate scalar values. This distinction only matters | |
338 | for complex float. However, GCC does not implement this. */ | |
339 | ||
340 | /* Tru64 5.1 has a 128-bit long double, and passes this by | |
341 | invisible reference. */ | |
342 | if (TYPE_LENGTH (arg_type) == 32) | |
343 | { | |
344 | /* Allocate aligned storage. */ | |
345 | sp = (sp & -16) - 16; | |
346 | ||
347 | /* Write the real data into the stack. */ | |
348 | write_memory (sp, VALUE_CONTENTS (arg), 32); | |
349 | ||
350 | /* Construct the indirection. */ | |
351 | arg_type = lookup_pointer_type (arg_type); | |
352 | arg = value_from_pointer (arg_type, sp); | |
353 | } | |
354 | break; | |
355 | ||
d2427a71 RH |
356 | default: |
357 | break; | |
c906108c | 358 | } |
d2427a71 RH |
359 | m_arg->len = TYPE_LENGTH (arg_type); |
360 | m_arg->offset = accumulate_size; | |
361 | accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; | |
362 | m_arg->contents = VALUE_CONTENTS (arg); | |
c906108c SS |
363 | } |
364 | ||
d2427a71 RH |
365 | /* Determine required argument register loads, loading an argument register |
366 | is expensive as it uses three ptrace calls. */ | |
367 | required_arg_regs = accumulate_size / 8; | |
368 | if (required_arg_regs > ALPHA_NUM_ARG_REGS) | |
369 | required_arg_regs = ALPHA_NUM_ARG_REGS; | |
c906108c | 370 | |
d2427a71 | 371 | /* Make room for the arguments on the stack. */ |
c88e30c0 RH |
372 | if (accumulate_size < sizeof(arg_reg_buffer)) |
373 | accumulate_size = 0; | |
374 | else | |
375 | accumulate_size -= sizeof(arg_reg_buffer); | |
d2427a71 | 376 | sp -= accumulate_size; |
c906108c | 377 | |
c88e30c0 | 378 | /* Keep sp aligned to a multiple of 16 as the ABI requires. */ |
d2427a71 | 379 | sp &= ~15; |
c906108c | 380 | |
d2427a71 RH |
381 | /* `Push' arguments on the stack. */ |
382 | for (i = nargs; m_arg--, --i >= 0;) | |
c906108c | 383 | { |
c88e30c0 RH |
384 | char *contents = m_arg->contents; |
385 | int offset = m_arg->offset; | |
386 | int len = m_arg->len; | |
387 | ||
388 | /* Copy the bytes destined for registers into arg_reg_buffer. */ | |
389 | if (offset < sizeof(arg_reg_buffer)) | |
390 | { | |
391 | if (offset + len <= sizeof(arg_reg_buffer)) | |
392 | { | |
393 | memcpy (arg_reg_buffer + offset, contents, len); | |
394 | continue; | |
395 | } | |
396 | else | |
397 | { | |
398 | int tlen = sizeof(arg_reg_buffer) - offset; | |
399 | memcpy (arg_reg_buffer + offset, contents, tlen); | |
400 | offset += tlen; | |
401 | contents += tlen; | |
402 | len -= tlen; | |
403 | } | |
404 | } | |
405 | ||
406 | /* Everything else goes to the stack. */ | |
407 | write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); | |
c906108c | 408 | } |
c88e30c0 RH |
409 | if (struct_return) |
410 | store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr); | |
c906108c | 411 | |
d2427a71 RH |
412 | /* Load the argument registers. */ |
413 | for (i = 0; i < required_arg_regs; i++) | |
414 | { | |
09cc52fd RH |
415 | regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, |
416 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
417 | regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, | |
418 | arg_reg_buffer + i*ALPHA_REGISTER_SIZE); | |
d2427a71 | 419 | } |
c906108c | 420 | |
09cc52fd RH |
421 | /* Finally, update the stack pointer. */ |
422 | regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); | |
423 | ||
c88e30c0 | 424 | return sp; |
c906108c SS |
425 | } |
426 | ||
5ec2bb99 RH |
427 | /* Extract from REGCACHE the value about to be returned from a function |
428 | and copy it into VALBUF. */ | |
d2427a71 | 429 | |
dc129d82 | 430 | static void |
5ec2bb99 RH |
431 | alpha_extract_return_value (struct type *valtype, struct regcache *regcache, |
432 | void *valbuf) | |
140f9984 | 433 | { |
7b5e1cb3 | 434 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
435 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
436 | ULONGEST l; | |
437 | ||
438 | switch (TYPE_CODE (valtype)) | |
439 | { | |
440 | case TYPE_CODE_FLT: | |
7b5e1cb3 | 441 | switch (length) |
5ec2bb99 RH |
442 | { |
443 | case 4: | |
444 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); | |
c483c494 | 445 | alpha_sts (valbuf, raw_buffer); |
5ec2bb99 RH |
446 | break; |
447 | ||
448 | case 8: | |
449 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
450 | break; | |
451 | ||
24064b5c RH |
452 | case 16: |
453 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
454 | read_memory (l, valbuf, 16); | |
455 | break; | |
456 | ||
5ec2bb99 | 457 | default: |
67dfac52 | 458 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
459 | } |
460 | break; | |
461 | ||
7b5e1cb3 RH |
462 | case TYPE_CODE_COMPLEX: |
463 | switch (length) | |
464 | { | |
465 | case 8: | |
466 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
467 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
468 | break; | |
469 | ||
470 | case 16: | |
471 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); | |
472 | regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1, | |
473 | (char *)valbuf + 8); | |
474 | break; | |
475 | ||
476 | case 32: | |
477 | regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); | |
478 | read_memory (l, valbuf, 32); | |
479 | break; | |
480 | ||
481 | default: | |
67dfac52 | 482 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
483 | } |
484 | break; | |
485 | ||
5ec2bb99 RH |
486 | default: |
487 | /* Assume everything else degenerates to an integer. */ | |
488 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); | |
7b5e1cb3 | 489 | store_unsigned_integer (valbuf, length, l); |
5ec2bb99 RH |
490 | break; |
491 | } | |
140f9984 JT |
492 | } |
493 | ||
5ec2bb99 RH |
494 | /* Extract from REGCACHE the address of a structure about to be returned |
495 | from a function. */ | |
496 | ||
497 | static CORE_ADDR | |
498 | alpha_extract_struct_value_address (struct regcache *regcache) | |
499 | { | |
500 | ULONGEST addr; | |
501 | regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); | |
502 | return addr; | |
503 | } | |
504 | ||
505 | /* Insert the given value into REGCACHE as if it was being | |
506 | returned by a function. */ | |
0d056799 | 507 | |
d2427a71 | 508 | static void |
5ec2bb99 RH |
509 | alpha_store_return_value (struct type *valtype, struct regcache *regcache, |
510 | const void *valbuf) | |
c906108c | 511 | { |
d2427a71 | 512 | int length = TYPE_LENGTH (valtype); |
5ec2bb99 RH |
513 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
514 | ULONGEST l; | |
d2427a71 | 515 | |
5ec2bb99 | 516 | switch (TYPE_CODE (valtype)) |
c906108c | 517 | { |
5ec2bb99 RH |
518 | case TYPE_CODE_FLT: |
519 | switch (length) | |
520 | { | |
521 | case 4: | |
c483c494 | 522 | alpha_lds (raw_buffer, valbuf); |
f75d70cc RH |
523 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); |
524 | break; | |
5ec2bb99 RH |
525 | |
526 | case 8: | |
527 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
528 | break; | |
529 | ||
24064b5c RH |
530 | case 16: |
531 | /* FIXME: 128-bit long doubles are returned like structures: | |
532 | by writing into indirect storage provided by the caller | |
533 | as the first argument. */ | |
534 | error ("Cannot set a 128-bit long double return value."); | |
535 | ||
5ec2bb99 | 536 | default: |
67dfac52 | 537 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
5ec2bb99 RH |
538 | } |
539 | break; | |
d2427a71 | 540 | |
7b5e1cb3 RH |
541 | case TYPE_CODE_COMPLEX: |
542 | switch (length) | |
543 | { | |
544 | case 8: | |
545 | /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ | |
546 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
547 | break; | |
548 | ||
549 | case 16: | |
550 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); | |
551 | regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1, | |
552 | (const char *)valbuf + 8); | |
553 | break; | |
554 | ||
555 | case 32: | |
556 | /* FIXME: 128-bit long doubles are returned like structures: | |
557 | by writing into indirect storage provided by the caller | |
558 | as the first argument. */ | |
559 | error ("Cannot set a 128-bit long double return value."); | |
560 | ||
561 | default: | |
67dfac52 | 562 | internal_error (__FILE__, __LINE__, "unknown floating point width"); |
7b5e1cb3 RH |
563 | } |
564 | break; | |
565 | ||
5ec2bb99 RH |
566 | default: |
567 | /* Assume everything else degenerates to an integer. */ | |
0ede8eca RH |
568 | /* 32-bit values must be sign-extended to 64 bits |
569 | even if the base data type is unsigned. */ | |
570 | if (length == 4) | |
571 | valtype = builtin_type_int32; | |
5ec2bb99 RH |
572 | l = unpack_long (valtype, valbuf); |
573 | regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); | |
574 | break; | |
575 | } | |
c906108c SS |
576 | } |
577 | ||
d2427a71 RH |
578 | \f |
579 | static const unsigned char * | |
580 | alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) | |
c906108c | 581 | { |
d2427a71 RH |
582 | static const unsigned char alpha_breakpoint[] = |
583 | { 0x80, 0, 0, 0 }; /* call_pal bpt */ | |
c906108c | 584 | |
d2427a71 RH |
585 | *lenptr = sizeof(alpha_breakpoint); |
586 | return (alpha_breakpoint); | |
587 | } | |
c906108c | 588 | |
d2427a71 RH |
589 | \f |
590 | /* This returns the PC of the first insn after the prologue. | |
591 | If we can't find the prologue, then return 0. */ | |
c906108c | 592 | |
d2427a71 RH |
593 | CORE_ADDR |
594 | alpha_after_prologue (CORE_ADDR pc) | |
c906108c | 595 | { |
d2427a71 RH |
596 | struct symtab_and_line sal; |
597 | CORE_ADDR func_addr, func_end; | |
c906108c | 598 | |
d2427a71 | 599 | if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
c5aa993b | 600 | return 0; |
c906108c | 601 | |
d2427a71 RH |
602 | sal = find_pc_line (func_addr, 0); |
603 | if (sal.end < func_end) | |
604 | return sal.end; | |
c5aa993b | 605 | |
d2427a71 RH |
606 | /* The line after the prologue is after the end of the function. In this |
607 | case, tell the caller to find the prologue the hard way. */ | |
608 | return 0; | |
c906108c SS |
609 | } |
610 | ||
d2427a71 RH |
611 | /* Read an instruction from memory at PC, looking through breakpoints. */ |
612 | ||
613 | unsigned int | |
614 | alpha_read_insn (CORE_ADDR pc) | |
c906108c | 615 | { |
d2427a71 RH |
616 | char buf[4]; |
617 | int status; | |
c5aa993b | 618 | |
1f602b35 | 619 | status = deprecated_read_memory_nobpt (pc, buf, 4); |
d2427a71 RH |
620 | if (status) |
621 | memory_error (status, pc); | |
622 | return extract_unsigned_integer (buf, 4); | |
623 | } | |
c5aa993b | 624 | |
d2427a71 RH |
625 | /* To skip prologues, I use this predicate. Returns either PC itself |
626 | if the code at PC does not look like a function prologue; otherwise | |
627 | returns an address that (if we're lucky) follows the prologue. If | |
628 | LENIENT, then we must skip everything which is involved in setting | |
629 | up the frame (it's OK to skip more, just so long as we don't skip | |
630 | anything which might clobber the registers which are being saved. */ | |
c906108c | 631 | |
d2427a71 RH |
632 | static CORE_ADDR |
633 | alpha_skip_prologue (CORE_ADDR pc) | |
634 | { | |
635 | unsigned long inst; | |
636 | int offset; | |
637 | CORE_ADDR post_prologue_pc; | |
638 | char buf[4]; | |
c906108c | 639 | |
d2427a71 RH |
640 | /* Silently return the unaltered pc upon memory errors. |
641 | This could happen on OSF/1 if decode_line_1 tries to skip the | |
642 | prologue for quickstarted shared library functions when the | |
643 | shared library is not yet mapped in. | |
644 | Reading target memory is slow over serial lines, so we perform | |
645 | this check only if the target has shared libraries (which all | |
646 | Alpha targets do). */ | |
647 | if (target_read_memory (pc, buf, 4)) | |
648 | return pc; | |
c906108c | 649 | |
d2427a71 RH |
650 | /* See if we can determine the end of the prologue via the symbol table. |
651 | If so, then return either PC, or the PC after the prologue, whichever | |
652 | is greater. */ | |
c906108c | 653 | |
d2427a71 RH |
654 | post_prologue_pc = alpha_after_prologue (pc); |
655 | if (post_prologue_pc != 0) | |
656 | return max (pc, post_prologue_pc); | |
c906108c | 657 | |
d2427a71 RH |
658 | /* Can't determine prologue from the symbol table, need to examine |
659 | instructions. */ | |
dc1b0db2 | 660 | |
d2427a71 RH |
661 | /* Skip the typical prologue instructions. These are the stack adjustment |
662 | instruction and the instructions that save registers on the stack | |
663 | or in the gcc frame. */ | |
664 | for (offset = 0; offset < 100; offset += 4) | |
665 | { | |
666 | inst = alpha_read_insn (pc + offset); | |
c906108c | 667 | |
d2427a71 RH |
668 | if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ |
669 | continue; | |
670 | if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ | |
671 | continue; | |
672 | if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ | |
673 | continue; | |
674 | if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ | |
675 | continue; | |
c906108c | 676 | |
d2427a71 RH |
677 | if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ |
678 | || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ | |
679 | && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ | |
680 | continue; | |
c906108c | 681 | |
d2427a71 RH |
682 | if (inst == 0x47de040f) /* bis sp,sp,fp */ |
683 | continue; | |
684 | if (inst == 0x47fe040f) /* bis zero,sp,fp */ | |
685 | continue; | |
c906108c | 686 | |
d2427a71 | 687 | break; |
c906108c | 688 | } |
d2427a71 RH |
689 | return pc + offset; |
690 | } | |
c906108c | 691 | |
d2427a71 RH |
692 | \f |
693 | /* Figure out where the longjmp will land. | |
694 | We expect the first arg to be a pointer to the jmp_buf structure from | |
695 | which we extract the PC (JB_PC) that we will land at. The PC is copied | |
696 | into the "pc". This routine returns true on success. */ | |
c906108c SS |
697 | |
698 | static int | |
d2427a71 | 699 | alpha_get_longjmp_target (CORE_ADDR *pc) |
c906108c | 700 | { |
d2427a71 RH |
701 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
702 | CORE_ADDR jb_addr; | |
5ab84872 | 703 | char raw_buffer[ALPHA_REGISTER_SIZE]; |
c906108c | 704 | |
d2427a71 | 705 | jb_addr = read_register (ALPHA_A0_REGNUM); |
c906108c | 706 | |
d2427a71 RH |
707 | if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), |
708 | raw_buffer, tdep->jb_elt_size)) | |
c906108c | 709 | return 0; |
d2427a71 | 710 | |
7c0b4a20 | 711 | *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size); |
d2427a71 | 712 | return 1; |
c906108c SS |
713 | } |
714 | ||
d2427a71 RH |
715 | \f |
716 | /* Frame unwinder for signal trampolines. We use alpha tdep bits that | |
717 | describe the location and shape of the sigcontext structure. After | |
718 | that, all registers are in memory, so it's easy. */ | |
719 | /* ??? Shouldn't we be able to do this generically, rather than with | |
720 | OSABI data specific to Alpha? */ | |
721 | ||
722 | struct alpha_sigtramp_unwind_cache | |
c906108c | 723 | { |
d2427a71 RH |
724 | CORE_ADDR sigcontext_addr; |
725 | }; | |
c906108c | 726 | |
d2427a71 RH |
727 | static struct alpha_sigtramp_unwind_cache * |
728 | alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame, | |
729 | void **this_prologue_cache) | |
730 | { | |
731 | struct alpha_sigtramp_unwind_cache *info; | |
732 | struct gdbarch_tdep *tdep; | |
c906108c | 733 | |
d2427a71 RH |
734 | if (*this_prologue_cache) |
735 | return *this_prologue_cache; | |
c906108c | 736 | |
d2427a71 RH |
737 | info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); |
738 | *this_prologue_cache = info; | |
c906108c | 739 | |
d2427a71 RH |
740 | tdep = gdbarch_tdep (current_gdbarch); |
741 | info->sigcontext_addr = tdep->sigcontext_addr (next_frame); | |
c906108c | 742 | |
d2427a71 | 743 | return info; |
c906108c SS |
744 | } |
745 | ||
138e7be5 MK |
746 | /* Return the address of REGNUM in a sigtramp frame. Since this is |
747 | all arithmetic, it doesn't seem worthwhile to cache it. */ | |
c5aa993b | 748 | |
d2427a71 | 749 | static CORE_ADDR |
138e7be5 | 750 | alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum) |
d2427a71 | 751 | { |
138e7be5 MK |
752 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
753 | ||
754 | if (regnum >= 0 && regnum < 32) | |
755 | return sigcontext_addr + tdep->sc_regs_offset + regnum * 8; | |
756 | else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32) | |
757 | return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8; | |
758 | else if (regnum == ALPHA_PC_REGNUM) | |
759 | return sigcontext_addr + tdep->sc_pc_offset; | |
c5aa993b | 760 | |
d2427a71 | 761 | return 0; |
c906108c SS |
762 | } |
763 | ||
d2427a71 RH |
764 | /* Given a GDB frame, determine the address of the calling function's |
765 | frame. This will be used to create a new GDB frame struct. */ | |
140f9984 | 766 | |
dc129d82 | 767 | static void |
d2427a71 RH |
768 | alpha_sigtramp_frame_this_id (struct frame_info *next_frame, |
769 | void **this_prologue_cache, | |
770 | struct frame_id *this_id) | |
c906108c | 771 | { |
d2427a71 RH |
772 | struct alpha_sigtramp_unwind_cache *info |
773 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
774 | struct gdbarch_tdep *tdep; | |
775 | CORE_ADDR stack_addr, code_addr; | |
776 | ||
777 | /* If the OSABI couldn't locate the sigcontext, give up. */ | |
778 | if (info->sigcontext_addr == 0) | |
779 | return; | |
780 | ||
781 | /* If we have dynamic signal trampolines, find their start. | |
782 | If we do not, then we must assume there is a symbol record | |
783 | that can provide the start address. */ | |
784 | tdep = gdbarch_tdep (current_gdbarch); | |
785 | if (tdep->dynamic_sigtramp_offset) | |
c906108c | 786 | { |
d2427a71 RH |
787 | int offset; |
788 | code_addr = frame_pc_unwind (next_frame); | |
789 | offset = tdep->dynamic_sigtramp_offset (code_addr); | |
790 | if (offset >= 0) | |
791 | code_addr -= offset; | |
c906108c | 792 | else |
d2427a71 | 793 | code_addr = 0; |
c906108c | 794 | } |
d2427a71 RH |
795 | else |
796 | code_addr = frame_func_unwind (next_frame); | |
c906108c | 797 | |
d2427a71 RH |
798 | /* The stack address is trivially read from the sigcontext. */ |
799 | stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr, | |
800 | ALPHA_SP_REGNUM); | |
b21fd293 RH |
801 | stack_addr = get_frame_memory_unsigned (next_frame, stack_addr, |
802 | ALPHA_REGISTER_SIZE); | |
c906108c | 803 | |
d2427a71 | 804 | *this_id = frame_id_build (stack_addr, code_addr); |
c906108c SS |
805 | } |
806 | ||
d2427a71 | 807 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
c906108c | 808 | |
d2427a71 RH |
809 | static void |
810 | alpha_sigtramp_frame_prev_register (struct frame_info *next_frame, | |
811 | void **this_prologue_cache, | |
812 | int regnum, int *optimizedp, | |
813 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
814 | int *realnump, void *bufferp) | |
c906108c | 815 | { |
d2427a71 RH |
816 | struct alpha_sigtramp_unwind_cache *info |
817 | = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); | |
818 | CORE_ADDR addr; | |
c906108c | 819 | |
d2427a71 | 820 | if (info->sigcontext_addr != 0) |
c906108c | 821 | { |
d2427a71 RH |
822 | /* All integer and fp registers are stored in memory. */ |
823 | addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum); | |
824 | if (addr != 0) | |
c906108c | 825 | { |
d2427a71 RH |
826 | *optimizedp = 0; |
827 | *lvalp = lval_memory; | |
828 | *addrp = addr; | |
829 | *realnump = -1; | |
830 | if (bufferp != NULL) | |
b21fd293 | 831 | get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE); |
d2427a71 | 832 | return; |
c906108c | 833 | } |
c906108c SS |
834 | } |
835 | ||
d2427a71 RH |
836 | /* This extra register may actually be in the sigcontext, but our |
837 | current description of it in alpha_sigtramp_frame_unwind_cache | |
838 | doesn't include it. Too bad. Fall back on whatever's in the | |
839 | outer frame. */ | |
840 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
841 | realnump, bufferp); | |
842 | } | |
c906108c | 843 | |
d2427a71 RH |
844 | static const struct frame_unwind alpha_sigtramp_frame_unwind = { |
845 | SIGTRAMP_FRAME, | |
846 | alpha_sigtramp_frame_this_id, | |
847 | alpha_sigtramp_frame_prev_register | |
848 | }; | |
c906108c | 849 | |
d2427a71 | 850 | static const struct frame_unwind * |
336d1bba | 851 | alpha_sigtramp_frame_sniffer (struct frame_info *next_frame) |
d2427a71 | 852 | { |
336d1bba | 853 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
d2427a71 | 854 | char *name; |
c906108c | 855 | |
f2524b93 AC |
856 | /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead |
857 | look at tramp-frame.h and other simplier per-architecture | |
858 | sigtramp unwinders. */ | |
859 | ||
860 | /* We shouldn't even bother to try if the OSABI didn't register a | |
861 | sigcontext_addr handler or pc_in_sigtramp hander. */ | |
862 | if (gdbarch_tdep (current_gdbarch)->sigcontext_addr == NULL) | |
863 | return NULL; | |
864 | if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp == NULL) | |
d2427a71 | 865 | return NULL; |
c906108c | 866 | |
d2427a71 RH |
867 | /* Otherwise we should be in a signal frame. */ |
868 | find_pc_partial_function (pc, &name, NULL, NULL); | |
f2524b93 | 869 | if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp (pc, name)) |
d2427a71 | 870 | return &alpha_sigtramp_frame_unwind; |
c906108c | 871 | |
d2427a71 | 872 | return NULL; |
c906108c | 873 | } |
d2427a71 RH |
874 | \f |
875 | /* Fallback alpha frame unwinder. Uses instruction scanning and knows | |
876 | something about the traditional layout of alpha stack frames. */ | |
c906108c | 877 | |
d2427a71 | 878 | struct alpha_heuristic_unwind_cache |
c906108c | 879 | { |
d2427a71 RH |
880 | CORE_ADDR *saved_regs; |
881 | CORE_ADDR vfp; | |
882 | CORE_ADDR start_pc; | |
883 | int return_reg; | |
884 | }; | |
c906108c | 885 | |
d2427a71 RH |
886 | /* Heuristic_proc_start may hunt through the text section for a long |
887 | time across a 2400 baud serial line. Allows the user to limit this | |
888 | search. */ | |
889 | static unsigned int heuristic_fence_post = 0; | |
c906108c | 890 | |
d2427a71 RH |
891 | /* Attempt to locate the start of the function containing PC. We assume that |
892 | the previous function ends with an about_to_return insn. Not foolproof by | |
893 | any means, since gcc is happy to put the epilogue in the middle of a | |
894 | function. But we're guessing anyway... */ | |
c906108c | 895 | |
d2427a71 RH |
896 | static CORE_ADDR |
897 | alpha_heuristic_proc_start (CORE_ADDR pc) | |
898 | { | |
899 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
900 | CORE_ADDR last_non_nop = pc; | |
901 | CORE_ADDR fence = pc - heuristic_fence_post; | |
902 | CORE_ADDR orig_pc = pc; | |
fbe586ae | 903 | CORE_ADDR func; |
9e0b60a8 | 904 | |
d2427a71 RH |
905 | if (pc == 0) |
906 | return 0; | |
9e0b60a8 | 907 | |
fbe586ae RH |
908 | /* First see if we can find the start of the function from minimal |
909 | symbol information. This can succeed with a binary that doesn't | |
910 | have debug info, but hasn't been stripped. */ | |
911 | func = get_pc_function_start (pc); | |
912 | if (func) | |
913 | return func; | |
914 | ||
d2427a71 RH |
915 | if (heuristic_fence_post == UINT_MAX |
916 | || fence < tdep->vm_min_address) | |
917 | fence = tdep->vm_min_address; | |
c906108c | 918 | |
d2427a71 RH |
919 | /* Search back for previous return; also stop at a 0, which might be |
920 | seen for instance before the start of a code section. Don't include | |
921 | nops, since this usually indicates padding between functions. */ | |
922 | for (pc -= 4; pc >= fence; pc -= 4) | |
c906108c | 923 | { |
d2427a71 RH |
924 | unsigned int insn = alpha_read_insn (pc); |
925 | switch (insn) | |
c906108c | 926 | { |
d2427a71 RH |
927 | case 0: /* invalid insn */ |
928 | case 0x6bfa8001: /* ret $31,($26),1 */ | |
929 | return last_non_nop; | |
930 | ||
931 | case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ | |
932 | case 0x47ff041f: /* nop: bis $31,$31,$31 */ | |
933 | break; | |
934 | ||
935 | default: | |
936 | last_non_nop = pc; | |
937 | break; | |
c906108c | 938 | } |
d2427a71 | 939 | } |
c906108c | 940 | |
d2427a71 RH |
941 | /* It's not clear to me why we reach this point when stopping quietly, |
942 | but with this test, at least we don't print out warnings for every | |
943 | child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ | |
944 | if (stop_soon == NO_STOP_QUIETLY) | |
945 | { | |
946 | static int blurb_printed = 0; | |
c906108c | 947 | |
d2427a71 RH |
948 | if (fence == tdep->vm_min_address) |
949 | warning ("Hit beginning of text section without finding"); | |
c906108c | 950 | else |
d2427a71 RH |
951 | warning ("Hit heuristic-fence-post without finding"); |
952 | warning ("enclosing function for address 0x%s", paddr_nz (orig_pc)); | |
c906108c | 953 | |
d2427a71 RH |
954 | if (!blurb_printed) |
955 | { | |
956 | printf_filtered ("\ | |
957 | This warning occurs if you are debugging a function without any symbols\n\ | |
958 | (for example, in a stripped executable). In that case, you may wish to\n\ | |
959 | increase the size of the search with the `set heuristic-fence-post' command.\n\ | |
960 | \n\ | |
961 | Otherwise, you told GDB there was a function where there isn't one, or\n\ | |
962 | (more likely) you have encountered a bug in GDB.\n"); | |
963 | blurb_printed = 1; | |
964 | } | |
965 | } | |
c906108c | 966 | |
d2427a71 RH |
967 | return 0; |
968 | } | |
c906108c | 969 | |
fbe586ae | 970 | static struct alpha_heuristic_unwind_cache * |
d2427a71 RH |
971 | alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame, |
972 | void **this_prologue_cache, | |
973 | CORE_ADDR start_pc) | |
974 | { | |
975 | struct alpha_heuristic_unwind_cache *info; | |
976 | ULONGEST val; | |
977 | CORE_ADDR limit_pc, cur_pc; | |
978 | int frame_reg, frame_size, return_reg, reg; | |
c906108c | 979 | |
d2427a71 RH |
980 | if (*this_prologue_cache) |
981 | return *this_prologue_cache; | |
c906108c | 982 | |
d2427a71 RH |
983 | info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); |
984 | *this_prologue_cache = info; | |
985 | info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); | |
c906108c | 986 | |
d2427a71 RH |
987 | limit_pc = frame_pc_unwind (next_frame); |
988 | if (start_pc == 0) | |
989 | start_pc = alpha_heuristic_proc_start (limit_pc); | |
990 | info->start_pc = start_pc; | |
c906108c | 991 | |
d2427a71 RH |
992 | frame_reg = ALPHA_SP_REGNUM; |
993 | frame_size = 0; | |
994 | return_reg = -1; | |
c906108c | 995 | |
d2427a71 RH |
996 | /* If we've identified a likely place to start, do code scanning. */ |
997 | if (start_pc != 0) | |
c5aa993b | 998 | { |
d2427a71 RH |
999 | /* Limit the forward search to 50 instructions. */ |
1000 | if (start_pc + 200 < limit_pc) | |
1001 | limit_pc = start_pc + 200; | |
c5aa993b | 1002 | |
d2427a71 RH |
1003 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) |
1004 | { | |
1005 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1006 | |
d2427a71 RH |
1007 | if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ |
1008 | { | |
1009 | if (word & 0x8000) | |
1010 | { | |
1011 | /* Consider only the first stack allocation instruction | |
1012 | to contain the static size of the frame. */ | |
1013 | if (frame_size == 0) | |
1014 | frame_size = (-word) & 0xffff; | |
1015 | } | |
1016 | else | |
1017 | { | |
1018 | /* Exit loop if a positive stack adjustment is found, which | |
1019 | usually means that the stack cleanup code in the function | |
1020 | epilogue is reached. */ | |
1021 | break; | |
1022 | } | |
1023 | } | |
1024 | else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ | |
1025 | { | |
1026 | reg = (word & 0x03e00000) >> 21; | |
1027 | ||
d15bfd3a AC |
1028 | /* Ignore this instruction if we have already encountered |
1029 | an instruction saving the same register earlier in the | |
1030 | function code. The current instruction does not tell | |
1031 | us where the original value upon function entry is saved. | |
1032 | All it says is that the function we are scanning reused | |
1033 | that register for some computation of its own, and is now | |
1034 | saving its result. */ | |
1035 | if (info->saved_regs[reg]) | |
1036 | continue; | |
1037 | ||
d2427a71 RH |
1038 | if (reg == 31) |
1039 | continue; | |
1040 | ||
1041 | /* Do not compute the address where the register was saved yet, | |
1042 | because we don't know yet if the offset will need to be | |
1043 | relative to $sp or $fp (we can not compute the address | |
1044 | relative to $sp if $sp is updated during the execution of | |
1045 | the current subroutine, for instance when doing some alloca). | |
1046 | So just store the offset for the moment, and compute the | |
1047 | address later when we know whether this frame has a frame | |
1048 | pointer or not. */ | |
1049 | /* Hack: temporarily add one, so that the offset is non-zero | |
1050 | and we can tell which registers have save offsets below. */ | |
1051 | info->saved_regs[reg] = (word & 0xffff) + 1; | |
1052 | ||
1053 | /* Starting with OSF/1-3.2C, the system libraries are shipped | |
1054 | without local symbols, but they still contain procedure | |
1055 | descriptors without a symbol reference. GDB is currently | |
1056 | unable to find these procedure descriptors and uses | |
1057 | heuristic_proc_desc instead. | |
1058 | As some low level compiler support routines (__div*, __add*) | |
1059 | use a non-standard return address register, we have to | |
1060 | add some heuristics to determine the return address register, | |
1061 | or stepping over these routines will fail. | |
1062 | Usually the return address register is the first register | |
1063 | saved on the stack, but assembler optimization might | |
1064 | rearrange the register saves. | |
1065 | So we recognize only a few registers (t7, t9, ra) within | |
1066 | the procedure prologue as valid return address registers. | |
1067 | If we encounter a return instruction, we extract the | |
1068 | the return address register from it. | |
1069 | ||
1070 | FIXME: Rewriting GDB to access the procedure descriptors, | |
1071 | e.g. via the minimal symbol table, might obviate this hack. */ | |
1072 | if (return_reg == -1 | |
1073 | && cur_pc < (start_pc + 80) | |
1074 | && (reg == ALPHA_T7_REGNUM | |
1075 | || reg == ALPHA_T9_REGNUM | |
1076 | || reg == ALPHA_RA_REGNUM)) | |
1077 | return_reg = reg; | |
1078 | } | |
1079 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1080 | return_reg = (word >> 16) & 0x1f; | |
1081 | else if (word == 0x47de040f) /* bis sp,sp,fp */ | |
1082 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1083 | else if (word == 0x47fe040f) /* bis zero,sp,fp */ | |
1084 | frame_reg = ALPHA_GCC_FP_REGNUM; | |
1085 | } | |
c5aa993b | 1086 | |
d2427a71 RH |
1087 | /* If we haven't found a valid return address register yet, keep |
1088 | searching in the procedure prologue. */ | |
1089 | if (return_reg == -1) | |
1090 | { | |
1091 | while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) | |
1092 | { | |
1093 | unsigned int word = alpha_read_insn (cur_pc); | |
c5aa993b | 1094 | |
d2427a71 RH |
1095 | if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ |
1096 | { | |
1097 | reg = (word & 0x03e00000) >> 21; | |
1098 | if (reg == ALPHA_T7_REGNUM | |
1099 | || reg == ALPHA_T9_REGNUM | |
1100 | || reg == ALPHA_RA_REGNUM) | |
1101 | { | |
1102 | return_reg = reg; | |
1103 | break; | |
1104 | } | |
1105 | } | |
1106 | else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ | |
1107 | { | |
1108 | return_reg = (word >> 16) & 0x1f; | |
1109 | break; | |
1110 | } | |
85b32d22 RH |
1111 | |
1112 | cur_pc += 4; | |
d2427a71 RH |
1113 | } |
1114 | } | |
c906108c | 1115 | } |
c906108c | 1116 | |
d2427a71 RH |
1117 | /* Failing that, do default to the customary RA. */ |
1118 | if (return_reg == -1) | |
1119 | return_reg = ALPHA_RA_REGNUM; | |
1120 | info->return_reg = return_reg; | |
f8453e34 | 1121 | |
d2427a71 RH |
1122 | frame_unwind_unsigned_register (next_frame, frame_reg, &val); |
1123 | info->vfp = val + frame_size; | |
c906108c | 1124 | |
d2427a71 RH |
1125 | /* Convert offsets to absolute addresses. See above about adding |
1126 | one to the offsets to make all detected offsets non-zero. */ | |
1127 | for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) | |
1128 | if (info->saved_regs[reg]) | |
1129 | info->saved_regs[reg] += val - 1; | |
1130 | ||
1131 | return info; | |
c906108c | 1132 | } |
c906108c | 1133 | |
d2427a71 RH |
1134 | /* Given a GDB frame, determine the address of the calling function's |
1135 | frame. This will be used to create a new GDB frame struct. */ | |
1136 | ||
fbe586ae | 1137 | static void |
d2427a71 RH |
1138 | alpha_heuristic_frame_this_id (struct frame_info *next_frame, |
1139 | void **this_prologue_cache, | |
1140 | struct frame_id *this_id) | |
c906108c | 1141 | { |
d2427a71 RH |
1142 | struct alpha_heuristic_unwind_cache *info |
1143 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1144 | |
d2427a71 | 1145 | *this_id = frame_id_build (info->vfp, info->start_pc); |
c906108c SS |
1146 | } |
1147 | ||
d2427a71 RH |
1148 | /* Retrieve the value of REGNUM in FRAME. Don't give up! */ |
1149 | ||
fbe586ae | 1150 | static void |
d2427a71 RH |
1151 | alpha_heuristic_frame_prev_register (struct frame_info *next_frame, |
1152 | void **this_prologue_cache, | |
1153 | int regnum, int *optimizedp, | |
1154 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
1155 | int *realnump, void *bufferp) | |
c906108c | 1156 | { |
d2427a71 RH |
1157 | struct alpha_heuristic_unwind_cache *info |
1158 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
1159 | ||
1160 | /* The PC of the previous frame is stored in the link register of | |
1161 | the current frame. Frob regnum so that we pull the value from | |
1162 | the correct place. */ | |
1163 | if (regnum == ALPHA_PC_REGNUM) | |
1164 | regnum = info->return_reg; | |
1165 | ||
1166 | /* For all registers known to be saved in the current frame, | |
1167 | do the obvious and pull the value out. */ | |
1168 | if (info->saved_regs[regnum]) | |
c906108c | 1169 | { |
d2427a71 RH |
1170 | *optimizedp = 0; |
1171 | *lvalp = lval_memory; | |
1172 | *addrp = info->saved_regs[regnum]; | |
1173 | *realnump = -1; | |
1174 | if (bufferp != NULL) | |
b21fd293 | 1175 | get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE); |
c906108c SS |
1176 | return; |
1177 | } | |
1178 | ||
d2427a71 RH |
1179 | /* The stack pointer of the previous frame is computed by popping |
1180 | the current stack frame. */ | |
1181 | if (regnum == ALPHA_SP_REGNUM) | |
c906108c | 1182 | { |
d2427a71 RH |
1183 | *optimizedp = 0; |
1184 | *lvalp = not_lval; | |
1185 | *addrp = 0; | |
1186 | *realnump = -1; | |
1187 | if (bufferp != NULL) | |
1188 | store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp); | |
1189 | return; | |
c906108c | 1190 | } |
95b80706 | 1191 | |
d2427a71 RH |
1192 | /* Otherwise assume the next frame has the same register value. */ |
1193 | frame_register (next_frame, regnum, optimizedp, lvalp, addrp, | |
1194 | realnump, bufferp); | |
95b80706 JT |
1195 | } |
1196 | ||
d2427a71 RH |
1197 | static const struct frame_unwind alpha_heuristic_frame_unwind = { |
1198 | NORMAL_FRAME, | |
1199 | alpha_heuristic_frame_this_id, | |
1200 | alpha_heuristic_frame_prev_register | |
1201 | }; | |
c906108c | 1202 | |
d2427a71 | 1203 | static const struct frame_unwind * |
336d1bba | 1204 | alpha_heuristic_frame_sniffer (struct frame_info *next_frame) |
c906108c | 1205 | { |
d2427a71 | 1206 | return &alpha_heuristic_frame_unwind; |
c906108c SS |
1207 | } |
1208 | ||
fbe586ae | 1209 | static CORE_ADDR |
d2427a71 RH |
1210 | alpha_heuristic_frame_base_address (struct frame_info *next_frame, |
1211 | void **this_prologue_cache) | |
c906108c | 1212 | { |
d2427a71 RH |
1213 | struct alpha_heuristic_unwind_cache *info |
1214 | = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); | |
c906108c | 1215 | |
d2427a71 | 1216 | return info->vfp; |
c906108c SS |
1217 | } |
1218 | ||
d2427a71 RH |
1219 | static const struct frame_base alpha_heuristic_frame_base = { |
1220 | &alpha_heuristic_frame_unwind, | |
1221 | alpha_heuristic_frame_base_address, | |
1222 | alpha_heuristic_frame_base_address, | |
1223 | alpha_heuristic_frame_base_address | |
1224 | }; | |
1225 | ||
c906108c | 1226 | /* Just like reinit_frame_cache, but with the right arguments to be |
d2427a71 | 1227 | callable as an sfunc. Used by the "set heuristic-fence-post" command. */ |
c906108c SS |
1228 | |
1229 | static void | |
fba45db2 | 1230 | reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) |
c906108c SS |
1231 | { |
1232 | reinit_frame_cache (); | |
1233 | } | |
1234 | ||
d2427a71 RH |
1235 | \f |
1236 | /* ALPHA stack frames are almost impenetrable. When execution stops, | |
1237 | we basically have to look at symbol information for the function | |
1238 | that we stopped in, which tells us *which* register (if any) is | |
1239 | the base of the frame pointer, and what offset from that register | |
1240 | the frame itself is at. | |
c906108c | 1241 | |
d2427a71 RH |
1242 | This presents a problem when trying to examine a stack in memory |
1243 | (that isn't executing at the moment), using the "frame" command. We | |
1244 | don't have a PC, nor do we have any registers except SP. | |
c906108c | 1245 | |
d2427a71 RH |
1246 | This routine takes two arguments, SP and PC, and tries to make the |
1247 | cached frames look as if these two arguments defined a frame on the | |
1248 | cache. This allows the rest of info frame to extract the important | |
1249 | arguments without difficulty. */ | |
ec32e4be | 1250 | |
d2427a71 RH |
1251 | struct frame_info * |
1252 | alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv) | |
0d056799 | 1253 | { |
d2427a71 RH |
1254 | if (argc != 2) |
1255 | error ("ALPHA frame specifications require two arguments: sp and pc"); | |
0d056799 | 1256 | |
d2427a71 | 1257 | return create_new_frame (argv[0], argv[1]); |
0d056799 JT |
1258 | } |
1259 | ||
d2427a71 RH |
1260 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
1261 | dummy frame. The frame ID's base needs to match the TOS value | |
1262 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
1263 | breakpoint. */ | |
d734c450 | 1264 | |
d2427a71 RH |
1265 | static struct frame_id |
1266 | alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
0d056799 | 1267 | { |
d2427a71 RH |
1268 | ULONGEST base; |
1269 | frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base); | |
1270 | return frame_id_build (base, frame_pc_unwind (next_frame)); | |
0d056799 JT |
1271 | } |
1272 | ||
dc129d82 | 1273 | static CORE_ADDR |
d2427a71 | 1274 | alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
accc6d1f | 1275 | { |
d2427a71 RH |
1276 | ULONGEST pc; |
1277 | frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc); | |
1278 | return pc; | |
accc6d1f JT |
1279 | } |
1280 | ||
98a8e1e5 RH |
1281 | \f |
1282 | /* Helper routines for alpha*-nat.c files to move register sets to and | |
1283 | from core files. The UNIQUE pointer is allowed to be NULL, as most | |
1284 | targets don't supply this value in their core files. */ | |
1285 | ||
1286 | void | |
1287 | alpha_supply_int_regs (int regno, const void *r0_r30, | |
1288 | const void *pc, const void *unique) | |
1289 | { | |
1290 | int i; | |
1291 | ||
1292 | for (i = 0; i < 31; ++i) | |
1293 | if (regno == i || regno == -1) | |
23a6d369 | 1294 | regcache_raw_supply (current_regcache, i, (const char *)r0_r30 + i*8); |
98a8e1e5 RH |
1295 | |
1296 | if (regno == ALPHA_ZERO_REGNUM || regno == -1) | |
23a6d369 | 1297 | regcache_raw_supply (current_regcache, ALPHA_ZERO_REGNUM, NULL); |
98a8e1e5 RH |
1298 | |
1299 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
23a6d369 | 1300 | regcache_raw_supply (current_regcache, ALPHA_PC_REGNUM, pc); |
98a8e1e5 RH |
1301 | |
1302 | if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) | |
23a6d369 | 1303 | regcache_raw_supply (current_regcache, ALPHA_UNIQUE_REGNUM, unique); |
98a8e1e5 RH |
1304 | } |
1305 | ||
1306 | void | |
1307 | alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique) | |
1308 | { | |
1309 | int i; | |
1310 | ||
1311 | for (i = 0; i < 31; ++i) | |
1312 | if (regno == i || regno == -1) | |
822c9732 | 1313 | regcache_raw_collect (current_regcache, i, (char *)r0_r30 + i*8); |
98a8e1e5 RH |
1314 | |
1315 | if (regno == ALPHA_PC_REGNUM || regno == -1) | |
822c9732 | 1316 | regcache_raw_collect (current_regcache, ALPHA_PC_REGNUM, pc); |
98a8e1e5 RH |
1317 | |
1318 | if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) | |
822c9732 | 1319 | regcache_raw_collect (current_regcache, ALPHA_UNIQUE_REGNUM, unique); |
98a8e1e5 RH |
1320 | } |
1321 | ||
1322 | void | |
1323 | alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr) | |
1324 | { | |
1325 | int i; | |
1326 | ||
1327 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1328 | if (regno == i || regno == -1) | |
23a6d369 AC |
1329 | regcache_raw_supply (current_regcache, i, |
1330 | (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
98a8e1e5 RH |
1331 | |
1332 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
23a6d369 | 1333 | regcache_raw_supply (current_regcache, ALPHA_FPCR_REGNUM, fpcr); |
98a8e1e5 RH |
1334 | } |
1335 | ||
1336 | void | |
1337 | alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr) | |
1338 | { | |
1339 | int i; | |
1340 | ||
1341 | for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) | |
1342 | if (regno == i || regno == -1) | |
822c9732 AC |
1343 | regcache_raw_collect (current_regcache, i, |
1344 | (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); | |
98a8e1e5 RH |
1345 | |
1346 | if (regno == ALPHA_FPCR_REGNUM || regno == -1) | |
822c9732 | 1347 | regcache_raw_collect (current_regcache, ALPHA_FPCR_REGNUM, fpcr); |
98a8e1e5 RH |
1348 | } |
1349 | ||
d2427a71 | 1350 | \f |
ec32e4be JT |
1351 | /* alpha_software_single_step() is called just before we want to resume |
1352 | the inferior, if we want to single-step it but there is no hardware | |
1353 | or kernel single-step support (NetBSD on Alpha, for example). We find | |
1354 | the target of the coming instruction and breakpoint it. | |
1355 | ||
1356 | single_step is also called just after the inferior stops. If we had | |
1357 | set up a simulated single-step, we undo our damage. */ | |
1358 | ||
1359 | static CORE_ADDR | |
1360 | alpha_next_pc (CORE_ADDR pc) | |
1361 | { | |
1362 | unsigned int insn; | |
1363 | unsigned int op; | |
1364 | int offset; | |
1365 | LONGEST rav; | |
1366 | ||
b21fd293 | 1367 | insn = alpha_read_insn (pc); |
ec32e4be JT |
1368 | |
1369 | /* Opcode is top 6 bits. */ | |
1370 | op = (insn >> 26) & 0x3f; | |
1371 | ||
1372 | if (op == 0x1a) | |
1373 | { | |
1374 | /* Jump format: target PC is: | |
1375 | RB & ~3 */ | |
1376 | return (read_register ((insn >> 16) & 0x1f) & ~3); | |
1377 | } | |
1378 | ||
1379 | if ((op & 0x30) == 0x30) | |
1380 | { | |
1381 | /* Branch format: target PC is: | |
1382 | (new PC) + (4 * sext(displacement)) */ | |
1383 | if (op == 0x30 || /* BR */ | |
1384 | op == 0x34) /* BSR */ | |
1385 | { | |
1386 | branch_taken: | |
1387 | offset = (insn & 0x001fffff); | |
1388 | if (offset & 0x00100000) | |
1389 | offset |= 0xffe00000; | |
1390 | offset *= 4; | |
1391 | return (pc + 4 + offset); | |
1392 | } | |
1393 | ||
1394 | /* Need to determine if branch is taken; read RA. */ | |
1395 | rav = (LONGEST) read_register ((insn >> 21) & 0x1f); | |
1396 | switch (op) | |
1397 | { | |
1398 | case 0x38: /* BLBC */ | |
1399 | if ((rav & 1) == 0) | |
1400 | goto branch_taken; | |
1401 | break; | |
1402 | case 0x3c: /* BLBS */ | |
1403 | if (rav & 1) | |
1404 | goto branch_taken; | |
1405 | break; | |
1406 | case 0x39: /* BEQ */ | |
1407 | if (rav == 0) | |
1408 | goto branch_taken; | |
1409 | break; | |
1410 | case 0x3d: /* BNE */ | |
1411 | if (rav != 0) | |
1412 | goto branch_taken; | |
1413 | break; | |
1414 | case 0x3a: /* BLT */ | |
1415 | if (rav < 0) | |
1416 | goto branch_taken; | |
1417 | break; | |
1418 | case 0x3b: /* BLE */ | |
1419 | if (rav <= 0) | |
1420 | goto branch_taken; | |
1421 | break; | |
1422 | case 0x3f: /* BGT */ | |
1423 | if (rav > 0) | |
1424 | goto branch_taken; | |
1425 | break; | |
1426 | case 0x3e: /* BGE */ | |
1427 | if (rav >= 0) | |
1428 | goto branch_taken; | |
1429 | break; | |
d2427a71 RH |
1430 | |
1431 | /* ??? Missing floating-point branches. */ | |
ec32e4be JT |
1432 | } |
1433 | } | |
1434 | ||
1435 | /* Not a branch or branch not taken; target PC is: | |
1436 | pc + 4 */ | |
1437 | return (pc + 4); | |
1438 | } | |
1439 | ||
1440 | void | |
1441 | alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) | |
1442 | { | |
1443 | static CORE_ADDR next_pc; | |
1444 | typedef char binsn_quantum[BREAKPOINT_MAX]; | |
1445 | static binsn_quantum break_mem; | |
1446 | CORE_ADDR pc; | |
1447 | ||
1448 | if (insert_breakpoints_p) | |
1449 | { | |
1450 | pc = read_pc (); | |
1451 | next_pc = alpha_next_pc (pc); | |
1452 | ||
1453 | target_insert_breakpoint (next_pc, break_mem); | |
1454 | } | |
1455 | else | |
1456 | { | |
1457 | target_remove_breakpoint (next_pc, break_mem); | |
1458 | write_pc (next_pc); | |
1459 | } | |
c906108c SS |
1460 | } |
1461 | ||
dc129d82 | 1462 | \f |
dc129d82 JT |
1463 | /* Initialize the current architecture based on INFO. If possible, re-use an |
1464 | architecture from ARCHES, which is a list of architectures already created | |
1465 | during this debugging session. | |
1466 | ||
1467 | Called e.g. at program startup, when reading a core file, and when reading | |
1468 | a binary file. */ | |
1469 | ||
1470 | static struct gdbarch * | |
1471 | alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1472 | { | |
1473 | struct gdbarch_tdep *tdep; | |
1474 | struct gdbarch *gdbarch; | |
dc129d82 JT |
1475 | |
1476 | /* Try to determine the ABI of the object we are loading. */ | |
4be87837 | 1477 | if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) |
dc129d82 | 1478 | { |
4be87837 DJ |
1479 | /* If it's an ECOFF file, assume it's OSF/1. */ |
1480 | if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) | |
aff87235 | 1481 | info.osabi = GDB_OSABI_OSF1; |
dc129d82 JT |
1482 | } |
1483 | ||
1484 | /* Find a candidate among extant architectures. */ | |
4be87837 DJ |
1485 | arches = gdbarch_list_lookup_by_info (arches, &info); |
1486 | if (arches != NULL) | |
1487 | return arches->gdbarch; | |
dc129d82 JT |
1488 | |
1489 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1490 | gdbarch = gdbarch_alloc (&info, tdep); | |
1491 | ||
d2427a71 RH |
1492 | /* Lowest text address. This is used by heuristic_proc_start() |
1493 | to decide when to stop looking. */ | |
594706e6 | 1494 | tdep->vm_min_address = (CORE_ADDR) 0x120000000LL; |
d9b023cc | 1495 | |
36a6271d | 1496 | tdep->dynamic_sigtramp_offset = NULL; |
5868c862 | 1497 | tdep->sigcontext_addr = NULL; |
138e7be5 MK |
1498 | tdep->sc_pc_offset = 2 * 8; |
1499 | tdep->sc_regs_offset = 4 * 8; | |
1500 | tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8; | |
36a6271d | 1501 | |
accc6d1f JT |
1502 | tdep->jb_pc = -1; /* longjmp support not enabled by default */ |
1503 | ||
dc129d82 JT |
1504 | /* Type sizes */ |
1505 | set_gdbarch_short_bit (gdbarch, 16); | |
1506 | set_gdbarch_int_bit (gdbarch, 32); | |
1507 | set_gdbarch_long_bit (gdbarch, 64); | |
1508 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1509 | set_gdbarch_float_bit (gdbarch, 32); | |
1510 | set_gdbarch_double_bit (gdbarch, 64); | |
1511 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1512 | set_gdbarch_ptr_bit (gdbarch, 64); | |
1513 | ||
1514 | /* Register info */ | |
1515 | set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); | |
1516 | set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); | |
dc129d82 JT |
1517 | set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); |
1518 | set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); | |
1519 | ||
1520 | set_gdbarch_register_name (gdbarch, alpha_register_name); | |
9c04cab7 | 1521 | set_gdbarch_deprecated_register_byte (gdbarch, alpha_register_byte); |
c483c494 | 1522 | set_gdbarch_register_type (gdbarch, alpha_register_type); |
dc129d82 JT |
1523 | |
1524 | set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); | |
1525 | set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); | |
1526 | ||
c483c494 RH |
1527 | set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); |
1528 | set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); | |
1529 | set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); | |
dc129d82 | 1530 | |
615967cb RH |
1531 | set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); |
1532 | ||
d2427a71 | 1533 | /* Prologue heuristics. */ |
dc129d82 JT |
1534 | set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); |
1535 | ||
5ef165c2 RH |
1536 | /* Disassembler. */ |
1537 | set_gdbarch_print_insn (gdbarch, print_insn_alpha); | |
1538 | ||
d2427a71 | 1539 | /* Call info. */ |
dc129d82 | 1540 | |
b5622e8d | 1541 | set_gdbarch_deprecated_use_struct_convention (gdbarch, always_use_struct_convention); |
5ec2bb99 RH |
1542 | set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value); |
1543 | set_gdbarch_store_return_value (gdbarch, alpha_store_return_value); | |
74055713 | 1544 | set_gdbarch_deprecated_extract_struct_value_address (gdbarch, alpha_extract_struct_value_address); |
dc129d82 JT |
1545 | |
1546 | /* Settings for calling functions in the inferior. */ | |
c88e30c0 | 1547 | set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); |
d2427a71 RH |
1548 | |
1549 | /* Methods for saving / extracting a dummy frame's ID. */ | |
1550 | set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id); | |
d2427a71 RH |
1551 | |
1552 | /* Return the unwound PC value. */ | |
1553 | set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); | |
dc129d82 JT |
1554 | |
1555 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
36a6271d | 1556 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
dc129d82 | 1557 | |
95b80706 | 1558 | set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); |
dc129d82 | 1559 | set_gdbarch_decr_pc_after_break (gdbarch, 4); |
95b80706 | 1560 | |
44dffaac | 1561 | /* Hook in ABI-specific overrides, if they have been registered. */ |
4be87837 | 1562 | gdbarch_init_osabi (info, gdbarch); |
44dffaac | 1563 | |
accc6d1f JT |
1564 | /* Now that we have tuned the configuration, set a few final things |
1565 | based on what the OS ABI has told us. */ | |
1566 | ||
1567 | if (tdep->jb_pc >= 0) | |
1568 | set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); | |
1569 | ||
336d1bba AC |
1570 | frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer); |
1571 | frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer); | |
dc129d82 | 1572 | |
d2427a71 | 1573 | frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); |
accc6d1f | 1574 | |
d2427a71 | 1575 | return gdbarch; |
dc129d82 JT |
1576 | } |
1577 | ||
baa490c4 RH |
1578 | void |
1579 | alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) | |
1580 | { | |
336d1bba AC |
1581 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
1582 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); | |
baa490c4 RH |
1583 | } |
1584 | ||
a78f21af AC |
1585 | extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ |
1586 | ||
c906108c | 1587 | void |
fba45db2 | 1588 | _initialize_alpha_tdep (void) |
c906108c SS |
1589 | { |
1590 | struct cmd_list_element *c; | |
1591 | ||
d2427a71 | 1592 | gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); |
c906108c SS |
1593 | |
1594 | /* Let the user set the fence post for heuristic_proc_start. */ | |
1595 | ||
1596 | /* We really would like to have both "0" and "unlimited" work, but | |
1597 | command.c doesn't deal with that. So make it a var_zinteger | |
1598 | because the user can always use "999999" or some such for unlimited. */ | |
1599 | c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger, | |
1600 | (char *) &heuristic_fence_post, | |
1601 | "\ | |
1602 | Set the distance searched for the start of a function.\n\ | |
1603 | If you are debugging a stripped executable, GDB needs to search through the\n\ | |
1604 | program for the start of a function. This command sets the distance of the\n\ | |
1605 | search. The only need to set it is when debugging a stripped executable.", | |
1606 | &setlist); | |
1607 | /* We need to throw away the frame cache when we set this, since it | |
1608 | might change our ability to get backtraces. */ | |
9f60d481 | 1609 | set_cmd_sfunc (c, reinit_frame_cache_sfunc); |
cb1a6d5f | 1610 | deprecated_add_show_from_set (c, &showlist); |
c906108c | 1611 | } |